arch/x86: factor out common assembly startup code
The 32-bit and 64-bit assembly startup sequences share quite a bunch of common code, so it's factored out into one file to avoid repeating ourselves (and potentially falling out of sync). Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit is contained in:
Charles E. Youse
Anas Nashif
parent
25a7cc1136
commit
418e5c1b38
3 changed files with 70 additions and 114 deletions
67
arch/x86/core/common.S
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67
arch/x86/core/common.S
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@ -0,0 +1,67 @@
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/*
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* Copyright (c) 2019 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arch/x86/multiboot.h>
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/*
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* This is included by ia32/crt0.S and intel64/locore.S
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* at their 32-bit entry points to cover common ground.
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*/
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#ifdef CONFIG_MULTIBOOT_INFO
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/*
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* If we were loaded by a multiboot-compliant loader, then EAX
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* contains MULTIBOOT_EAX_MAGIC and EBX points to a valid 'struct
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* multiboot_info'; otherwise EBX is just junk. Check EAX early
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* before it's clobbered and leave a sentinel (0) in EBX if invalid.
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* The valid in EBX will be the argument to z_x86_prep_c(), so the
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* subsequent code must, of course, be sure to preserve it meanwhile.
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*/
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cmpl $MULTIBOOT_EAX_MAGIC, %eax
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je 1f
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xorl %ebx, %ebx
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1:
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#endif
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#ifdef CONFIG_BOOT_TIME_MEASUREMENT
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/*
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* Boot time measurements use TSC as a datum; zero it.
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*/
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xorl %eax, %eax
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xorl %edx, %edx
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movl $X86_TIME_STAMP_COUNTER_MSR, %ecx
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wrmsr
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#endif
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#ifdef CONFIG_PIC_DISABLE
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/*
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* "Disable" legacy i8259 interrupt controllers. Note that we
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* can't actually disable them, but we mask all their interrupt
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* sources which is effectively the same thing (almost).
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*/
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movb $0xff, %al
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outb %al, $0x21
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outb %al, $0xA1
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#endif
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#ifdef CONFIG_MULTIBOOT
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jmp 1f
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.align 4
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.long MULTIBOOT_HEADER_MAGIC
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.long MULTIBOOT_HEADER_FLAGS
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.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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#ifdef CONFIG_MULTIBOOT_FRAMEBUF
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.fill 5,4,0 /* (unused exec layout) */
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.long 0 /* linear graphics mode */
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.long CONFIG_MULTIBOOT_FRAMEBUF_X /* width */
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.long CONFIG_MULTIBOOT_FRAMEBUF_Y /* height */
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.long 32 /* depth */
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#endif /* CONFIG_MULTIBOOT_FRAMEBUF */
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1:
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#endif
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@ -43,37 +43,7 @@
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SECTION_FUNC(TEXT_START, __start)
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#ifdef CONFIG_MULTIBOOT_INFO
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/*
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* If we were loaded by a multiboot-compliant loader, then EAX
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* contains MULTIBOOT_EAX_MAGIC and EBX points to a 'struct
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* multiboot_info' somewhere in memory that the kernel load
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* image doesn't claim. Since the kernel will consider such memory
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* "free", we must copy the contents of the struct before the kernel
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* decides to use that RAM for something else. However, we can't
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* effect the copy until after the BSS is initialized.
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*
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* EBX isn't touched until the copy is made; even function calls will
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* preserve it (it's callee-save in the SysV ABI). But EAX will be
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* clobbered, so we check for the magic now and leave a sentinel in
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* EBX (0) if the multiboot data isn't valid.
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*/
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cmpl $MULTIBOOT_EAX_MAGIC, %eax
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je 1f
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xorl %ebx, %ebx
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1:
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#endif
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#ifdef CONFIG_BOOT_TIME_MEASUREMENT
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/*
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* Reset the TSC to 0, since that's the datum for boot metrics.
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*/
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xorl %eax, %eax
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xorl %edx, %edx
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movl $X86_TIME_STAMP_COUNTER_MSR, %ecx
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wrmsr
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#endif
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#include "../common.S"
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/* Enable write-back caching by clearing the NW and CD bits */
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movl %cr0, %eax
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@ -265,17 +235,6 @@ __csSet:
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#endif
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lidt z_x86_idt /* load 32-bit operand size IDT */
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#if defined(CONFIG_PIC_DISABLE)
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/*
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* "Disable" legacy i8259 interrupt controllers. Note that we
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* can't actually disable them, but we mask all their interrupt
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* sources which is effectively the same thing (almost).
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*/
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movb $0xff, %al /* all bits set = mask all interrupts */
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outb %al, $0x21 /* set i8259 master mask (IRQs 0-7) */
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outb %al, $0xA1 /* set i8259 slave mask (IRQs 8-15) */
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#endif
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pushl %ebx /* pointer to multiboot info, or NULL */
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call z_x86_prep_c /* enter kernel; never returns */
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@ -390,29 +349,6 @@ z_x86_idt:
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.long _idt_base_address /* physical start address */
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#ifdef CONFIG_MULTIBOOT
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/*
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* The multiboot header must be in the first 8 Kb of the kernel image
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* (not including the ELF section header(s)) and be aligned on a
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* 4 byte boundary. See include/arch/x86/multiboot.h for more info.
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*/
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.balign 4,0x90
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.long MULTIBOOT_HEADER_MAGIC
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.long MULTIBOOT_HEADER_FLAGS
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.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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#ifdef CONFIG_MULTIBOOT_FRAMEBUF
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.fill 5,4,0 /* (unused exec layout) */
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.long 0 /* linear graphics mode */
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.long CONFIG_MULTIBOOT_FRAMEBUF_X /* width */
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.long CONFIG_MULTIBOOT_FRAMEBUF_Y /* height */
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.long 32 /* depth */
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#endif /* CONFIG_MULTIBOOT_FRAMEBUF */
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#endif /* CONFIG_MULTIBOOT */
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#ifdef CONFIG_SET_GDT
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/* GDT should be aligned on 8-byte boundary for best processor
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@ -17,37 +17,9 @@
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.globl __start
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__start:
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/*
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* multiboot starts us here in 32-bit flat mode with interrupts and
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* paging disabled. first, check to see if EAX has a valid multiboot
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* magic in it, and if not, zero EBX so we know it's bogus later.
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* Remember not to clobber EBX until we've copied the boot info struct!
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*/
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#include "../common.S"
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#ifdef CONFIG_MULTIBOOT_INFO
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cmpl $MULTIBOOT_EAX_MAGIC, %eax
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je 1f
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xorl %ebx, %ebx
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1:
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#endif
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/* FIXME: ...resetting TSC here is common to IA32 and Intel64... */
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/* FIXME: ...disabling the PICs is common to IA32 and Intel64... */
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#ifdef CONFIG_BOOT_TIME_MEASUREMENT
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xorl %eax, %eax
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xorl %edx, %edx
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movl $X86_TIME_STAMP_COUNTER_MSR, %ecx
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wrmsr
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#endif
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#ifdef CONFIG_PIC_DISABLE
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movb $0xff, %al
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outb %al, $0x21
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outb %al, $0xA1
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#endif
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/* next, switch to our own GDT/IDT and stack. */
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/* switch to our own GDT/IDT and stack. */
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lgdt gdt48
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lidt idt48
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@ -141,25 +113,6 @@ x86_sse_init:
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mxcsr: .long X86_MXCSR_SANE
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/*
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* FIXME: The multiboot header is identical (for obvious reasons) to the
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* version in ia32/crt0.S. They should be refactored into a common file.
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*/
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#ifdef CONFIG_MULTIBOOT
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.align 4
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.long MULTIBOOT_HEADER_MAGIC
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.long MULTIBOOT_HEADER_FLAGS
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.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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#ifdef CONFIG_MULTIBOOT_FRAMEBUF
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.fill 5,4,0 /* (unused exec layout) */
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.long 0 /* linear graphics mode */
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.long CONFIG_MULTIBOOT_FRAMEBUF_X /* width */
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.long CONFIG_MULTIBOOT_FRAMEBUF_Y /* height */
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.long 32 /* depth */
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#endif /* CONFIG_MULTIBOOT_FRAMEBUF */
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#endif
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/*
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* void z_arch_switch(void *switch_to, void **switched_from);
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*
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