boards: arm: add board support for mimxrt1015_evk

Add board support files for mimxrt1015_evk, the development board for
i.mxrt1015 (CM7) SoC.

- Add pinmux, dts, and doc.
- Tested samples: hello_world, philosophers, synchronization,
basic/blinky, basic/button.

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>

boards/arm/mimxrt1015_evk/CMakeLists.txt

@@ -0,0 +1,9 @@
+#
+# Copyright (c) 2019, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+zephyr_library()
+zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
+zephyr_library_sources(pinmux.c)

boards/arm/mimxrt1015_evk/Kconfig.board

@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2019, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config BOARD_MIMXRT1015_EVK
+	bool "NXP MIMXRT1015-EVK"
+	depends on SOC_SERIES_IMX_RT
+	select SOC_PART_NUMBER_MIMXRT1015DAF5A

boards/arm/mimxrt1015_evk/Kconfig.defconfig

@@ -0,0 +1,44 @@
+# Kconfig - MIMXRT1015-EVK board
+#
+# Copyright (c) 2019, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if BOARD_MIMXRT1015_EVK
+
+config BOARD
+	default "mimxrt1015_evk" if BOARD_MIMXRT1015_EVK
+
+choice CODE_LOCATION
+	default CODE_FLEXSPI
+endchoice
+
+if GPIO_MCUX_IGPIO
+
+config GPIO_MCUX_IGPIO_2
+	default y
+
+config GPIO_MCUX_IGPIO_3
+	default y
+
+endif # GPIO_MCUX_IGPIO
+
+if I2C_MCUX_LPI2C
+
+config I2C_1
+	default y
+
+endif # I2C_MCUX_LPI2C
+
+if UART_MCUX_LPUART
+
+config UART_MCUX_LPUART_1
+	default y
+
+config UART_MCUX_LPUART_4
+	default y
+
+endif # UART_MCUX_LPUART
+
+endif # BOARD_MIMXRT1015_EVK

boards/arm/mimxrt1015_evk/board.cmake

@@ -0,0 +1,14 @@
+#
+# Copyright (c) 2019, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+set_ifndef(OPENSDA_FW jlink)
+
+if(OPENSDA_FW STREQUAL jlink)
+  set_ifndef(BOARD_DEBUG_RUNNER jlink)
+  set_ifndef(BOARD_FLASH_RUNNER jlink)
+endif()
+
+board_runner_args(jlink "--device=MIMXRT1015")
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/arm/mimxrt1015_evk/doc/index.rst

@@ -0,0 +1,197 @@
+.. _mimxrt1015_evk:
+
+NXP MIMXRT1015-EVK
+##################
+
+Overview
+********
+
+The i.MX RT1015 expands the i.MX RT crossover processor families by providing
+high-performance feature set in low-cost LQFP packages, further simplifying
+board design and layout for customers. The i.MX RT1015 runs on the Arm®
+Cortex®-M7 core at 500 MHz.
+
+.. image:: ./mimxrt1015_evk.jpg
+   :width: 720px
+   :align: center
+   :alt: MIMXRT1015-EVK
+
+Hardware
+********
+
+- MIMXRT1015DAF5A MCU
+
+- Memory
+
+  - 128 Mbit QSPI Flash
+
+- Connectivity
+
+  - Micro USB host and OTG connectors
+  - Arduino interface
+
+- Audio
+
+  - Audio Codec
+  - 4-pole audio headphone jack
+  - External speaker connection
+  - Microphone
+
+- Debug
+
+  - JTAG 10-pin connector
+  - OpenSDA with DAPLink
+
+For more information about the MIMXRT1015 SoC and MIMXRT1015-EVK board, see
+these references:
+
+- `i.MX RT1015 Website`_
+- `i.MX RT1015 Datasheet`_
+- `i.MX RT1015 Reference Manual`_
+- `MIMXRT1015-EVK Website`_
+- `MIMXRT1015-EVK Quick Reference Guide`_
+- `MIMXRT1015-EVK Design Files`_
+
+Supported Features
+==================
+
+The mimxrt1015_evk board configuration supports the following hardware
+features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | systick                             |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| I2C       | on-chip    | i2c                                 |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+
+The default configuration can be found in the defconfig file:
+``boards/arm/mimxrt1015_evk/mimxrt1015_evk_defconfig``
+
+Other hardware features are not currently supported by the port.
+
+Connections and I/Os
+====================
+
+The MIMXRT1015 SoC has five pairs of pinmux/gpio controllers.
+
++---------------+-----------------+---------------------------+
+| Name          | Function        | Usage                     |
++===============+=================+===========================+
+| GPIO_AD_B0_05 | GPIO            | LED                       |
++---------------+-----------------+---------------------------+
+| GPIO_EMC_09   | GPIO            | SW4                       |
++---------------+-----------------+---------------------------+
+| GPIO_AD_B0_06 | LPUART1_TX      | UART Console              |
++---------------+-----------------+---------------------------+
+| GPIO_AD_B0_07 | LPUART1_RX      | UART Console              |
++---------------+-----------------+---------------------------+
+| GPIO_EMC_32   | LPUART4_TX      | UART Console              |
++---------------+-----------------+---------------------------+
+| GPIO_EMC_33   | LPUART4_RX      | UART Console              |
++---------------+-----------------+---------------------------+
+| GPIO_AD_B1_15 | LPI2C1_SDA      | I2C SDA                   |
++---------------+-----------------+---------------------------+
+| GPIO_AD_B1_14 | LPI2C1_CLK      | I2C SCL                   |
++---------------+-----------------+---------------------------+
+
+System Clock
+============
+
+The MIMXRT1015 SoC is configured to use the 24 MHz external oscillator on the
+board with the on-chip PLL to generate a 500 MHz core clock.
+
+Serial Port
+===========
+
+The MIMXRT1015 SoC has four UARTs. ``LPUART1`` is configured for the console,
+and the remaining are not used.
+
+Programming and Debugging
+*************************
+
+Build and flash applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+Configuring a Debug Probe
+=========================
+
+A debug probe is used for both flashing and debugging the board. This board is
+configured by default to use the :ref:`opensda-daplink-onboard-debug-probe`,
+however the :ref:`pyocd-debug-host-tools` do not yet support programming the
+external flashes on this board so you must reconfigure the board for one of the
+following debug probes instead.
+
+:ref:`jlink-external-debug-probe`
+-------------------------------------------
+
+Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
+path.
+
+Attach a J-Link 10-pin connector to J55. Check that jumpers J47 and J48 are
+**off** (they are on by default when boards ship from the factory) to ensure
+SWD signals are disconnected from the OpenSDA microcontroller.
+
+Configuring a Console
+=====================
+
+Regardless of your choice in debug probe, we will use the OpenSDA
+microcontroller as a usb-to-serial adapter for the serial console. Check that
+jumpers J45 and J46 are **on** (they are on by default when boards ship from
+the factory) to connect UART signals to the OpenSDA microcontroller.
+
+Connect a USB cable from your PC to J41.
+
+Use the following settings with your serial terminal of choice (minicom, putty,
+etc.):
+
+- Speed: 115200
+- Data: 8 bits
+- Parity: None
+- Stop bits: 1
+
+Flashing
+========
+
+Here is an example for the :ref:`hello_world` application.
+
+.. zephyr-app-commands::
+    :zephyr-app: samples/hello_world
+    :board: mimxrt1015_evk
+    :goals: flash
+
+Open a serial terminal, reset the board (press the SW9 button), and you should
+see the following message in the terminal:
+
+.. code-block:: console
+
+    ***** Booting Zephyr OS v1.14.0-rc1-1297-g312d75f2459e *****
+    Hello World! mimxrt1015_evk
+
+
+.. _MIMXRT1015-EVK Website:
+   https://www.nxp.com/support/developer-resources/run-time-software/i.mx-developer-resources/i.mx-rt1015-evaluation-kit:MIMXRT1015-EVK
+
+.. _MIMXRT1015-EVK Quick Reference Guide:
+   https://www.nxp.com/docs/en/quick-reference-guide/IMXRT1015QSG.pdf
+
+.. _MIMXRT1015-EVK Design Files:
+   https://www.nxp.com/webapp/Download?colCode=MIMXRT1015-EVK-REVB-DS
+
+.. _i.MX RT1015 Website:
+   https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-rt-series/i.mx-rt1015-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1015
+
+.. _i.MX RT1015 Datasheet:
+   https://www.nxp.com/docs/en/data-sheet/IMXRT1015CEC.pdf
+
+.. _i.MX RT1015 Reference Manual:
+   https://www.nxp.com/docs/en/reference-manual/IMXRT1015RM.pdf
+

boards/arm/mimxrt1015_evk/mimxrt1015_evk.dts

@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2019, NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <nxp/nxp_rt.dtsi>
+
+/ {
+	model = "NXP MIMXRT1015-EVK board";
+	compatible = "nxp,mimxrt1015";
+
+	aliases {
+		gpio-1= &gpio1;
+		gpio-2= &gpio2;
+		gpio-3= &gpio3;
+		gpio-4= &gpio4;
+		gpio-5= &gpio5;
+		i2c-1 = &i2c1;
+		uart-1 = &uart1;
+		uart-4 = &uart4;
+		led0 = &green_led;
+		sw0 = &user_button;
+	};
+
+	chosen {
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		green_led: led-1 {
+			gpios = <&gpio3 21 GPIO_INT_ACTIVE_LOW>;
+			label = "User LD1";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		user_button: button-1 {
+			label = "User SW4";
+			gpios = <&gpio2 9 GPIO_INT_ACTIVE_LOW>;
+		};
+	};
+};
+
+arduino_serial: &uart4 {};
+
+&flexspi0 {
+	reg = <0x402a8000 0x4000>, <0x60000000 0x1000000>;
+	at25sf128a: at25sf128a@0 {
+		compatible = "adesto,at25sf128a", "jedec,spi-nor";
+		reg = <0>;
+		status = "ok";
+	};
+};
+
+&i2c1 {
+	status = "ok";
+};
+
+&uart1 {
+	status = "ok";
+	current-speed = <115200>;
+};

boards/arm/mimxrt1015_evk/mimxrt1015_evk.yaml

@@ -0,0 +1,19 @@
+#
+# Copyright (c) 2019, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+identifier: mimxrt1015_evk
+name: NXP MIMXRT1015-EVK
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 128
+flash: 16384
+supported:
+  - i2c
+  - hwinfo

boards/arm/mimxrt1015_evk/mimxrt1015_evk_defconfig

@@ -0,0 +1,17 @@
+#
+# Copyright (c) 2019, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+CONFIG_ARM=y
+CONFIG_SOC_MIMXRT1015=y
+CONFIG_SOC_SERIES_IMX_RT=y
+CONFIG_BOARD_MIMXRT1015_EVK=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_CORTEX_M_SYSTICK=y
+CONFIG_GPIO=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=500000000
+CONFIG_ARM_MPU=y

boards/arm/mimxrt1015_evk/pinmux.c

@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2019, NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <init.h>
+#include <fsl_iomuxc.h>
+#include <fsl_gpio.h>
+
+static int mimxrt1015_evk_init(struct device *dev)
+{
+	ARG_UNUSED(dev);
+
+	CLOCK_EnableClock(kCLOCK_Iomuxc);
+	CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
+
+#ifdef CONFIG_GPIO_MCUX_IGPIO_2
+	IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_09_GPIO2_IO09, 0);
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_09_GPIO2_IO09,
+				IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_PUE(1) |
+				IOMUXC_SW_PAD_CTL_PAD_PUS(2) |
+				IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+				IOMUXC_SW_PAD_CTL_PAD_DSE(4));
+#endif
+
+#ifdef CONFIG_UART_MCUX_LPUART_1
+	/* LPUART1 TX/RX */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0);
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0);
+
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_06_LPUART1_TX,
+				IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+				IOMUXC_SW_PAD_CTL_PAD_DSE(6));
+
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_07_LPUART1_RX,
+				IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+				IOMUXC_SW_PAD_CTL_PAD_DSE(6));
+#endif
+
+#ifdef CONFIG_UART_MCUX_LPUART_4
+	/* LPUART4 TX/RX */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_32_LPUART4_TX, 0);
+	IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_33_LPUART4_RX, 0);
+
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_32_LPUART4_TX,
+				IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+				IOMUXC_SW_PAD_CTL_PAD_DSE(6));
+
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_33_LPUART4_RX,
+				IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+				IOMUXC_SW_PAD_CTL_PAD_DSE(6));
+#endif
+
+#ifdef CONFIG_I2C_1
+	/* LPI2C1 SCL, SDA */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 1);
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 1);
+
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL,
+				IOMUXC_SW_PAD_CTL_PAD_PUS(3) |
+				IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+				IOMUXC_SW_PAD_CTL_PAD_DSE(6));
+
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA,
+				IOMUXC_SW_PAD_CTL_PAD_PUS(3) |
+				IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |
+				IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+				IOMUXC_SW_PAD_CTL_PAD_DSE(6));
+#endif
+
+	return 0;
+}
+
+SYS_INIT(mimxrt1015_evk_init, PRE_KERNEL_1, 0);