boards: microchip: mec172xevb_assy6906: Kernel timer config moved to soc
We moved kernel timer kconfig logic to the soc layer. Signed-off-by: Scott Worley <scott.worley@microchip.com>
This commit is contained in:
parent
6a48fe7415
commit
3f74ca7c78
2 changed files with 0 additions and 38 deletions
|
@ -1,36 +0,0 @@
|
|||
# Copyright (c) 2021 Microchip Technology Inc.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
if BOARD_MEC172XEVB_ASSY6906
|
||||
|
||||
if RTOS_TIMER
|
||||
|
||||
# XEC RTOS timer HW frequency is fixed at 32768 Hz.
|
||||
# The driver requires tickless mode and ticks per second to be 32768 for
|
||||
# accurate operation.
|
||||
|
||||
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
||||
default 32768
|
||||
|
||||
config SYS_CLOCK_TICKS_PER_SEC
|
||||
default 32768
|
||||
|
||||
endif # RTOS_TIMER
|
||||
|
||||
if !RTOS_TIMER
|
||||
|
||||
# If RTOS timer is not enabled we use ARM Cortex-M
|
||||
# SYSTICK. SYSTICK frequency is 96 MHz divided down by the MEC172x PCR
|
||||
# processor clock divider register. We assume PCR processor clock divider
|
||||
# is set to 1. Refer to SOC_MEC_PROC_CLK_DIV
|
||||
#
|
||||
|
||||
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
||||
default 96000000
|
||||
|
||||
config SYS_CLOCK_TICKS_PER_SEC
|
||||
default 1000
|
||||
|
||||
endif # RTOS_TIMER
|
||||
|
||||
endif # BOARD_MEC172XEVB_ASSY6906
|
|
@ -4,8 +4,6 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
CONFIG_RTOS_TIMER=y
|
||||
|
||||
CONFIG_CLOCK_CONTROL=y
|
||||
CONFIG_GPIO=y
|
||||
CONFIG_SERIAL=y
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue