From 3f5aae9d2499d8f6d5641d2690e9f222585ff405 Mon Sep 17 00:00:00 2001 From: Ioannis Glaropoulos Date: Tue, 6 Aug 2019 14:08:53 +0200 Subject: [PATCH] soc: arm: nrf9160: add missing NRF_UICR definition NRF_UICR needs to be defined for nRF9160 SoC in nrfx_config_nrf9160.h, because it is not defined in nrfx/hal/mdk/nrf9160.h (as it is a Secure-only peripheral). Signed-off-by: Ioannis Glaropoulos --- dts/arm/nordic/nrf9160.dtsi | 6 ++++++ dts/bindings/arm/nordic,nrf-uicr.yaml | 14 ++++++++++++++ ext/hal/nordic/nrfx_config_nrf9160.h | 5 +++++ 3 files changed, 25 insertions(+) create mode 100644 dts/bindings/arm/nordic,nrf-uicr.yaml diff --git a/dts/arm/nordic/nrf9160.dtsi b/dts/arm/nordic/nrf9160.dtsi index 831249ebe5e..95d33c028af 100644 --- a/dts/arm/nordic/nrf9160.dtsi +++ b/dts/arm/nordic/nrf9160.dtsi @@ -92,6 +92,12 @@ reg = <0xff0000 0x1000>; status = "okay"; }; + + uicr: uicr@ff8000 { + compatible = "nordic,nrf-uicr"; + reg = <0xff8000 0x1000>; + status = "okay"; + }; }; }; diff --git a/dts/bindings/arm/nordic,nrf-uicr.yaml b/dts/bindings/arm/nordic,nrf-uicr.yaml new file mode 100644 index 00000000000..ac0a267bd9b --- /dev/null +++ b/dts/bindings/arm/nordic,nrf-uicr.yaml @@ -0,0 +1,14 @@ +title: Nordic UICR (User Information Configuration Registers) + +description: > + Binding for the Nordic UICR (User Information Configuration Registers) + +inherits: + !include base.yaml + +properties: + compatible: + constraint: "nordic,nrf-uicr" + + reg: + category: required diff --git a/ext/hal/nordic/nrfx_config_nrf9160.h b/ext/hal/nordic/nrfx_config_nrf9160.h index 52c61b11c71..790d881fd2e 100644 --- a/ext/hal/nordic/nrfx_config_nrf9160.h +++ b/ext/hal/nordic/nrfx_config_nrf9160.h @@ -193,6 +193,11 @@ ((NRF_UARTE_Type *)DT_NORDIC_NRF_UARTE_UART_3_BASE_ADDRESS) #endif +#ifdef DT_INST_0_NORDIC_NRF_UICR_BASE_ADDRESS +#define NRF_UICR \ + ((NRF_UICR_Type *)DT_INST_0_NORDIC_NRF_UICR_BASE_ADDRESS) +#endif + #ifdef DT_NORDIC_NRF_WATCHDOG_WDT_0_BASE_ADDRESS #define NRF_WDT \ ((NRF_WDT_Type *)DT_NORDIC_NRF_WATCHDOG_WDT_0_BASE_ADDRESS)