boards: arm: adi: Enable display for MAX32662EVKIT board
MAX32662EVKIT board has CFAF128128B1-0145T display which is 128x128 graphic display. This commit enable mpi dbi display support with LVGL graphic library. Pin connection of display is 3wire mode SRAM size increased to be fit with lvgl example. Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
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3 changed files with 99 additions and 0 deletions
29
boards/adi/max32662evkit/Kconfig.defconfig
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29
boards/adi/max32662evkit/Kconfig.defconfig
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# MAX32662EVKIT boards configuration
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# Copyright (c) 2024 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_MAX32662EVKIT
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if DISPLAY
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config MIPI_DBI_SPI_3WIRE
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default y
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if LVGL
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config LV_Z_BITS_PER_PIXEL
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default 16
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choice LV_COLOR_DEPTH
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default LV_COLOR_DEPTH_16 # 16 bit per pixel
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endchoice
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config LV_COLOR_16_SWAP
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default y
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endif # LVGL
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endif # DISPLAY
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endif # BOARD_MAX32662EVKIT
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@ -11,6 +11,7 @@
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#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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#include <zephyr/dt-bindings/dma/max32662_dma.h>
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#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
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/ {
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model = "Analog Devices MAX32662EVKIT";
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@ -21,6 +22,7 @@
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zephyr,shell-uart = &uart0;
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zephyr,sram = &sram2;
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zephyr,flash = &flash0;
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zephyr,display = &st7735;
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};
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leds {
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@ -47,6 +49,40 @@
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sw0 = &pb1;
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watchdog0 = &wdt0;
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};
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mipi_dbi {
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compatible = "zephyr,mipi-dbi-spi";
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spi-dev = <&spi1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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st7735: st7735@0 {
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compatible = "sitronix,st7735r";
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mipi-max-frequency = <DT_FREQ_M(6)>;
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mipi-mode = <MIPI_DBI_MODE_SPI_3WIRE>;
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reg = <0>;
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width = <130>;
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height = <132>;
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x-offset = <0>;
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y-offset = <0>;
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madctl = <0xc0>;
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colmod = <0x05>;
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vmctr1 = <0x51>;
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pwctr1 = [02 02];
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pwctr2 = [c5];
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pwctr3 = [0d 00];
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pwctr4 = [8d 1a];
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pwctr5 = [8d ee];
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frmctr1 = [02 35 36];
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frmctr2 = [02 35 36];
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frmctr3 = [02 35 36 02 35 36];
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gamctrp1 = [0a 1c 0c 14 33 2b 24 28 27 25 2c 39 00 05 03 0d];
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gamctrn1 = [0a 1c 0c 14 33 2b 24 28 27 25 2d 3a 00 05 03 0d];
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};
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};
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};
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&uart0 {
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@ -89,3 +125,18 @@
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pinctrl-0 = <&spi0a_copi_p0_3 &spi0a_cito_p0_2 &spi0a_sck_p0_4 &spi0a_ts0_p0_5>;
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pinctrl-names = "default";
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};
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&spi1a_mosi_p0_8 {
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power-source=<MAX32_VSEL_VDDIOH>;
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};
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&spi1a_sck_p0_17 {
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power-source=<MAX32_VSEL_VDDIOH>;
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};
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&spi1 {
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status = "okay";
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pinctrl-0 = <&spi1a_mosi_p0_8 &spi1a_sck_p0_17>;
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pinctrl-names = "default";
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cs-gpios = <&gpio0 18 (GPIO_ACTIVE_LOW | MAX32_VSEL_VDDIOH)>;
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};
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19
samples/subsys/display/lvgl/boards/max32662evkit.overlay
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samples/subsys/display/lvgl/boards/max32662evkit.overlay
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/*
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* Copyright (c) 2024, Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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chosen {
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zephyr,sram = &sram0;
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};
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};
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/*
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* Concatenate SRAM0(16KB), SRAM1(16KB) and SRAM2(16KB)
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* to lvgl example work
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*/
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(48)>;
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};
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