boards: arm: adi: Enable display for MAX32662EVKIT board

MAX32662EVKIT board has CFAF128128B1-0145T display which
is 128x128 graphic display.
This commit enable mpi dbi display support with LVGL graphic library.
Pin connection of display is 3wire mode
SRAM size increased to be fit with lvgl example.

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
This commit is contained in:
Sadik Ozer 2024-09-23 18:36:31 +03:00 committed by Fabio Baltieri
commit 3f4a9c408a
3 changed files with 99 additions and 0 deletions

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@ -0,0 +1,29 @@
# MAX32662EVKIT boards configuration
# Copyright (c) 2024 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
if BOARD_MAX32662EVKIT
if DISPLAY
config MIPI_DBI_SPI_3WIRE
default y
if LVGL
config LV_Z_BITS_PER_PIXEL
default 16
choice LV_COLOR_DEPTH
default LV_COLOR_DEPTH_16 # 16 bit per pixel
endchoice
config LV_COLOR_16_SWAP
default y
endif # LVGL
endif # DISPLAY
endif # BOARD_MAX32662EVKIT

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@ -11,6 +11,7 @@
#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/dma/max32662_dma.h>
#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
/ {
model = "Analog Devices MAX32662EVKIT";
@ -21,6 +22,7 @@
zephyr,shell-uart = &uart0;
zephyr,sram = &sram2;
zephyr,flash = &flash0;
zephyr,display = &st7735;
};
leds {
@ -47,6 +49,40 @@
sw0 = &pb1;
watchdog0 = &wdt0;
};
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
spi-dev = <&spi1>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
st7735: st7735@0 {
compatible = "sitronix,st7735r";
mipi-max-frequency = <DT_FREQ_M(6)>;
mipi-mode = <MIPI_DBI_MODE_SPI_3WIRE>;
reg = <0>;
width = <130>;
height = <132>;
x-offset = <0>;
y-offset = <0>;
madctl = <0xc0>;
colmod = <0x05>;
vmctr1 = <0x51>;
pwctr1 = [02 02];
pwctr2 = [c5];
pwctr3 = [0d 00];
pwctr4 = [8d 1a];
pwctr5 = [8d ee];
frmctr1 = [02 35 36];
frmctr2 = [02 35 36];
frmctr3 = [02 35 36 02 35 36];
gamctrp1 = [0a 1c 0c 14 33 2b 24 28 27 25 2c 39 00 05 03 0d];
gamctrn1 = [0a 1c 0c 14 33 2b 24 28 27 25 2d 3a 00 05 03 0d];
};
};
};
&uart0 {
@ -89,3 +125,18 @@
pinctrl-0 = <&spi0a_copi_p0_3 &spi0a_cito_p0_2 &spi0a_sck_p0_4 &spi0a_ts0_p0_5>;
pinctrl-names = "default";
};
&spi1a_mosi_p0_8 {
power-source=<MAX32_VSEL_VDDIOH>;
};
&spi1a_sck_p0_17 {
power-source=<MAX32_VSEL_VDDIOH>;
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1a_mosi_p0_8 &spi1a_sck_p0_17>;
pinctrl-names = "default";
cs-gpios = <&gpio0 18 (GPIO_ACTIVE_LOW | MAX32_VSEL_VDDIOH)>;
};

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@ -0,0 +1,19 @@
/*
* Copyright (c) 2024, Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
chosen {
zephyr,sram = &sram0;
};
};
/*
* Concatenate SRAM0(16KB), SRAM1(16KB) and SRAM2(16KB)
* to lvgl example work
*/
&sram0 {
reg = <0x20000000 DT_SIZE_K(48)>;
};