From 3f2bee601341b11326c2affac6d8e9a017b9d787 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 12 Feb 2020 13:06:04 -0600 Subject: [PATCH] dts: nxp: kinetis: Update nxp,kinetis-gpio binding for port connection Add a property to the nxp,kinetis-gpio binding that related the GPIO node to the pinmux PORT node. For the kl25z we add the pinmux nodes as well since they didn't exist. Signed-off-by: Kumar Gala --- dts/arm/nxp/nxp_k2x.dtsi | 5 ++++ dts/arm/nxp/nxp_k6x.dtsi | 5 ++++ dts/arm/nxp/nxp_k8x.dtsi | 5 ++++ dts/arm/nxp/nxp_ke1xf.dtsi | 5 ++++ dts/arm/nxp/nxp_kl25z.dtsi | 35 +++++++++++++++++++++++++ dts/arm/nxp/nxp_kv5x.dtsi | 5 ++++ dts/arm/nxp/nxp_kw2xd.dtsi | 5 ++++ dts/arm/nxp/nxp_kw40z.dtsi | 3 +++ dts/arm/nxp/nxp_kw41z.dtsi | 3 +++ dts/bindings/gpio/nxp,kinetis-gpio.yaml | 7 +++++ 10 files changed, 78 insertions(+) diff --git a/dts/arm/nxp/nxp_k2x.dtsi b/dts/arm/nxp/nxp_k2x.dtsi index ea00dbc7e64..9d671c8605d 100644 --- a/dts/arm/nxp/nxp_k2x.dtsi +++ b/dts/arm/nxp/nxp_k2x.dtsi @@ -233,6 +233,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -242,6 +243,7 @@ label = "GPIO_1"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -251,6 +253,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; gpiod: gpio@400ff0c0 { @@ -260,6 +263,7 @@ label = "GPIO_3"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_d>; }; gpioe: gpio@400ff100 { @@ -269,6 +273,7 @@ label = "GPIO_4"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_e>; }; spi0: spi@4002c000 { diff --git a/dts/arm/nxp/nxp_k6x.dtsi b/dts/arm/nxp/nxp_k6x.dtsi index 62eefc88da1..a8d950548b9 100644 --- a/dts/arm/nxp/nxp_k6x.dtsi +++ b/dts/arm/nxp/nxp_k6x.dtsi @@ -296,6 +296,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -305,6 +306,7 @@ label = "GPIO_1"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -314,6 +316,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; gpiod: gpio@400ff0c0 { @@ -323,6 +326,7 @@ label = "GPIO_3"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_d>; }; gpioe: gpio@400ff100 { @@ -332,6 +336,7 @@ label = "GPIO_4"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_e>; }; spi0: spi@4002c000 { diff --git a/dts/arm/nxp/nxp_k8x.dtsi b/dts/arm/nxp/nxp_k8x.dtsi index c253e2860e1..c0c32672846 100644 --- a/dts/arm/nxp/nxp_k8x.dtsi +++ b/dts/arm/nxp/nxp_k8x.dtsi @@ -107,6 +107,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -116,6 +117,7 @@ label = "GPIO_1"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -125,6 +127,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; gpiod: gpio@400ff0c0 { @@ -134,6 +137,7 @@ label = "GPIO_3"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_d>; }; gpioe: gpio@400ff100 { @@ -143,6 +147,7 @@ label = "GPIO_4"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_e>; }; i2c0: i2c@40066000 { diff --git a/dts/arm/nxp/nxp_ke1xf.dtsi b/dts/arm/nxp/nxp_ke1xf.dtsi index 33a0ca485cc..8779516cc26 100644 --- a/dts/arm/nxp/nxp_ke1xf.dtsi +++ b/dts/arm/nxp/nxp_ke1xf.dtsi @@ -305,6 +305,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -314,6 +315,7 @@ label = "GPIO_1"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -323,6 +325,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; gpiod: gpio@400ff0c0 { @@ -332,6 +335,7 @@ label = "GPIO_3"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_d>; }; gpioe: gpio@400ff100 { @@ -341,6 +345,7 @@ label = "GPIO_4"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_e>; }; adc0: adc@4003b000 { diff --git a/dts/arm/nxp/nxp_kl25z.dtsi b/dts/arm/nxp/nxp_kl25z.dtsi index 9c1eae40d6c..dcdd657aada 100644 --- a/dts/arm/nxp/nxp_kl25z.dtsi +++ b/dts/arm/nxp/nxp_kl25z.dtsi @@ -105,6 +105,36 @@ #io-channel-cells = <1>; }; + pinmux_a: pinmux@40049000 { + compatible = "nxp,kinetis-pinmux"; + reg = <0x40049000 0xd0>; + clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; + }; + + pinmux_b: pinmux@4004a000 { + compatible = "nxp,kinetis-pinmux"; + reg = <0x4004a000 0xd0>; + clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; + }; + + pinmux_c: pinmux@4004b000 { + compatible = "nxp,kinetis-pinmux"; + reg = <0x4004b000 0xd0>; + clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; + }; + + pinmux_d: pinmux@4004c000 { + compatible = "nxp,kinetis-pinmux"; + reg = <0x4004c000 0xd0>; + clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; + }; + + pinmux_e: pinmux@4004d000 { + compatible = "nxp,kinetis-pinmux"; + reg = <0x4004d000 0xd0>; + clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; + }; + gpioa: gpio@400ff000 { compatible = "nxp,kinetis-gpio"; reg = <0x400ff000 0x40>; @@ -112,6 +142,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -120,6 +151,7 @@ label = "GPIO_1"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -128,6 +160,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; gpiod: gpio@400ff0c0 { @@ -137,6 +170,7 @@ label = "GPIO_3"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_d>; }; gpioe: gpio@400ff100 { @@ -145,6 +179,7 @@ label = "GPIO_4"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_e>; }; usbd: usbd@40072000 { diff --git a/dts/arm/nxp/nxp_kv5x.dtsi b/dts/arm/nxp/nxp_kv5x.dtsi index 9e41e83bec6..6d690241ab5 100644 --- a/dts/arm/nxp/nxp_kv5x.dtsi +++ b/dts/arm/nxp/nxp_kv5x.dtsi @@ -102,6 +102,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -111,6 +112,7 @@ label = "GPIO_1"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -120,6 +122,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; gpiod: gpio@400ff0c0 { @@ -129,6 +132,7 @@ label = "GPIO_3"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_d>; }; gpioe: gpio@400ff100 { @@ -138,6 +142,7 @@ label = "GPIO_4"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_e>; }; i2c0: i2c@40066000 { diff --git a/dts/arm/nxp/nxp_kw2xd.dtsi b/dts/arm/nxp/nxp_kw2xd.dtsi index e6a4e733339..7dab73b5194 100644 --- a/dts/arm/nxp/nxp_kw2xd.dtsi +++ b/dts/arm/nxp/nxp_kw2xd.dtsi @@ -192,6 +192,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -201,6 +202,7 @@ label = "GPIO_1"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -210,6 +212,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; gpiod: gpio@400ff0c0 { @@ -219,6 +222,7 @@ label = "GPIO_3"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_d>; }; gpioe: gpio@400ff100 { @@ -228,6 +232,7 @@ label = "GPIO_4"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_e>; }; spi0: spi@4002c000 { diff --git a/dts/arm/nxp/nxp_kw40z.dtsi b/dts/arm/nxp/nxp_kw40z.dtsi index 894959773b7..cd2f0b3839a 100644 --- a/dts/arm/nxp/nxp_kw40z.dtsi +++ b/dts/arm/nxp/nxp_kw40z.dtsi @@ -143,6 +143,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -151,6 +152,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -160,6 +162,7 @@ label = "GPIO_3"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; spi0: spi@4002c000 { diff --git a/dts/arm/nxp/nxp_kw41z.dtsi b/dts/arm/nxp/nxp_kw41z.dtsi index 751c4255799..10233c6f1b9 100644 --- a/dts/arm/nxp/nxp_kw41z.dtsi +++ b/dts/arm/nxp/nxp_kw41z.dtsi @@ -146,6 +146,7 @@ label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_a>; }; gpiob: gpio@400ff040 { @@ -154,6 +155,7 @@ label = "GPIO_1"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_b>; }; gpioc: gpio@400ff080 { @@ -163,6 +165,7 @@ label = "GPIO_2"; gpio-controller; #gpio-cells = <2>; + nxp,kinetis-port = <&pinmux_c>; }; spi0: spi@4002c000 { diff --git a/dts/bindings/gpio/nxp,kinetis-gpio.yaml b/dts/bindings/gpio/nxp,kinetis-gpio.yaml index cec1f546726..d6ef88e2ccb 100644 --- a/dts/bindings/gpio/nxp,kinetis-gpio.yaml +++ b/dts/bindings/gpio/nxp,kinetis-gpio.yaml @@ -14,6 +14,13 @@ properties: "#gpio-cells": const: 2 + nxp,kinetis-port: + required: true + type: phandle + description: | + A phandle reference to the device tree node that contains the pinmux + port associated with this GPIO controller. + gpio-cells: - pin - flags