soc: imx9: remove custom linker script
The custom linker script was required because SOF needed some extra linker sections. Other than that, the custom linker script was identical to the common architecture script. This commit removes the custom linker script because: * keeping the custom linker script in sync with the common one is troublesome. * application-specific linker sections shouldn't be included in the generic soc linker script. Instead, they should be handled at the application level (i.e: via cmake commands if additional sections are needed or via a new, custom linker script if more changes are needed) Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit is contained in:
Laurentiu Mihalcea
Anas Nashif
parent
4dc082da37
commit
3f2790b89c
2 changed files with 1 additions and 367 deletions
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@ -6,7 +6,7 @@ if(CONFIG_SOC_MIMX9352_A55)
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zephyr_sources_ifdef(CONFIG_ARM_MMU a55/mmu_regions.c)
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set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/a55/linker.ld CACHE INTERNAL "")
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm64/scripts/linker.ld CACHE INTERNAL "")
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elseif(CONFIG_SOC_MIMX9352_M33)
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zephyr_include_directories(.)
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zephyr_include_directories(m33)
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@ -1,366 +0,0 @@
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/*
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* Copyright 2023-2024 NXP
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* This is mostly a copy of arch/arm64/scripts/linker.ld with
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* a few SOF-related changes. This is needed in order to avoid
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* introducing sections based on CONFIG_SOF in the main ARM64
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* linker script.
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*/
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#include <zephyr/linker/sections.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/linker/devicetree_regions.h>
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#include <zephyr/linker/linker-defs.h>
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#include <zephyr/linker/linker-tool.h>
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/* physical address of RAM */
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#ifdef CONFIG_XIP
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#define ROMABLE_REGION FLASH
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#else
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#define ROMABLE_REGION RAM
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#endif
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#define RAMABLE_REGION RAM
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#if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
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#define ROM_ADDR RAM_ADDR
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#else
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#define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET)
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#endif
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#if CONFIG_FLASH_LOAD_SIZE > 0
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#define ROM_SIZE CONFIG_FLASH_LOAD_SIZE
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#else
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#define ROM_SIZE (CONFIG_FLASH_SIZE * 1K - CONFIG_FLASH_LOAD_OFFSET)
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#endif
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#define RAM_SIZE (CONFIG_SRAM_SIZE * 1K)
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#define RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
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#if defined(CONFIG_ARM_MMU)
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_region_min_align = CONFIG_MMU_PAGE_SIZE;
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#elif defined(CONFIG_ARM_MPU)
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_region_min_align = CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE;
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#define BSS_ALIGN ALIGN(_region_min_align)
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#else
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/* If building without MMU support, use default 4-byte alignment. */
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_region_min_align = 4;
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#endif
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#ifndef BSS_ALIGN
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#define BSS_ALIGN
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#endif
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#define MMU_ALIGN . = ALIGN(_region_min_align)
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MEMORY
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{
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FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
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RAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
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LINKER_DT_REGIONS()
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/* Used by and documented in include/linker/intlist.ld */
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IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
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}
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ENTRY(CONFIG_KERNEL_ENTRY)
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SECTIONS
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{
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#include <zephyr/linker/rel-sections.ld>
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#ifdef CONFIG_LLEXT
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#include <zephyr/linker/llext-sections.ld>
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#endif
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/*
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* .plt and .iplt are here according to 'arm-zephyr-elf-ld --verbose',
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* before text section.
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*/
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/DISCARD/ :
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{
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*(.plt)
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}
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/DISCARD/ :
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{
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*(.iplt)
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}
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GROUP_START(ROMABLE_REGION)
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__rom_region_start = ROM_ADDR;
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SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
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{
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__text_region_start = .;
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#ifndef CONFIG_XIP
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z_mapped_start = .;
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#endif
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#ifdef CONFIG_AARCH64_IMAGE_HEADER
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KEEP(*(.image_header))
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KEEP(*(".image_header.*"))
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#endif
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_vector_start = .;
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KEEP(*(.exc_vector_table))
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KEEP(*(".exc_vector_table.*"))
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KEEP(*(.vectors))
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_vector_end = .;
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*(.text)
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*(".text.*")
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*(.gnu.linkonce.t.*)
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/*
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* These are here according to 'arm-zephyr-elf-ld --verbose',
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* after .gnu.linkonce.t.*
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*/
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*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
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#include <zephyr/linker/kobject-text.ld>
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MMU_ALIGN;
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} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__text_region_end = .;
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__text_region_size = __text_region_end - __text_region_start;
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#if defined (CONFIG_CPP)
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SECTION_PROLOGUE(.ARM.extab,,)
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{
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/*
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* .ARM.extab section containing exception unwinding information.
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*/
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#endif
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SECTION_PROLOGUE(.ARM.exidx,,)
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{
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/*
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* This section, related to stack and exception unwinding, is placed
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* explicitly to prevent it from being shared between multiple regions.
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* It must be defined for gcc to support 64-bit math and avoid
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* section overlap.
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*/
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__exidx_start = .;
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#if defined (__GCC_LINKER_CMD__)
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*(.ARM.exidx* gnu.linkonce.armexidx.*)
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#endif
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__exidx_end = .;
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} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__rodata_region_start = .;
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#include <zephyr/linker/common-rom.ld>
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/* Located in generated directory. This file is populated by calling
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* zephyr_linker_sources(ROM_SECTIONS ...). Useful for grouping iterable RO structs.
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*/
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#include <snippets-rom-sections.ld>
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#include <zephyr/linker/thread-local-storage.ld>
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SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
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{
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*(.rodata)
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*(".rodata.*")
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*(.gnu.linkonce.r.*)
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/*
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* The following is a workaround to allow compiling with GCC 12 and
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* above, which may emit "GOT indirections" for the weak symbol
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* references (see the GitHub issue zephyrproject-rtos/sdk-ng#547).
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*/
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*(.got)
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*(.got.plt)
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-rodata.ld>
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#include <zephyr/linker/kobject-rom.ld>
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} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#include <zephyr/linker/cplusplus-rom.ld>
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MMU_ALIGN;
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__rodata_region_end = .;
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__rodata_region_size = __rodata_region_end - __rodata_region_start;
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__rom_region_end = .;
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/*
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* These are here according to 'arm-zephyr-elf-ld --verbose',
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* before data section.
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*/
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/DISCARD/ :
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{
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*(.igot.plt)
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*(.igot)
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}
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GROUP_END(ROMABLE_REGION)
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GROUP_START(RAMABLE_REGION)
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. = RAM_ADDR;
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/* Align the start of image RAM with the
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* minimum granularity required by MMU.
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*/
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. = ALIGN(_region_min_align);
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_image_ram_start = .;
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#ifdef CONFIG_XIP
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z_mapped_start = .;
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#endif
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-ram-sections.ld>
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#if defined(CONFIG_USERSPACE)
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#define APP_SHARED_ALIGN . = ALIGN(_region_min_align);
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#define SMEM_PARTITION_ALIGN(size) MMU_ALIGN
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#if defined(CONFIG_ARM_MPU)
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/*
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* When _app_smem region is empty, alignment is also needed. If there
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* is no alignment, the _app_smem_start used by arm mpu can be lower
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* than __rodata_region_end, and this two regions can overlap.
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* The Armv8-R aarch64 MPU does not allow overlapped regions.
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*/
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#define EMPTY_APP_SHARED_ALIGN APP_SHARED_ALIGN
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#endif
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#include <app_smem.ld>
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_app_smem_size = _app_smem_end - _app_smem_start;
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_app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME);
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#endif /* CONFIG_USERSPACE */
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SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD), BSS_ALIGN)
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{
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/*
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* For performance, BSS section is assumed to be 4 byte aligned and
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* a multiple of 4 bytes
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*/
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. = ALIGN(4);
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__bss_start = .;
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__kernel_ram_start = .;
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*(.bss)
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*(".bss.*")
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*(COMMON)
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*(".kernel_bss.*")
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/*
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* As memory is cleared in words only, it is simpler to ensure the BSS
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* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
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*/
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__bss_end = ALIGN(4);
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} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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#if CONFIG_SOF
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SECTION_PROLOGUE(.static_uuid_entries,,)
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{
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*(*.static_uuids)
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} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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SECTION_PROLOGUE(.static_log_entries,,)
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{
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*(*.static_log*)
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} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#endif /* CONFIG_SOF */
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#include <zephyr/linker/common-noinit.ld>
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SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,)
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{
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__data_region_start = .;
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__data_start = .;
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*(.data)
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*(".data.*")
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*(".kernel.*")
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#if CONFIG_SOF
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_trace_ctx_start = ABSOLUTE(.);
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*(.trace_ctx)
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_trace_ctx_end = ABSOLUTE(.);
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#endif /* CONFIG_SOF */
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-rwdata.ld>
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__data_end = .;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__data_size = __data_end - __data_start;
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__data_load_start = LOADADDR(_DATA_SECTION_NAME);
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__data_region_load_start = LOADADDR(_DATA_SECTION_NAME);
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#include <zephyr/linker/common-ram.ld>
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#include <zephyr/linker/kobject-data.ld>
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#include <zephyr/linker/cplusplus-ram.ld>
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-data-sections.ld>
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__data_region_end = .;
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/* Define linker symbols */
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/* Located in generated directory. This file is populated by the
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* zephyr_linker_sources() Cmake function.
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*/
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#include <snippets-sections.ld>
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#define LAST_RAM_ALIGN MMU_ALIGN;
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#include <zephyr/linker/ram-end.ld>
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GROUP_END(RAMABLE_REGION)
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__kernel_ram_end = RAM_ADDR + RAM_SIZE;
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__kernel_ram_size = __kernel_ram_end - __kernel_ram_start;
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#include <zephyr/linker/debug-sections.ld>
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SECTION_PROLOGUE(.ARM.attributes, 0,)
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{
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KEEP(*(.ARM.attributes))
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KEEP(*(.gnu.attributes))
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}
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/DISCARD/ : { *(.note.GNU-stack) }
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/* Sections generated from 'zephyr,memory-region' nodes */
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LINKER_DT_SECTIONS()
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/* Must be last in romable region */
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SECTION_PROLOGUE(.last_section,,)
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{
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#ifdef CONFIG_LINKER_LAST_SECTION_ID
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/* Fill last section with a word to ensure location counter and actual rom
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* region data usage match. */
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LONG(CONFIG_LINKER_LAST_SECTION_ID_PATTERN)
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#endif
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} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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/* To provide the image size as a const expression,
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* calculate this value here. */
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_flash_used = LOADADDR(.last_section) + SIZEOF(.last_section) - __rom_region_start;
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}
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