pm: esp32c6: Power management support
Power management support (light/deep sleep) for ESP32C6 Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
This commit is contained in:
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f74592dcde
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3ee2a62a55
5 changed files with 95 additions and 9 deletions
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@ -42,7 +42,9 @@
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#include <soc/dport_access.h>
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#include <soc/dport_access.h>
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#include <hal/clk_tree_ll.h>
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#include <hal/clk_tree_ll.h>
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#include <hal/usb_serial_jtag_ll.h>
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#include <hal/usb_serial_jtag_ll.h>
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#endif /* CONFIG_SOC_SERIES_ESP32xx */
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#include <esp_private/esp_pmu.h>
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#include <ocode_init.h>
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#endif
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/esp32_clock_control.h>
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#include <zephyr/drivers/clock_control/esp32_clock_control.h>
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@ -658,22 +660,29 @@ static int clock_control_esp32_init(const struct device *dev)
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{
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{
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const struct esp32_clock_config *cfg = dev->config;
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const struct esp32_clock_config *cfg = dev->config;
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bool ret;
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bool ret;
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#if !defined(CONFIG_SOC_SERIES_ESP32C6)
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soc_reset_reason_t rst_reas;
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soc_reset_reason_t rst_reas;
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rtc_config_t rtc_cfg = RTC_CONFIG_DEFAULT();
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rst_reas = esp_rom_get_reset_reason(0);
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rst_reas = esp_rom_get_reset_reason(0);
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#if defined(CONFIG_SOC_SERIES_ESP32C6)
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pmu_init();
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if (rst_reas == RESET_REASON_CHIP_POWER_ON) {
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esp_ocode_calib_init();
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}
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#else /* CONFIG_SOC_SERIES_ESP32C6 */
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rtc_config_t rtc_cfg = RTC_CONFIG_DEFAULT();
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#if !defined(CONFIG_SOC_SERIES_ESP32)
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#if !defined(CONFIG_SOC_SERIES_ESP32)
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if (rst_reas == RESET_REASON_CHIP_POWER_ON
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if (rst_reas == RESET_REASON_CHIP_POWER_ON
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#if SOC_EFUSE_HAS_EFUSE_RST_BUG
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#if SOC_EFUSE_HAS_EFUSE_RST_BUG
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|| rst_reas == RESET_REASON_CORE_EFUSE_CRC
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|| rst_reas == RESET_REASON_CORE_EFUSE_CRC
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#endif
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#endif /* SOC_EFUSE_HAS_EFUSE_RST_BUG */
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) {
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) {
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rtc_cfg.cali_ocode = 1;
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rtc_cfg.cali_ocode = 1;
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}
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}
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#endif
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#endif /* !CONFIG_SOC_SERIES_ESP32 */
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rtc_init(rtc_cfg);
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rtc_init(rtc_cfg);
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#endif
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#endif /* CONFIG_SOC_SERIES_ESP32C6 */
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ret = esp32_cpu_clock_configure(&cfg->cpu);
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ret = esp32_cpu_clock_configure(&cfg->cpu);
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if (ret) {
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if (ret) {
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@ -27,10 +27,27 @@
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compatible = "espressif,riscv";
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compatible = "espressif,riscv";
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riscv,isa = "rv32imac_zicsr";
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riscv,isa = "rv32imac_zicsr";
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reg = <0>;
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reg = <0>;
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cpu-power-states = <&light_sleep &deep_sleep>;
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clock-source = <ESP32_CPU_CLK_SRC_PLL>;
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clock-source = <ESP32_CPU_CLK_SRC_PLL>;
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clock-frequency = <DT_FREQ_M(160)>;
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clock-frequency = <DT_FREQ_M(160)>;
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xtal-freq = <DT_FREQ_M(40)>;
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xtal-freq = <DT_FREQ_M(40)>;
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};
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};
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power-states {
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light_sleep: light_sleep {
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compatible = "zephyr,power-state";
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power-state-name = "standby";
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min-residency-us = <200>;
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exit-latency-us = <60>;
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};
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deep_sleep: deep_sleep {
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compatible = "zephyr,power-state";
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power-state-name = "soft-off";
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min-residency-us = <2000>;
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exit-latency-us = <212>;
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};
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};
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};
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};
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pinctrl: pin-controller {
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pinctrl: pin-controller {
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@ -66,14 +83,13 @@
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status = "okay";
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status = "okay";
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};
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};
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rtc: rtc@600b000 {
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rtc: rtc@600b0000 {
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compatible = "espressif,esp32-rtc";
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compatible = "espressif,esp32-rtc";
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reg = <0x600B000 DT_SIZE_K(1)>;
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reg = <0x600B0000 DT_SIZE_K(1)>;
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fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>;
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fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>;
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slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>;
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slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>;
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#clock-cells = <1>;
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#clock-cells = <1>;
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status = "okay";
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status = "okay";
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};
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};
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rtc_timer: rtc_timer@600b0c00 {
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rtc_timer: rtc_timer@600b0c00 {
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@ -14,6 +14,8 @@ config SOC_SERIES_ESP32C6
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select RISCV_ISA_EXT_ZICSR
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select RISCV_ISA_EXT_ZICSR
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select HAS_ESPRESSIF_HAL
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select HAS_ESPRESSIF_HAL
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select XIP if !MCUBOOT
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select XIP if !MCUBOOT
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select HAS_PM
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select HAS_POWEROFF
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if SOC_SERIES_ESP32C6
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if SOC_SERIES_ESP32C6
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44
soc/espressif/esp32c6/power.c
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44
soc/espressif/esp32c6/power.c
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@ -0,0 +1,44 @@
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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/pm/pm.h>
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#include <zephyr/irq.h>
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#include <esp_sleep.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
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/* Invoke Low Power/System Off specific Tasks */
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void pm_state_set(enum pm_state state, uint8_t substate_id)
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{
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ARG_UNUSED(substate_id);
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switch (state) {
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case PM_STATE_STANDBY:
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/* Nothing to do. */
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break;
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default:
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LOG_DBG("Unsupported power state %u", state);
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break;
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}
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}
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/* Handle SOC specific activity after Low Power Mode Exit */
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void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
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{
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ARG_UNUSED(substate_id);
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switch (state) {
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case PM_STATE_STANDBY:
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irq_unlock(MSTATUS_IEN);
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__asm__ volatile("wfi");
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esp_light_sleep_start();
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break;
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default:
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LOG_DBG("Unsupported power state %u", state);
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break;
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}
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}
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15
soc/espressif/esp32c6/poweroff.c
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15
soc/espressif/esp32c6/poweroff.c
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@ -0,0 +1,15 @@
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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/sys/poweroff.h>
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#include <esp_sleep.h>
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void z_sys_poweroff(void)
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{
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/* Forces RTC domain to be always on */
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esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);
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esp_deep_sleep_start();
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}
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