pm: esp32c6: Power management support

Power management support (light/deep sleep) for ESP32C6

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
This commit is contained in:
Raffael Rostagno 2024-08-02 12:20:38 -03:00 committed by Anas Nashif
commit 3ee2a62a55
5 changed files with 95 additions and 9 deletions

View file

@ -42,7 +42,9 @@
#include <soc/dport_access.h> #include <soc/dport_access.h>
#include <hal/clk_tree_ll.h> #include <hal/clk_tree_ll.h>
#include <hal/usb_serial_jtag_ll.h> #include <hal/usb_serial_jtag_ll.h>
#endif /* CONFIG_SOC_SERIES_ESP32xx */ #include <esp_private/esp_pmu.h>
#include <ocode_init.h>
#endif
#include <zephyr/drivers/clock_control.h> #include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/esp32_clock_control.h> #include <zephyr/drivers/clock_control/esp32_clock_control.h>
@ -658,22 +660,29 @@ static int clock_control_esp32_init(const struct device *dev)
{ {
const struct esp32_clock_config *cfg = dev->config; const struct esp32_clock_config *cfg = dev->config;
bool ret; bool ret;
#if !defined(CONFIG_SOC_SERIES_ESP32C6)
soc_reset_reason_t rst_reas; soc_reset_reason_t rst_reas;
rtc_config_t rtc_cfg = RTC_CONFIG_DEFAULT();
rst_reas = esp_rom_get_reset_reason(0); rst_reas = esp_rom_get_reset_reason(0);
#if defined(CONFIG_SOC_SERIES_ESP32C6)
pmu_init();
if (rst_reas == RESET_REASON_CHIP_POWER_ON) {
esp_ocode_calib_init();
}
#else /* CONFIG_SOC_SERIES_ESP32C6 */
rtc_config_t rtc_cfg = RTC_CONFIG_DEFAULT();
#if !defined(CONFIG_SOC_SERIES_ESP32) #if !defined(CONFIG_SOC_SERIES_ESP32)
if (rst_reas == RESET_REASON_CHIP_POWER_ON if (rst_reas == RESET_REASON_CHIP_POWER_ON
#if SOC_EFUSE_HAS_EFUSE_RST_BUG #if SOC_EFUSE_HAS_EFUSE_RST_BUG
|| rst_reas == RESET_REASON_CORE_EFUSE_CRC || rst_reas == RESET_REASON_CORE_EFUSE_CRC
#endif #endif /* SOC_EFUSE_HAS_EFUSE_RST_BUG */
) { ) {
rtc_cfg.cali_ocode = 1; rtc_cfg.cali_ocode = 1;
} }
#endif #endif /* !CONFIG_SOC_SERIES_ESP32 */
rtc_init(rtc_cfg); rtc_init(rtc_cfg);
#endif #endif /* CONFIG_SOC_SERIES_ESP32C6 */
ret = esp32_cpu_clock_configure(&cfg->cpu); ret = esp32_cpu_clock_configure(&cfg->cpu);
if (ret) { if (ret) {

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@ -27,10 +27,27 @@
compatible = "espressif,riscv"; compatible = "espressif,riscv";
riscv,isa = "rv32imac_zicsr"; riscv,isa = "rv32imac_zicsr";
reg = <0>; reg = <0>;
cpu-power-states = <&light_sleep &deep_sleep>;
clock-source = <ESP32_CPU_CLK_SRC_PLL>; clock-source = <ESP32_CPU_CLK_SRC_PLL>;
clock-frequency = <DT_FREQ_M(160)>; clock-frequency = <DT_FREQ_M(160)>;
xtal-freq = <DT_FREQ_M(40)>; xtal-freq = <DT_FREQ_M(40)>;
}; };
power-states {
light_sleep: light_sleep {
compatible = "zephyr,power-state";
power-state-name = "standby";
min-residency-us = <200>;
exit-latency-us = <60>;
};
deep_sleep: deep_sleep {
compatible = "zephyr,power-state";
power-state-name = "soft-off";
min-residency-us = <2000>;
exit-latency-us = <212>;
};
};
}; };
pinctrl: pin-controller { pinctrl: pin-controller {
@ -66,14 +83,13 @@
status = "okay"; status = "okay";
}; };
rtc: rtc@600b000 { rtc: rtc@600b0000 {
compatible = "espressif,esp32-rtc"; compatible = "espressif,esp32-rtc";
reg = <0x600B000 DT_SIZE_K(1)>; reg = <0x600B0000 DT_SIZE_K(1)>;
fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>; fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>;
slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>; slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>;
#clock-cells = <1>; #clock-cells = <1>;
status = "okay"; status = "okay";
}; };
rtc_timer: rtc_timer@600b0c00 { rtc_timer: rtc_timer@600b0c00 {

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@ -14,6 +14,8 @@ config SOC_SERIES_ESP32C6
select RISCV_ISA_EXT_ZICSR select RISCV_ISA_EXT_ZICSR
select HAS_ESPRESSIF_HAL select HAS_ESPRESSIF_HAL
select XIP if !MCUBOOT select XIP if !MCUBOOT
select HAS_PM
select HAS_POWEROFF
if SOC_SERIES_ESP32C6 if SOC_SERIES_ESP32C6

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@ -0,0 +1,44 @@
/*
* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/pm/pm.h>
#include <zephyr/irq.h>
#include <esp_sleep.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
/* Invoke Low Power/System Off specific Tasks */
void pm_state_set(enum pm_state state, uint8_t substate_id)
{
ARG_UNUSED(substate_id);
switch (state) {
case PM_STATE_STANDBY:
/* Nothing to do. */
break;
default:
LOG_DBG("Unsupported power state %u", state);
break;
}
}
/* Handle SOC specific activity after Low Power Mode Exit */
void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
{
ARG_UNUSED(substate_id);
switch (state) {
case PM_STATE_STANDBY:
irq_unlock(MSTATUS_IEN);
__asm__ volatile("wfi");
esp_light_sleep_start();
break;
default:
LOG_DBG("Unsupported power state %u", state);
break;
}
}

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@ -0,0 +1,15 @@
/*
* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/sys/poweroff.h>
#include <esp_sleep.h>
void z_sys_poweroff(void)
{
/* Forces RTC domain to be always on */
esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);
esp_deep_sleep_start();
}