driver: flash: Add Set/ Get write protect function
Add Set_WP function to set SPI flash WP line to low Add Get_WP function to obtain status of the SPI flash WP line Signed-off-by: Benson Huang <benson7633769@gmail.com>
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parent
42aef1be54
commit
3e8ec3aaf2
3 changed files with 41 additions and 6 deletions
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@ -427,9 +427,36 @@ static int flash_read_sr2(const struct device *dev, uint8_t *val)
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}
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#endif
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#ifdef CONFIG_FLASH_EX_OP_ENABLED
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static int flash_set_wp(const struct device *dev, uint8_t *val)
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{
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const struct flash_rts5912_dev_config *config = dev->config;
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volatile struct reg_spic_reg *spic_reg = config->regs;
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if (!val) {
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return -EINVAL;
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}
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if (*val) {
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spic_reg->CTRLR2 |= SPIC_CTRLR2_WPN_SET;
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}
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return 0;
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}
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static int flash_get_wp(const struct device *dev, uint8_t *val)
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{
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const struct flash_rts5912_dev_config *config = dev->config;
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volatile struct reg_spic_reg *spic_reg = config->regs;
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*val = (uint8_t)(spic_reg->CTRLR2 & SPIC_CTRLR2_WPN_SET);
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return 0;
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}
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#endif
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static int flash_wait_till_ready(const struct device *dev)
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{
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int ret;
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int timeout = TIMEOUT_SPIBUSY;
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uint8_t sr = 0;
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@ -437,10 +464,7 @@ static int flash_wait_till_ready(const struct device *dev)
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* while a program page requires about 40 cycles.
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*/
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do {
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ret = flash_read_sr(dev, &sr);
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if (ret < 0) {
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return ret;
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}
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flash_read_sr(dev, &sr);
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if (!(sr & SPI_NOR_WIP_BIT)) {
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return 0;
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}
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@ -751,6 +775,12 @@ static int flash_rts5912_ex_op(const struct device *dev, uint16_t opcode, const
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case FLASH_RTS5912_EX_OP_RD_SR2:
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ret = flash_read_sr2(dev, (uint8_t *)in);
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break;
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case FLASH_RTS5912_EX_OP_SET_WP:
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ret = flash_set_wp(dev, (uint8_t *)out);
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break;
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case FLASH_RTS5912_EX_OP_GET_WP:
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ret = flash_get_wp(dev, (uint8_t *)in);
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break;
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}
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k_sem_give(&dev_data->sem);
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@ -13,6 +13,8 @@ enum flash_rts5912_ex_ops {
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FLASH_RTS5912_EX_OP_WR_SR2,
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FLASH_RTS5912_EX_OP_RD_SR,
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FLASH_RTS5912_EX_OP_RD_SR2,
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FLASH_RTS5912_EX_OP_SET_WP,
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FLASH_RTS5912_EX_OP_GET_WP,
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};
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#endif /* __ZEPHYR_INCLUDE_DRIVERS_RTS5912_FLASH_API_EX_H__ */
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@ -37,7 +37,8 @@ struct reg_spic_reg {
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uint16_t HALF;
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uint32_t WORD;
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} DR;
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const uint32_t RESERVED2[44];
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const uint32_t RESERVED2[43];
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uint32_t CTRLR2;
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uint32_t FBAUD;
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uint32_t USERLENGTH;
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const uint32_t RESERVED3[3];
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@ -107,6 +108,8 @@ struct reg_spic_reg {
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#define SPIC_RISR_FSEIR BIT(5UL)
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#define SPIC_RISR_USEIR BIT(9UL)
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#define SPIC_RISR_TFSIR BIT(10UL)
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/* CTRLR2 */
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#define SPIC_CTRLR2_WPN_SET BIT(1UL)
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/* USERLENGTH */
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#define SPIC_USERLENGTH_RDDUMMYLEN_Pos (0UL)
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#define SPIC_USERLENGTH_RDDUMMYLEN_Msk GENMASK(11, 0)
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