drivers: serial: pl011: Remove busy wait in Ambiq UART initiate
Ambiq UART requires specific busy wait during initialization for propagating powering control registers, original k_busy_wait() used here generated a dead loop because k_busy_wait() relays on timer, who's driver is initialized after UART(UART init in PRE_KERNEL_1, timer init in PRE_KERNEL_2), replace k_busy_wait() with checking power status register is more suitable here. Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
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1 changed files with 8 additions and 4 deletions
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@ -50,9 +50,9 @@ static inline int clk_enable_ambiq_uart(const struct device *dev, uint32_t clk)
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return pl011_ambiq_clk_set(dev, clk);
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return pl011_ambiq_clk_set(dev, clk);
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}
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}
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/* Problem: writes to pwrcfg reg take at most PWCTRL_MAX_WAIT_US time to propagate.
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/* Problem: writes to power configure register takes some time to take effective.
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* Solution: busy wait for PWCTRL_MAX_WAIT_US microseconds to ensure that register
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* Solution: Check device's power status to ensure that register has taken effective.
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* writes have propagated.
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* Note: busy wait is not allowed to use here due to UART is initiated before timer starts.
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*/
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*/
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#define QUIRK_AMBIQ_UART_DEFINE(n) \
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#define QUIRK_AMBIQ_UART_DEFINE(n) \
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@ -60,8 +60,12 @@ static inline int clk_enable_ambiq_uart(const struct device *dev, uint32_t clk)
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{ \
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{ \
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uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
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uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
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DT_INST_PHA(n, ambiq_pwrcfg, offset); \
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DT_INST_PHA(n, ambiq_pwrcfg, offset); \
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uint32_t pwr_status_addr = addr + 4; \
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sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
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sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
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k_busy_wait(PWRCTRL_MAX_WAIT_US); \
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while ((sys_read32(pwr_status_addr) & DT_INST_PHA(n, ambiq_pwrcfg, mask)) != \
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DT_INST_PHA(n, ambiq_pwrcfg, mask)) { \
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arch_nop(); \
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}; \
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return 0; \
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return 0; \
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}
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}
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