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arch: arm64: basic synchronization barriers

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Add __DSB system wide berrier.
Move the barrier macros to inline function header.

TODO: add more granular oneway barriers.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
This commit is contained in:
Sandeep Tripathy 2020-04-27 21:06:42 +05:30 • committed by Andrew Boie
commit 3dface77ae
2 changed files with 15 additions and 3 deletions
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15
include/arch/arm/aarch64/asm_inline_gcc.h
View file

@ -23,6 +23,21 @@
extern "C" {
#endif
static ALWAYS_INLINE void __DSB(void)
{
__asm__ volatile ("dsb sy" : : : "memory");
}
static ALWAYS_INLINE void __DMB(void)
{
__asm__ volatile ("dmb sy" : : : "memory");
}
static ALWAYS_INLINE void __ISB(void)
{
__asm__ volatile ("isb" : : : "memory");
}
static ALWAYS_INLINE unsigned int arch_irq_lock(void)
{
unsigned int key;

3
include/arch/arm/aarch64/cpu.h
View file

@ -106,9 +106,6 @@
#endif /* !_ASMLANGUAGE */
#define __ISB() __asm__ volatile ("isb sy" : : : "memory")
#define __DMB() __asm__ volatile ("dmb sy" : : : "memory")
#define MODE_EL_SHIFT (0x2)
#define MODE_EL_MASK (0x3)