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arm: Fix assembler layout.

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Adjust the layout of various ARM assember files to conform to the norm
used in the majority of files.

Change-Id: Ia5007628be5ad36ef587946861c6ea90a8062585
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
This commit is contained in:
Marcus Shawcroft 2016-12-31 13:03:53 +00:00 • committed by Kumar Gala
commit 3de84ae88e
3 changed files with 69 additions and 65 deletions
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4
arch/arm/core/cpu_idle.S
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@ -170,8 +170,8 @@ SECTION_FUNC(TEXT, k_cpu_atomic_idle)
#endif #endif
/* /*
* Lock PRIMASK while sleeping: wfe will still get interrupted by incoming * Lock PRIMASK while sleeping: wfe will still get interrupted by
* interrupts but the CPU will not service them right away. * incoming interrupts but the CPU will not service them right away.
*/ */
cpsid i cpsid i

14
arch/arm/core/fault_s.S
View file

@ -76,7 +76,9 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__reserved)
/* force unlock interrupts */ /* force unlock interrupts */
cpsie i cpsie i
/* Use EXC_RETURN state to find out if stack frame is on the MSP or PSP */ /* Use EXC_RETURN state to find out if stack frame is on the
* MSP or PSP
*/
ldr r0, =0x4 ldr r0, =0x4
mov r1, lr mov r1, lr
tst r1, r0 tst r1, r0
@ -98,10 +100,12 @@ _stack_frame_endif:
ands.w ip, #_SCS_ICSR_RETTOBASE ands.w ip, #_SCS_ICSR_RETTOBASE
ite eq /* is the RETTOBASE bit zero ? */ ite eq /* is the RETTOBASE bit zero ? */
mrseq r0, MSP /* if so, we're not returning to thread mode, thus this mrseq r0, MSP /* if so, we're not returning to thread mode,
* is a nested exception: the stack frame is on the MSP */ * thus this is a nested exception: the stack
mrsne r0, PSP /* if not, we are returning to thread mode, thus this is * frame is on the MSP */
* not a nested exception: the stack frame is on the PSP */ mrsne r0, PSP /* if not, we are returning to thread mode, thus
* this is not a nested exception: the stack
* frame is on the PSP */
#endif /* CONFIG_CPU_CORTEX_M0_M0PLUS */ #endif /* CONFIG_CPU_CORTEX_M0_M0PLUS */
push {lr} push {lr}