x86: implement user mode on 64-bit
- In early boot, enable the syscall instruction and set up necessary MSRs - Add a hook to update page tables on context switch - Properly initialize thread based on whether it will start in user or supervisor mode - Add landing function for system calls to execute the desired handler - Implement arch_user_string_nlen() - Implement logic for dropping a thread down to user mode - Reserve per-CPU storage space for user and privilege elevation stack pointers, necessary for handling syscalls when no free registers are available - Proper handling of gs register considerations when transitioning privilege levels Kernel page table isolation (KPTI) is not yet implemented. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie
Anas Nashif
parent
07c278382a
commit
3d80208025
10 changed files with 406 additions and 15 deletions
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@ -17,14 +17,14 @@ config CPU_ATOM
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bool
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select CPU_HAS_FPU
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select ARCH_HAS_STACK_PROTECTION if X86_MMU
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select ARCH_HAS_USERSPACE if X86_MMU && !X86_64
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select ARCH_HAS_USERSPACE if X86_MMU
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help
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This option signifies the use of a CPU from the Atom family.
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config CPU_MINUTEIA
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bool
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select ARCH_HAS_STACK_PROTECTION if X86_MMU
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select ARCH_HAS_USERSPACE if X86_MMU && !X86_64
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select ARCH_HAS_USERSPACE if X86_MMU
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help
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This option signifies the use of a CPU from the Minute IA family.
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@ -32,7 +32,7 @@ config CPU_APOLLO_LAKE
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bool
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select CPU_HAS_FPU
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select ARCH_HAS_STACK_PROTECTION if X86_MMU
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select ARCH_HAS_USERSPACE if X86_MMU && !X86_64
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select ARCH_HAS_USERSPACE if X86_MMU
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help
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This option signifies the use of a CPU from the Apollo Lake family.
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@ -269,6 +269,7 @@ config X86_KPTI
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default y
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depends on USERSPACE
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depends on !X86_NO_MELTDOWN
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depends on !X86_64
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help
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Implements kernel page table isolation to mitigate Meltdown exploits
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to read Kernel RAM. Incurs a significant performance cost for
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@ -15,3 +15,5 @@ zephyr_library_sources(
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intel64/thread.c
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intel64/fatal.c
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)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE intel64/userspace.S)
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@ -24,3 +24,14 @@ void z_x86_exception(z_arch_esf_t *esf)
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CODE_UNREACHABLE;
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}
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}
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#ifdef CONFIG_USERSPACE
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void arch_syscall_oops(void *ssf_ptr)
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{
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struct x86_ssf *ssf = ssf_ptr;
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LOG_ERR("Bad system call from RIP 0x%lx", ssf->rip);
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z_x86_fatal_error(K_ERR_KERNEL_OOPS, NULL);
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}
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#endif /* CONFIG_USERSPACE */
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@ -115,9 +115,9 @@ go64: movl %cr4, %eax /* enable PAE and SSE */
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#endif
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movl %eax, %cr3
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movl $X86_EFER_MSR, %ecx /* enable long mode and no-execute */
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movl $X86_EFER_MSR, %ecx /* enable long mode, no-execute, syscall */
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rdmsr
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orl $(X86_EFER_MSR_LME | X86_EFER_MSR_NXE), %eax
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orl $(X86_EFER_MSR_LME | X86_EFER_MSR_NXE | X86_EFER_MSR_SCE), %eax
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wrmsr
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movl %cr0, %eax /* enable paging */
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@ -169,6 +169,30 @@ go64: movl %cr4, %eax /* enable PAE and SSE */
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call z_loapic_enable
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#endif
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#ifdef CONFIG_USERSPACE
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/* Set landing site for system calls made with 'syscall' instruction */
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movq $z_x86_syscall_entry_stub, %rax
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movq %rax, %rdx
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shrq $32, %rdx
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movl $X86_LSTAR_MSR, %ecx
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/* LSTAR set to 64-bit address denoted by EDX:EAX */
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wrmsr
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/* Set segment descriptors in STAR */
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xorl %eax, %eax /* Zero low bits, reserved */
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movl $X86_STAR_UPPER, %edx
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movl $X86_STAR_MSR, %ecx
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wrmsr
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/* Set EFLAGS mask applied when making system calls. Currently we
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* mask interrupts and clear direction flag.
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*/
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movl $0x600, %eax
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xorl %edx, %edx
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movl $X86_FMASK_MSR, %ecx
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wrmsr
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#endif /* CONFIG_USERSPACE */
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/* don't replace CALL with JMP; honor the ABI stack alignment! */
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incl __x86_cpuboot_t_ready_OFFSET(%rbp)
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@ -222,7 +246,13 @@ z_x86_switch:
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movq %r13, _thread_offset_to_r13(%rsi)
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movq %r14, _thread_offset_to_r14(%rsi)
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movq %r15, _thread_offset_to_r15(%rsi)
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#ifdef CONFIG_USERSPACE
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/* We're always in supervisor mode if we get here, the other case
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* is when __resume is invoked from irq_dispatch
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*/
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movq $X86_KERNEL_CS, _thread_offset_to_cs(%rsi)
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movq $X86_KERNEL_DS, _thread_offset_to_ss(%rsi)
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#endif
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movq %gs:__x86_tss64_t_ist1_OFFSET, %rsp
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/* fall through to __resume */
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@ -234,10 +264,23 @@ z_x86_switch:
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*/
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__resume:
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#ifdef CONFIG_USERSPACE
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pushq %rdi /* Caller-saved, stash it */
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call z_x86_swap_update_page_tables
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popq %rdi
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/* Set up exception return stack frame */
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pushq _thread_offset_to_ss(%rdi) /* SS */
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#else
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pushq $X86_KERNEL_DS /* SS */
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#endif
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pushq _thread_offset_to_rsp(%rdi) /* RSP */
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pushq _thread_offset_to_rflags(%rdi) /* RFLAGS */
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#ifdef CONFIG_USERSPACE
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pushq _thread_offset_to_cs(%rdi) /* CS */
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#else
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pushq $X86_KERNEL_CS /* CS */
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#endif
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pushq _thread_offset_to_rip(%rdi) /* RIP */
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movq _thread_offset_to_rbx(%rdi), %rbx
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@ -261,6 +304,13 @@ __resume:
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movq _thread_offset_to_r11(%rdi), %r11
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movq _thread_offset_to_rdi(%rdi), %rdi /* do last :-) */
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#ifdef CONFIG_USERSPACE
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/* Swap GS register values if we are returning to user mode */
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testb $0x3, 8(%rsp)
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jz 1f
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swapgs
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#endif /* CONFIG_USERSPACE */
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1: iretq
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@ -273,7 +323,13 @@ except: /*
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* finish struct NANO_ESF on stack. 'vector' .. 'ss' are
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* already there from hardware trap and EXCEPT_*() stub.
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*/
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#ifdef CONFIG_USERSPACE
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/* Swap GS register values if we came in from user mode */
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testb $0x3, 24(%rsp)
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jz 1f
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swapgs
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1:
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#endif /* CONFIG_USERSPACE */
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pushq %r15
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subq $X86_FXSAVE_SIZE, %rsp
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fxsave (%rsp)
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@ -323,6 +379,15 @@ except: /*
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/* Drop the vector/err code pushed by the HW or EXCEPT_*() stub */
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add $16, %rsp
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#ifdef CONFIG_USERSPACE
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/* Swap GS register values if we are returning to user mode */
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testb $0x3, 8(%rsp)
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jz 1f
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cli
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swapgs
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1:
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#endif /* CONFIG_USERSPACE */
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iretq
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EXCEPT ( 0); EXCEPT ( 1); EXCEPT ( 2); EXCEPT ( 3)
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@ -356,6 +421,13 @@ EXCEPT(Z_X86_OOPS_VECTOR);
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.globl x86_irq_args /* .. for these definitions */
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irq:
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#ifdef CONFIG_USERSPACE
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/* Swap GS register values if we came in from user mode */
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testb $0x3, 16(%rsp)
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jz 1f
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swapgs
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1:
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#endif /* CONFIG_USERSPACE */
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pushq %rsi
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movq %gs:__x86_tss64_t_cpu_OFFSET, %rsi
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@ -422,12 +494,18 @@ irq_enter_unnested: /* Not nested: dump state to thread struct for __resume */
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popq %rcx /* vector number */
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popq %rax /* RIP */
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movq %rax, _thread_offset_to_rip(%rsi)
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popq %rax /* CS: discard */
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popq %rax /* CS */
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#ifdef CONFIG_USERSPACE
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movq %rax, _thread_offset_to_cs(%rsi)
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#endif
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popq %rax /* RFLAGS */
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movq %rax, _thread_offset_to_rflags(%rsi)
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popq %rax /* RSP */
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movq %rax, _thread_offset_to_rsp(%rsi)
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popq %rax /* SS: discard */
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popq %rax /* SS */
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#ifdef CONFIG_USERSPACE
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movq %rax, _thread_offset_to_ss(%rsi)
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#endif
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irq_dispatch:
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movq x86_irq_funcs(,%rcx,8), %rbx
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@ -15,27 +15,36 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
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void *parameter1, void *parameter2, void *parameter3,
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int priority, unsigned int options)
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{
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#if defined(CONFIG_X86_USERSPACE) || defined(CONFIG_X86_STACK_PROTECTION)
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struct z_x86_thread_stack_header *header =
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(struct z_x86_thread_stack_header *)stack;
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#endif
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void *switch_entry;
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Z_ASSERT_VALID_PRIO(priority, entry);
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z_new_thread_init(thread, Z_THREAD_STACK_BUFFER(stack),
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stack_size, priority, options);
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#if CONFIG_X86_STACK_PROTECTION
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struct z_x86_thread_stack_header *header =
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(struct z_x86_thread_stack_header *)stack;
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/* Set guard area to read-only to catch stack overflows */
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z_x86_mmu_set_flags(&z_x86_kernel_ptables, &header->guard_page,
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MMU_PAGE_SIZE, MMU_ENTRY_READ, Z_X86_MMU_RW,
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true);
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#endif
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#ifdef CONFIG_USERSPACE
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switch_entry = z_x86_userspace_prepare_thread(thread);
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thread->arch.cs = X86_KERNEL_CS;
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thread->arch.ss = X86_KERNEL_DS;
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#else
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switch_entry = z_thread_entry;
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#endif
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thread->callee_saved.rsp = (long) Z_THREAD_STACK_BUFFER(stack);
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thread->callee_saved.rsp += (stack_size - 8); /* fake RIP for ABI */
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thread->callee_saved.rip = (long) z_thread_entry;
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thread->callee_saved.rip = (long) switch_entry;
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thread->callee_saved.rflags = EFLAGS_INITIAL;
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/* Parameters to entry point, which is populated in
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* thread->callee_saved.rip
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*/
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thread->arch.rdi = (long) entry;
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thread->arch.rsi = (long) parameter1;
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thread->arch.rdx = (long) parameter2;
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234
arch/x86/core/intel64/userspace.S
Normal file
234
arch/x86/core/intel64/userspace.S
Normal file
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@ -0,0 +1,234 @@
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/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arch/cpu.h>
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#include <offsets_short.h>
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#include <syscall.h>
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/* Landing site for 'syscall' instruction
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*
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* Call id is in RAX
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* Arguments are in RDI, RSI, RDX, R10, R8, R9
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* Return address stored by CPU in RCX
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* User RFLAGS store by CPU in R11
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* Current RFLAGS has been masked with ~X86_FMASK_MSR
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*/
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.global z_x86_syscall_entry_stub
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z_x86_syscall_entry_stub:
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swapgs
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/* Switch to the privilege mode stack pointer stored in
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* x86_tss64.psp and store the user mode stack pointer in
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* x86_tss64.usp, immediately pushing it once the stack switch
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* is done since this is a per-cpu and not per-thread area.
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*
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* This dance is necessary as upon entry we have no free registers
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* nor a stack we can push to.
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*/
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movq %rsp, %gs:__x86_tss64_t_usp_OFFSET
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movq %gs:__x86_tss64_t_psp_OFFSET, %rsp
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pushq %gs:__x86_tss64_t_usp_OFFSET
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sti /* re-enable interrupts */
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/* call_id is in RAX. bounds-check it, must be less than
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* K_SYSCALL_LIMIT.
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*/
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cmp $K_SYSCALL_LIMIT, %rax
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jae _bad_syscall
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_id_ok:
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#ifdef CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION
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/* Prevent speculation with bogus system call IDs */
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lfence
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#endif
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/* Remaining registers not involved in the syscall operation are
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* RBX, RBP, R12-R15, plus floating point / SIMD registers.
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*
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* We save caller-saved registers so we can restore to original values
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* when we call 'sysretq' at the end.
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*/
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pushq %rdi
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subq $X86_FXSAVE_SIZE, %rsp
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fxsave (%rsp)
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pushq %rsi
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pushq %rdx
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pushq %r8
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pushq %r9
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pushq %r10
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pushq %r11 /* RFLAGS */
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pushq %rcx /* Return address stored by 'syscall' */
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pushq %rsp /* SSF parameter */
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/* All other args are in the right registers, except arg4 which
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* we had to put in r10 instead of RCX
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*/
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movq %r10, %rcx
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/* from the call ID in RAX, load R10 with the actual function pointer
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* to call by looking it up in the system call dispatch table
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*/
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xorq %r11, %r11
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movq _k_syscall_table(%r11, %rax, 8), %r10
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/* Run the marshal function, which is some entry in _k_syscall_table */
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call *%r10
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/* RAX now contains the return value
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*
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* Callee-saved registers are un-touched from original values per C
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* calling convention, but sensitive data may lurk in caller-saved regs
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* RDI, RSI, RDX, R8, R9, R10, XMM* after we have serviced the system
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* call. We saved them earlier, restore their original values when
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* the syscall was made. This also preserves these registers if they
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* were not used as arguments.
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*
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* We also can't have RCX and R11 clobbered as we need the original
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* values to successfully 'sysretq'.
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*/
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addq $8, %rsp /* Discard ssf */
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popq %rcx /* Restore return address for 'sysretq' */
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popq %r11 /* Restore RFLAGS for 'sysretq' */
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popq %r10
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popq %r9
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popq %r8
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popq %rdx
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popq %rsi
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fxrstor (%rsp)
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addq $X86_FXSAVE_SIZE, %rsp
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popq %rdi
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/* Restore user stack pointer */
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popq %rsp
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/* Return to user mode, locking interrupts as the normal interrupt
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* handling path will get very confused if it occurs between
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* 'swapgs' and 'sysretq'
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*/
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cli
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swapgs
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sysretq
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_bad_syscall:
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/* RAX had a bogus syscall value in it, replace with the bad syscall
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* handler's ID, and put the bad ID as its first argument.
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*
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* TODO: On this and all other arches, simply immediately return
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* with -ENOSYS, once all syscalls have a return value
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*/
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movq %rax, %rdi
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movq $K_SYSCALL_BAD, %rax
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jmp _id_ok
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/*
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* size_t arch_user_string_nlen(const char *s, size_t maxsize, int *err_arg)
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* ^ RDI ^ RSI ^ RDX
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*/
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.global arch_user_string_nlen
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arch_user_string_nlen:
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/* Initial error value, strlen_done adjusts this if we succeed */
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movl $-1, %r8d
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/* use RAX as our length count (this function's return value) */
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xor %rax, %rax
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/* This code might page fault */
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strlen_loop:
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.global z_x86_user_string_nlen_fault_start
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z_x86_user_string_nlen_fault_start:
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cmpb $0x0, (%rdi, %rax, 1) /* *(RDI + RAX) == 0? Could fault. */
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.global z_x86_user_string_nlen_fault_end
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z_x86_user_string_nlen_fault_end:
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je strlen_done
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cmp %rsi, %rax /* Max length reached? */
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je strlen_done
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inc %rax /* EAX++ and loop again */
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jmp strlen_loop
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strlen_done:
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/* Set error value to 0 since we succeeded */
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xorl %r8d, %r8d
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.global z_x86_user_string_nlen_fixup
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z_x86_user_string_nlen_fixup:
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/* Write error value to 32-bit integer err pointer parameter */
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movl %r8d, (%rdx)
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retq
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/*
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* Trampoline function to put the p3 parameter in the register expected
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* by the calling convention, we couldn't use RCX when we called 'sysret'
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*/
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z_x86_userspace_landing_site:
|
||||
/* Place argument 4 in the correct position */
|
||||
movq %r10, %rcx
|
||||
call z_thread_entry
|
||||
|
||||
/* FUNC_NORETURN void z_x86_userspace_enter(
|
||||
* k_thread_entry_t user_entry, <- RDI
|
||||
* void *p1, void *p2, void *p3, <- RSI, RDX, RCX
|
||||
* uintptr_t stack_end, <- R8
|
||||
* uintptr_t stack_start) <- R9
|
||||
*
|
||||
* A one-way trip to userspace.
|
||||
*/
|
||||
.global z_x86_userspace_enter
|
||||
z_x86_userspace_enter:
|
||||
/* RCX is sysret return address, pass along p3 in r10,
|
||||
* z_x86_userspace_landing_site will fix this up
|
||||
*/
|
||||
movq %rcx, %r10
|
||||
|
||||
/* switch to privilege mode stack so we can erase thread stack buffer,
|
||||
* the buffer is the page immediately before the thread stack
|
||||
*/
|
||||
movq %r9, %rsp
|
||||
|
||||
/* Need RDI temporarily */
|
||||
pushq %rdi
|
||||
|
||||
/* Compute size of user stack in 8-byte chunks and put in RCX */
|
||||
movq %r9, %rdi /* Start address for rep stosq in RDI */
|
||||
movq %r8, %rcx /* Ending address */
|
||||
subq %rdi, %rcx /* Subtract starting address */
|
||||
shrq $3, %rcx /* Divide by 8 */
|
||||
|
||||
movq $0xAAAAAAAAAAAAAAAA, %rax /* Fill value */
|
||||
/* Copy 8 bytes of memory at a time, starting at ES:RDI, with whatever
|
||||
* is in RAX. Repeat this RCX times. Stack sizes are always at least
|
||||
* 8-byte aligned.
|
||||
*/
|
||||
cld
|
||||
rep stosq
|
||||
|
||||
popq %rdi
|
||||
|
||||
/* Reset to the beginning of the user stack */
|
||||
movq %r8, %rsp
|
||||
|
||||
/* set sysret entry point */
|
||||
movq $z_x86_userspace_landing_site, %rcx
|
||||
|
||||
/* Copy RFLAGS into r11, required by sysret */
|
||||
pushfq
|
||||
movq (%rsp), %r11
|
||||
movq $0, (%rsp) /* Now a debugger-friendly return address */
|
||||
|
||||
/* cleanse other registers */
|
||||
xorq %rax, %rax
|
||||
xorq %rbx, %rbx
|
||||
xorq %rbp, %rbp
|
||||
xorq %r12, %r12
|
||||
xorq %r13, %r13
|
||||
xorq %r14, %r14
|
||||
xorq %r15, %r15
|
||||
|
||||
cli
|
||||
swapgs
|
||||
sysretq
|
||||
|
|
@ -23,9 +23,17 @@ GEN_OFFSET_SYM(_thread_arch_t, r9);
|
|||
GEN_OFFSET_SYM(_thread_arch_t, r10);
|
||||
GEN_OFFSET_SYM(_thread_arch_t, r11);
|
||||
GEN_OFFSET_SYM(_thread_arch_t, sse);
|
||||
#ifdef CONFIG_USERSPACE
|
||||
GEN_OFFSET_SYM(_thread_arch_t, ss);
|
||||
GEN_OFFSET_SYM(_thread_arch_t, cs);
|
||||
#endif
|
||||
|
||||
GEN_OFFSET_SYM(x86_tss64_t, ist1);
|
||||
GEN_OFFSET_SYM(x86_tss64_t, cpu);
|
||||
#ifdef CONFIG_USERSPACE
|
||||
GEN_OFFSET_SYM(x86_tss64_t, psp);
|
||||
GEN_OFFSET_SYM(x86_tss64_t, usp);
|
||||
#endif
|
||||
GEN_ABSOLUTE_SYM(__X86_TSS64_SIZEOF, sizeof(x86_tss64_t));
|
||||
|
||||
GEN_OFFSET_SYM(x86_cpuboot_t, ready);
|
||||
|
|
|
|||
|
|
@ -65,4 +65,10 @@
|
|||
#define _thread_offset_to_sse \
|
||||
(___thread_t_arch_OFFSET + ___thread_arch_t_sse_OFFSET)
|
||||
|
||||
#define _thread_offset_to_ss \
|
||||
(___thread_t_arch_OFFSET + ___thread_arch_t_ss_OFFSET)
|
||||
|
||||
#define _thread_offset_to_cs \
|
||||
(___thread_t_arch_OFFSET + ___thread_arch_t_cs_OFFSET)
|
||||
|
||||
#endif /* ZEPHYR_ARCH_X86_INCLUDE_INTEL64_OFFSETS_SHORT_ARCH_H_ */
|
||||
|
|
|
|||
|
|
@ -59,6 +59,19 @@ struct x86_esf {
|
|||
|
||||
typedef struct x86_esf z_arch_esf_t;
|
||||
|
||||
struct x86_ssf {
|
||||
unsigned long rip;
|
||||
unsigned long rflags;
|
||||
unsigned long r10;
|
||||
unsigned long r9;
|
||||
unsigned long r8;
|
||||
unsigned long rdx;
|
||||
unsigned long rsi;
|
||||
char fxsave[X86_FXSAVE_SIZE];
|
||||
unsigned long rdi;
|
||||
unsigned long rsp;
|
||||
};
|
||||
|
||||
#define ARCH_EXCEPT(reason_p) do { \
|
||||
__asm__ volatile( \
|
||||
"movq %[reason], %%rax\n\t" \
|
||||
|
|
|
|||
|
|
@ -20,6 +20,11 @@
|
|||
#define X86_USER_DS 0x30 /* 64-bit user mode data */
|
||||
#define X86_USER_CS 0x38 /* 64-bit user mode code */
|
||||
|
||||
/* Value programmed into bits 63:32 of STAR MSR with proper segment
|
||||
* descriptors for implementing user mode with syscall/sysret
|
||||
*/
|
||||
#define X86_STAR_UPPER ((X86_USER_CS_32 << 16) | X86_KERNEL_CS)
|
||||
|
||||
#define X86_KERNEL_CPU0_TR 0x40 /* 64-bit task state segment */
|
||||
#define X86_KERNEL_CPU1_TR 0x50 /* 64-bit task state segment */
|
||||
#define X86_KERNEL_CPU2_TR 0x60 /* 64-bit task state segment */
|
||||
|
|
@ -73,6 +78,13 @@ struct x86_tss64 {
|
|||
*/
|
||||
|
||||
struct _cpu *cpu;
|
||||
#ifdef CONFIG_USERSPACE
|
||||
/* Privilege mode stack pointer value when doing a system call */
|
||||
char *psp;
|
||||
|
||||
/* Storage area for user mode stack pointer when doing a syscall */
|
||||
char *usp;
|
||||
#endif
|
||||
} __packed __aligned(8);
|
||||
|
||||
typedef struct x86_tss64 x86_tss64_t;
|
||||
|
|
@ -101,6 +113,23 @@ typedef struct _callee_saved _callee_saved_t;
|
|||
struct _thread_arch {
|
||||
u8_t flags;
|
||||
|
||||
#ifdef CONFIG_USERSPACE
|
||||
/* Pointer to page tables used by this thread. Supervisor threads
|
||||
* always use the kernel's page table, user thread use per-thread
|
||||
* tables stored in the stack object
|
||||
*/
|
||||
struct x86_page_tables *ptables;
|
||||
|
||||
/* Initial privilege mode stack pointer when doing a system call.
|
||||
* Un-set for supervisor threads.
|
||||
*/
|
||||
char *psp;
|
||||
|
||||
/* SS and CS selectors for this thread when restoring context */
|
||||
u64_t ss;
|
||||
u64_t cs;
|
||||
#endif
|
||||
|
||||
u64_t rax;
|
||||
u64_t rcx;
|
||||
u64_t rdx;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue