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soc: intel_adsp/ace30: do not map 0x0

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The MMU mapping in SoC covers 0x0 which prevents catching NULL
pointer accesses. Since there are no hardware registers at
the very first page of memory, we move the starting point one
page later.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2024-11-19 16:07:40 -08:00 • committed by Benjamin Cabé
commit 3d3ffa2c05
1 changed files with 1 additions and 1 deletions
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soc/intel/intel_adsp/ace/mmu_ace30.c
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@ -126,7 +126,7 @@ const struct xtensa_mmu_range xtensa_soc_mmu_ranges[] = {
}, },
{ {
/* FIXME: definitely need more refinements... */ /* FIXME: definitely need more refinements... */
.start = (uint32_t)0x0, .start = (uint32_t)0x1000,
.end = (uint32_t)0x100000, .end = (uint32_t)0x100000,
.attrs = XTENSA_MMU_PERM_W, .attrs = XTENSA_MMU_PERM_W,
.name = "hwreg0", .name = "hwreg0",