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boards: Add support for MEC1501 modular card ASSY 6885

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This was tested with the hello world application.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This commit is contained in:
Jose Alberto Meza 2019-08-12 13:35:13 -07:00 • committed by Anas Nashif
commit 3d0ae03570
9 changed files with 580 additions and 0 deletions
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boards/arm/mec1501modular_assy6885/CMakeLists.txt Normal file
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#
# Copyright (c) 2019 Microchip Technology Inc.
#
# SPDX-License-Identifier: Apache-2.0
#
zephyr_library()
zephyr_library_sources(pinmux.c)

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boards/arm/mec1501modular_assy6885/Kconfig.board Normal file
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#
# Copyright (c) 2019, Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
#
config BOARD_MEC1501MODULAR_ASSY6885
bool "Microchip MEC1501 Modular ASSY 6885 Development board"
depends on SOC_MEC1501_HSZ

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boards/arm/mec1501modular_assy6885/Kconfig.defconfig Normal file
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#
# Copyright (c) 2019 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
#
if BOARD_MEC1501MODULAR_ASSY6885
config BOARD
default "mec1501modular_assy6885"
if UART_NS16550
config UART_NS16550_PORT_1
def_bool y if UART_CONSOLE
endif
if PINMUX_XEC
config PINMUX_XEC_GPIO000_036
default y
config PINMUX_XEC_GPIO040_076
default y
config PINMUX_XEC_GPIO100_136
default y
config PINMUX_XEC_GPIO140_176
default y
config PINMUX_XEC_GPIO200_236
default n
config PINMUX_XEC_GPIO240_276
default n
endif # PINMUX_XEC
if GPIO_XEC
config GPIO_XEC_GPIO000_036
default y
config GPIO_XEC_GPIO040_076
default y
config GPIO_XEC_GPIO100_136
default y
config GPIO_XEC_GPIO140_176
default y
config GPIO_XEC_GPIO200_236
default y
config GPIO_XEC_GPIO240_276
default y
endif # GPIO_XEC
if I2C_XEC
config I2C_XEC_0
default y
config I2C_XEC_1
default y
config I2C_XEC_2
default n
endif # I2C
if ESPI
config ESPI_XEC
default y
endif # ESPI
if RTOS_TIMER
config MCHP_XEC_RTOS_TIMER
bool
default y
# XEC RTOS timer HW frequency is fixed at 32768
# The driver requires tickless mode and ticks per
# second to be 32768 for accurate operation.
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 32768
config SYS_CLOCK_TICKS_PER_SEC
default 32768
endif # RTOS_TIMER
if !RTOS_TIMER
config CORTEX_M_SYSTICK
default y
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 48000000
config SYS_CLOCK_TICKS_PER_SEC
default 1000
endif # RTOS_TIMER
endif # BOARD_MEC1501MODULAR_ASSY6885

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.. _mec1501modular_assy6885:
MEC1501 Modular card ASSY6885
#############################
Overview
********
The MEC1501 Modular card ASSY6885 is a development board to evaluate the Microchip
MEC15XX series microcontrollers. This board can work standalone or be mated with
any platform that complies with MECC specification.
.. image:: ./mec1501modular_assy6885.png
:width: 600px
:align: center
:alt: MEC1501 Modular ASSY 6885
Hardware
********
- MEC1501HB0SZ ARM Cortex-M4 Processor
- 256 KB RAM and 64 KB boot ROM
- GPIO headers
- UART1 using microUSB
- UART0 and UART2 exposed in headers
- FAN0, FAN1, FAN2 headers
- FAN PWM interface
- JTAG/SWD, ETM and MCHP Trace ports
- PECI interface 3.0
- I2C voltage translator
- 10 SMBUS headers
- 4 SGPIO headers
- VCI interface
- 5 independent Hardware Driven PS/2 Ports
- eSPI header
- 3 Breathing/Blinking LEDs
- 2 Sockets for SPI NOR chips
- One reset and VCC_PWRDGD pushbuttons
- One external PCA9555 I/O port with jumper selectable I2C address.
- One external LTC2489 delta-sigma ADC with jumper selectable I2C address.
- Board power jumper selectable from +5V 2.1mm/5.5mm barrel connector or USB Micro A connector.
For more information about the SOC please see the `MEC1501 Reference Manual`_
Supported Features
==================
The mec1501modular_assy6885 board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| ESPI | on-chip | espi |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by Zephyr (at the moment)
The default configuration can be found in the
:zephyr_file:`boards/arm/mec1501modular_assy6885/mec1501modular_assy6885`
Kconfig file.
Connections and IOs
===================
This evaluation board kit is comprised of the following HW blocks:
- MEC1501 Modular Card ASSY 6885 Rev A0 `MEC1501 Modular EC Card - Assy_6885 Rev A0p1`_
System Clock
============
The MEC1501 MCU is configured to use the 48Mhz internal oscillator with the
on-chip PLL to generate a resulting EC clock rate of 12 MHz. See Processor clock
control register in chapter 4 "4.0 POWER, CLOCKS, and RESETS" of the data sheet in
the references at the end of this document.
Serial Port
===========
UART1 is configured for serial logs.
Jumper settings
***************
Please follow the jumper settings below to properly demo this
board. Advanced users may deviate from this recommendation.
Jumper setting for MEC1501 Modular Assy 6885 Rev A1p0
=====================================================
Power-related jumpers
---------------------
If you wish to power from type A/B connector ``P10`` set the jumper ``JP35 1-2``.
If you wish to power through MECC connector ``P1`` and mate to external platform,
set the jumper to ``JP35 3-4``.
.. note:: A single jumper is required in JP35.
+------+------+------+------+------+------+------+
| JP30 | JP31 | JP32 | JP33 | JP34 | JP40 | JP21 |
+======+======+======+======+======+======+======+
| 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 |
+------+------+------+------+------+------+------+
+------+------+------+------+------+
| JP6 | JP21 | JP36 | JP27 | JP4 |
+======+======+======+======+======+
| 2-3 | 1-2 | 1-2 | 2-3 | open |
+------+------+------+------+------+
These jumpers configure nRESETI and JTAG_STRAP respectively.
+-----------+--------------+
| JP22 | JP29 |
| (nRESETI) | (JTAG_STRAP) |
+===========+==============+
| 11-12 | 1-2 |
+-----------+--------------+
Boot-ROM Straps.
----------------
These jumpers configure MEC1501 Boot-ROM straps.
+-------------+------------+--------------+-------------+
| JP37 | J6 | JP41 | JP23 |
| (CMP_STRAP) | (CR_STRAP) | (VTR2_STRAP) | (BSS_STRAP) |
+=============+============+==============+=============+
| 1-2 | 1-2 | 1-2 | 3-4 |
+-------------+------------+--------------+-------------+
``JP23 3-4`` pulls SHD SPI CS0# up to VTR2. MEC1501 Boot-ROM samples
SHD SPI CS0# and if high, it loads code from SHD SPI.
This is the recomended setup.
+-------------+------------+----------------------------+
| CR_STRAP | BSS_STRAP | SOURCE |
+-------------+------------+----------------------------+
| 0 | X | Use 3.3V Private SPI |
+-------------+------------+----------------------------+
| 1 | 0 | Use eSPI Flash channel |
+-------------+------------+----------------------------+
| | 1 | Use 3.3V Shared channel(R)|
+-------------+------------+----------------------------+
Jumper location map.
--------------------
.. code-block:: none
+--------------------------------------------------------------------------------------+
| |------------| +----------+ J10 || |
| [BT1] + +------------+ J50 ++ ++ || |
| | JP38 JP43 ++ || || |
| + + + +-+ JP4 + + JP26 || || |
| JP6 + + + + + + + + || || |
| JP31 ++ JP32 JP36 +-+ JP27 + + + + J6 || |
| JP18 JP37 JP41 JP42 ++ |
| ++ + + +--------+ J48 |
| || JP21 + + +--------+ JP22 +----------+ |
| J2 || + JP34 JP30 J11 ++ |
| ++ + J44 || |
| ++ +----------------+ || |
| +---------------+ || + JP24 |----------------| ++ |
| |---------------| ++ + +----------+ +----------------+ J47 |
| JP20 +---------------+ JP23 JP40 +----------+ ++ |
| + ++ JP29 || |
| + + +----------+ + || |
| J52+---------------+ + + +----------+ J5 +-------------+ ++ |
| J45+---------------+ JP33 TP57 JP25 +-------------+ J4 J49 |
| |
| ++ TP4 +----------+ ++ |
| ++ + + + + + + TP61 +----------+ ++ |
| JP28 + + + + + + TP60 J51 JP35 |
| TP58 JP16 JP11 JP13 JP15 JP10 |
| TP5 |
| TP6 TP1 |
+--------------------------------------------------------------------------------------+
Programming and Debugging
*************************
Building
==========
#. Build :ref:`hello_world` application as you would normally do.
#. Once you have ``zephyr.bin``, use the `SPI Image Gen`_ microchip tool
to create the final binary. You need the output from this tool to flash
in the SHD SPI memory.
Flashing
========
#. Connect Dediprog into header ``J2``.
#. Flash the SPI NOR ``U3`` at offset 0x0 using Dediprog SF100
or a similar tool for flashing SPI chips.
#. Run your favorite terminal program to listen for output. Under Linux the
terminal should be :code:`/dev/ttyACM0`. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0 -o
The -o option tells minicom not to send the modem initialization
string. Connection should be configured as follows:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
#. Connect the MEC1501MODULAR_ASSY6885 board to your host computer using the
UART1 port and apply power.
You should see ``"Hello World! mec1501modular_assy6885"`` in your terminal.
Debugging
=========
This board comes with a Cortex ETM port which facilitates tracing and debugging
using a single physical connection. In addition, it comes with sockets for
JTAG only sessions.
HW Issues
=========
In case you don't see your application running, please make sure ``LED1`` is lit.
If is off, then check the power related jumpers again.
References
**********
.. target-notes::
.. _MEC1501 Preliminary Data Sheet:
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501_Datasheet.pdf
.. _MEC1501 Reference Manual:
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501_Datasheet.pdf
.. _MEC1501 Modular EC Card - Assy_6885 Rev A0p1:
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501%20Modular%20EC%20Card%20-%20Assy_6885%20Rev%20A0p1%20-%20SCH.pdf
.. _SPI Image Gen:
https://github.com/MicrochipTech/CPGZephyrDocs/tree/master/MEC1501/SPI_image_gen

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boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.dts Normal file
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/*
* Copyright (c) 2018, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <microchip/mec1501hsz.dtsi>
/ {
model = "Microchip MEC1501MODULAR_ASSY6885 evaluation board";
compatible = "microchip,mec1501modular_assy6885",
"microchip,mec1501hsz";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart1;
zephyr,flash = &flash0;
};
};
&uart1 {
status = "okay";
current-speed = <115200>;
};
&i2c0 {
status = "okay";
port_sel = <0>;
};
&i2c1 {
status = "okay";
port_sel = <1>;
};
&i2c2 {
status = "okay";
port_sel = <7>;
};
&espi0 {
status = "okay";
agg_io_irq = <11>;
agg_vw_irq = <15>;
agg_pc_irq = <7>;
io_girq = <19>;
vw_girq = <24>;
pc_girq = <15>;
};

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boards/arm/mec1501modular_assy6885/mec1501modular_assy6885.yaml Normal file
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#
# Copyright (c) 2019, Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
#
identifier: mec1501modular_assy6885
name: MEC1501 MODULAR ASSY 6885
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 32
flash: 224
supported:
- gpio
- i2c
- pinmux
- espi

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boards/arm/mec1501modular_assy6885/mec1501modular_assy6885_defconfig Normal file
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#
# Copyright (c) 2019, Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
#
CONFIG_ARM=y
CONFIG_SOC_MEC1501_HSZ=y
CONFIG_SOC_SERIES_MEC1501X=y
CONFIG_BOARD_MEC1501MODULAR_ASSY6885=y
CONFIG_RTOS_TIMER=n
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_PINMUX=y
CONFIG_GPIO=y
CONFIG_I2C=y
CONFIG_I2C_INIT_PRIORITY=60
CONFIG_ESPI=y

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/*
* Copyright (c) 2019 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <device.h>
#include <init.h>
#include <kernel.h>
#include <drivers/pinmux.h>
#include "soc.h"
static int board_pinmux_init(struct device *dev)
{
ARG_UNUSED(dev);
#ifdef CONFIG_PINMUX_XEC_GPIO000_036
struct device *porta =
device_get_binding(CONFIG_PINMUX_XEC_GPIO000_036_NAME);
#endif
#ifdef CONFIG_PINMUX_XEC_GPIO040_076
struct device *portb =
device_get_binding(CONFIG_PINMUX_XEC_GPIO040_076_NAME);
#endif
#ifdef CONFIG_PINMUX_XEC_GPIO100_136
struct device *portc =
device_get_binding(CONFIG_PINMUX_XEC_GPIO100_136_NAME);
#endif
#ifdef CONFIG_PINMUX_XEC_GPIO140_176
struct device *portd =
device_get_binding(CONFIG_PINMUX_XEC_GPIO140_176_NAME);
#endif
#ifdef CONFIG_PINMUX_XEC_GPIO200_236
struct device *porte =
device_get_binding(CONFIG_PINMUX_XEC_GPIO200_236_NAME);
#endif
#ifdef CONFIG_PINMUX_XEC_GPIO240_276
struct device *portf =
device_get_binding(CONFIG_PINMUX_XEC_GPIO240_276_NAME);
#endif
/* Release JTAG TDI and JTAG TDO pins so they can be
* controlled by their respective PCR register (UART2).
* For more details see table 44-1
*/
ECS_REGS->DEBUG_CTRL = (MCHP_ECS_DCTRL_DBG_EN |
MCHP_ECS_DCTRL_MODE_SWD);
/* See table 2-4 from the data sheet for pin multiplexing*/
#ifdef CONFIG_UART_NS16550_PORT_1
/* Set muxing, for UART 1 TX/RX and power up */
mchp_pcr_periph_slp_ctrl(PCR_UART1, MCHP_PCR_SLEEP_DIS);
UART1_REGS->CFG_SEL = (MCHP_UART_LD_CFG_INTCLK +
MCHP_UART_LD_CFG_RESET_SYS + MCHP_UART_LD_CFG_NO_INVERT);
UART1_REGS->ACTV = MCHP_UART_LD_ACTIVATE;
pinmux_pin_set(portd, MCHP_GPIO_170, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portd, MCHP_GPIO_171, MCHP_GPIO_CTRL_MUX_F1);
#endif
#ifdef CONFIG_I2C_XEC_0
/* Set muxing, for I2C0 - SMB00 */
pinmux_pin_set(porta, MCHP_GPIO_003, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(porta, MCHP_GPIO_004, MCHP_GPIO_CTRL_MUX_F1);
#endif
#ifdef CONFIG_I2C_XEC_1
/* Set muxing for I2C1 - SMB01 */
pinmux_pin_set(portc, MCHP_GPIO_130, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portc, MCHP_GPIO_131, MCHP_GPIO_CTRL_MUX_F1);
#endif
#ifdef CONFIG_I2C_XEC_2
/* Set muxing, for I2C2 - SMB04 */
pinmux_pin_set(portd, MCHP_GPIO_143, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portd, MCHP_GPIO_144, MCHP_GPIO_CTRL_MUX_F1);
#endif
#ifdef CONFIG_ESPI_XEC
mchp_pcr_periph_slp_ctrl(PCR_ESPI, MCHP_PCR_SLEEP_DIS);
/* ESPI RESET */
pinmux_pin_set(portb, MCHP_GPIO_061, MCHP_GPIO_CTRL_MUX_F1);
/* ESPI ALERT */
pinmux_pin_set(portb, MCHP_GPIO_063, MCHP_GPIO_CTRL_MUX_F1);
/* ESPI CS */
pinmux_pin_set(portb, MCHP_GPIO_066, MCHP_GPIO_CTRL_MUX_F1);
/* ESPI CLK */
pinmux_pin_set(portb, MCHP_GPIO_065, MCHP_GPIO_CTRL_MUX_F1);
/* ESPI IO1-4*/
pinmux_pin_set(portb, MCHP_GPIO_070, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portb, MCHP_GPIO_071, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portb, MCHP_GPIO_072, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portb, MCHP_GPIO_073, MCHP_GPIO_CTRL_MUX_F1);
#endif
return 0;
}
SYS_INIT(board_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY);