unified/arc: add memory pools support for ARC architecture
ARC does not align data structures by 4 bytes by default. Add necessary linker sections. Change-Id: I3bf7aa38b9bc8cba56f824469040c027968fa564 Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This commit is contained in:
parent
909bfffda9
commit
3c90651fd8
2 changed files with 13 additions and 0 deletions
|
@ -1665,6 +1665,7 @@ __asm__(".macro __do_recurse macro_name, name, n_max\n\t"
|
|||
* __memory_pool_quad_block_size - sizeof(struct k_mem_pool_quad_block)
|
||||
*/
|
||||
__asm__(".macro _build_quad_blocks n_max, name\n\t"
|
||||
".balign 4\n\t"
|
||||
"_mem_pool_quad_blocks_\\name\\()_\\n_max:\n\t"
|
||||
".skip __memory_pool_quad_block_size * \\n_max >> 2\n\t"
|
||||
".if \\n_max % 4\n\t\t"
|
||||
|
@ -1735,6 +1736,7 @@ __asm__(".macro _build_mem_pool name, min_size, max_size, n_max\n\t"
|
|||
__asm__("__memory_pool_max_block_size = " STRINGIFY(max_size) "\n\t"); \
|
||||
__asm__(".pushsection ._k_memory_pool.struct,\"aw\"," \
|
||||
_SECTION_TYPE_SIGN "progbits\n\t"); \
|
||||
__asm__(".balign 4\n\t"); \
|
||||
__asm__("_mem_pool_block_sets_" STRINGIFY(name) ":\n\t"); \
|
||||
__asm__("_build_block_set " STRINGIFY(n_max) " " \
|
||||
STRINGIFY(name) "\n\t"); \
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue