dts/arm/microchip: Mark uart & i2c nodes as disabled by default
Have the SoC dtsi files for microchip mark the devices (uart & i2c) as disabled by default and let the board dts files enable which one's they need/use (which is what's happening already). Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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39425eaada
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3c8f8cb256
4 changed files with 25 additions and 3 deletions
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@ -37,6 +37,7 @@
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current-speed = <38400>;
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label = "UART_0";
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reg-shift = <0>;
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status = "disabled";
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};
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uart1: uart@400f2800 {
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compatible = "ns16550";
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@ -45,6 +46,7 @@
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current-speed = <38400>;
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label = "UART_1";
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reg-shift = <0>;
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status = "disabled";
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};
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uart2: uart@400f2c00 {
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compatible = "ns16550";
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@ -53,6 +55,7 @@
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current-speed = <38400>;
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label = "UART_2";
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reg-shift = <0>;
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status = "disabled";
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};
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gpioa: gpio@40081000 {
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compatible = "microchip,xec-gpio";
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@ -109,6 +112,7 @@
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label = "I2C_0";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@40004400 {
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compatible = "microchip,xec-i2c";
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@ -117,6 +121,7 @@
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label = "I2C_1";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@40004800 {
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compatible = "microchip,xec-i2c";
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@ -125,6 +130,7 @@
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label = "I2C_2";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c3: i2c@40004c00 {
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compatible = "microchip,xec-i2c";
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@ -133,6 +139,7 @@
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label = "I2C_3";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c4: i2c@40005000 {
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compatible = "microchip,xec-i2c";
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@ -141,6 +148,7 @@
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label = "I2C_4";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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};
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@ -35,6 +35,7 @@
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current-speed = <38400>;
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label = "UART_0";
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reg-shift = <0>;
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status = "disabled";
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};
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uart1: uart@400f2800 {
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compatible = "ns16550";
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@ -43,6 +44,7 @@
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current-speed = <38400>;
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label = "UART_1";
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reg-shift = <0>;
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status = "disabled";
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};
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};
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};
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@ -13,8 +13,14 @@
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#define DT_NUM_IRQ_PRIO_BITS \
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DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_NS16550_REG_SHIFT \
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DT_NS16550_400F2400_REG_SHIFT
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#if defined(DT_NS16550_400F2400_REG_SHIFT)
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#define DT_NS16550_REG_SHIFT DT_NS16550_400F2400_REG_SHIFT
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#elif defined(DT_NS16550_400F2800_REG_SHIFT)
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#define DT_NS16550_REG_SHIFT DT_NS16550_400F2800_REG_SHIFT
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#elif defined(DT_NS16550_400F2C00_REG_SHIFT)
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#define DT_NS16550_REG_SHIFT DT_NS16550_400F2C00_REG_SHIFT
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#endif
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#define DT_UART_NS16550_PORT_0_BASE_ADDR \
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DT_NS16550_400F2400_BASE_ADDRESS
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#define DT_UART_NS16550_PORT_0_CLK_FREQ 1843200
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@ -8,7 +8,13 @@
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_NS16550_REG_SHIFT DT_NS16550_400F2400_REG_SHIFT
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#if defined(DT_NS16550_400F2400_REG_SHIFT)
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#define DT_NS16550_REG_SHIFT DT_NS16550_400F2400_REG_SHIFT
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#elif defined(DT_NS16550_400F2800_REG_SHIFT)
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#define DT_NS16550_REG_SHIFT DT_NS16550_400F2800_REG_SHIFT
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#endif
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#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_400F2400_BASE_ADDRESS
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#define DT_UART_NS16550_PORT_0_CLK_FREQ 1843200
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#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_400F2400_LABEL
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