arch/x86: refactor APIC timer configuration to SoC level
The APIC is part of the SoC, not the board, so move the defaults down. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
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3 changed files with 22 additions and 23 deletions
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@ -13,8 +13,27 @@ config SOC
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default "apollo_lake"
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 150000000 if LOAPIC_TIMER
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default 25000000 if HPET_TIMER
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default 19200000
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if APIC_TIMER
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config APIC_TIMER_IRQ
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default 24
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config APIC_TIMER_TSC
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default y
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if APIC_TIMER_TSC
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config APIC_TIMER_TSC_M
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default 3
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config APIC_TIMER_TSC_N
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default 249
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endif # APIC_TIMER_TSC
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endif # APIC_TIMER
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config CLFLUSH_DETECT
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default y if CACHE_FLUSHING
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