checkpatch: error - switch_case_indent_level

Change-Id: I9cbd6ab80b0c0f170626bb1c6b2d07498038fb8f
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
This commit is contained in:
Dan Kalowsky 2015-10-14 13:29:17 -07:00 committed by Anas Nashif
commit 3bc4039601
6 changed files with 220 additions and 220 deletions

View file

@ -559,63 +559,63 @@ uint8_t _galileo_set_pin(struct device *port, uint8_t pin, uint8_t func)
for (i = 0; i < 5; i++) { for (i = 0; i < 5; i++) {
switch(enable->path[i].mux) { switch(enable->path[i].mux) {
case EXP0: case EXP0:
gpio_pin_write(drv_data->exp0, gpio_pin_write(drv_data->exp0,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].level); enable->path[i].level);
gpio_pin_configure(drv_data->exp0, gpio_pin_configure(drv_data->exp0,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].cfg); enable->path[i].cfg);
break; break;
case EXP1: case EXP1:
gpio_pin_write(drv_data->exp1, gpio_pin_write(drv_data->exp1,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].level); enable->path[i].level);
gpio_pin_configure(drv_data->exp1, gpio_pin_configure(drv_data->exp1,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].cfg); enable->path[i].cfg);
break; break;
case EXP2: case EXP2:
gpio_pin_write(drv_data->exp2, gpio_pin_write(drv_data->exp2,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].level); enable->path[i].level);
gpio_pin_configure(drv_data->exp2, gpio_pin_configure(drv_data->exp2,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].cfg); enable->path[i].cfg);
break; break;
case PWM0: case PWM0:
pwm_pin_set_duty_cycle(drv_data->pwm0, pwm_pin_set_duty_cycle(drv_data->pwm0,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].level ? 100 : 0); enable->path[i].level ? 100 : 0);
break; break;
case G_DW: case G_DW:
gpio_pin_write(drv_data->gpio_dw, gpio_pin_write(drv_data->gpio_dw,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].level); enable->path[i].level);
gpio_pin_configure(drv_data->gpio_dw, gpio_pin_configure(drv_data->gpio_dw,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].cfg); enable->path[i].cfg);
break; break;
case G_CW: case G_CW:
gpio_pin_write(drv_data->gpio_core, gpio_pin_write(drv_data->gpio_core,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].level); enable->path[i].level);
gpio_pin_configure(drv_data->gpio_core, gpio_pin_configure(drv_data->gpio_core,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].cfg); enable->path[i].cfg);
break; break;
case G_RW: case G_RW:
gpio_pin_write(drv_data->gpio_resume, gpio_pin_write(drv_data->gpio_resume,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].level); enable->path[i].level);
gpio_pin_configure(drv_data->gpio_resume, gpio_pin_configure(drv_data->gpio_resume,
enable->path[i].pin, enable->path[i].pin,
enable->path[i].cfg); enable->path[i].cfg);
break; break;
case NONE: case NONE:
/* no need to do anything */ /* no need to do anything */
break; break;
} }
} }

View file

@ -158,15 +158,15 @@ void bt_uart_isr(void *unused)
} }
switch (type) { switch (type) {
case H4_EVT: case H4_EVT:
buf = bt_uart_evt_recv(&remaining); buf = bt_uart_evt_recv(&remaining);
break; break;
case H4_ACL: case H4_ACL:
buf = bt_uart_acl_recv(&remaining); buf = bt_uart_acl_recv(&remaining);
break; break;
default: default:
BT_ERR("Unknown H4 type %u\n", type); BT_ERR("Unknown H4 type %u\n", type);
return; return;
} }
if (buf && remaining > bt_buf_tailroom(buf)) { if (buf && remaining > bt_buf_tailroom(buf)) {

View file

@ -136,14 +136,14 @@ static int gpio_mmio_config(struct device *dev, int access_op,
} }
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
cfg->access.set_bit(cfg->reg.dir, pin, value); cfg->access.set_bit(cfg->reg.dir, pin, value);
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
cfg->access.write(cfg->reg.dir, 0, value); cfg->access.write(cfg->reg.dir, 0, value);
break; break;
default: default:
return DEV_INVALID_OP; return DEV_INVALID_OP;
} }
/* /*
@ -167,14 +167,14 @@ static int gpio_mmio_config(struct device *dev, int access_op,
} }
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
cfg->access.set_bit(cfg->reg.en, pin, value); cfg->access.set_bit(cfg->reg.en, pin, value);
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
cfg->access.write(cfg->reg.en, 0, value); cfg->access.write(cfg->reg.en, 0, value);
break; break;
default: default:
return DEV_INVALID_OP; return DEV_INVALID_OP;
} }
return DEV_OK; return DEV_OK;
@ -201,14 +201,14 @@ static int gpio_mmio_write(struct device *dev, int access_op,
} }
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
cfg->access.set_bit(cfg->reg.output, pin, value); cfg->access.set_bit(cfg->reg.output, pin, value);
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
cfg->access.write(cfg->reg.output, 0, value); cfg->access.write(cfg->reg.output, 0, value);
break; break;
default: default:
return DEV_INVALID_OP; return DEV_INVALID_OP;
} }
return DEV_OK; return DEV_OK;
@ -235,15 +235,15 @@ static int gpio_mmio_read(struct device *dev, int access_op,
} }
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
*value = cfg->access.read(cfg->reg.input, 0, 0); *value = cfg->access.read(cfg->reg.input, 0, 0);
*value &= (1 << pin) >> pin; *value &= (1 << pin) >> pin;
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
*value = cfg->access.read(cfg->reg.input, 0, 0); *value = cfg->access.read(cfg->reg.input, 0, 0);
break; break;
default: default:
return DEV_INVALID_OP; return DEV_INVALID_OP;
} }
return DEV_OK; return DEV_OK;

View file

@ -185,29 +185,29 @@ static int _setup_pin_dir(struct device *dev, int access_op,
int ret; int ret;
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
bit_mask = 1 << pin; bit_mask = 1 << pin;
/* Config 0 == output, 1 == input */ /* Config 0 == output, 1 == input */
if ((flags & GPIO_DIR_MASK) == GPIO_DIR_IN) { if ((flags & GPIO_DIR_MASK) == GPIO_DIR_IN) {
new_value = 1 << pin; new_value = 1 << pin;
} }
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
/* Config 0 == output, 1 == input */ /* Config 0 == output, 1 == input */
if ((flags & GPIO_DIR_MASK) == GPIO_DIR_IN) { if ((flags & GPIO_DIR_MASK) == GPIO_DIR_IN) {
port->all = 0xFFFF; port->all = 0xFFFF;
} else { } else {
port->all = 0x0; port->all = 0x0;
} }
break; break;
default: default:
ret = DEV_INVALID_OP; ret = DEV_INVALID_OP;
goto done; goto done;
} }
ret = _write_port_regs(dev, REG_CONF_PORT0, port); ret = _write_port_regs(dev, REG_CONF_PORT0, port);
@ -246,29 +246,29 @@ static int _setup_pin_pullupdown(struct device *dev, int access_op,
/* Setup pin pull up or pull down */ /* Setup pin pull up or pull down */
port = &drv_data->reg_cache.pud_sel; port = &drv_data->reg_cache.pud_sel;
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
bit_mask = 1 << pin; bit_mask = 1 << pin;
/* pull down == 0, pull up == 1*/ /* pull down == 0, pull up == 1*/
if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) { if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) {
new_value = 1 << pin; new_value = 1 << pin;
} }
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
/* pull down == 0, pull up == 1*/ /* pull down == 0, pull up == 1*/
if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) { if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) {
port->all = 0xFFFF; port->all = 0xFFFF;
} else { } else {
port->all = 0x0; port->all = 0x0;
} }
break; break;
default: default:
ret = DEV_INVALID_OP; ret = DEV_INVALID_OP;
goto done; goto done;
} }
ret = _write_port_regs(dev, REG_PUD_SEL_PORT0, port); ret = _write_port_regs(dev, REG_PUD_SEL_PORT0, port);
@ -280,27 +280,27 @@ en_dis:
/* enable/disable pull up/down */ /* enable/disable pull up/down */
port = &drv_data->reg_cache.pud_en; port = &drv_data->reg_cache.pud_en;
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
bit_mask = 1 << pin; bit_mask = 1 << pin;
if ((flags & GPIO_PUD_MASK) != GPIO_PUD_NORMAL) { if ((flags & GPIO_PUD_MASK) != GPIO_PUD_NORMAL) {
new_value = 1 << pin; new_value = 1 << pin;
} }
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
if ((flags & GPIO_PUD_MASK) != GPIO_PUD_NORMAL) { if ((flags & GPIO_PUD_MASK) != GPIO_PUD_NORMAL) {
port->all = 0xFFFF; port->all = 0xFFFF;
} else { } else {
port->all = 0x0; port->all = 0x0;
} }
break; break;
default: default:
ret = DEV_INVALID_OP; ret = DEV_INVALID_OP;
goto done; goto done;
} }
ret = _write_port_regs(dev, REG_PUD_EN_PORT0, port); ret = _write_port_regs(dev, REG_PUD_EN_PORT0, port);
@ -330,29 +330,29 @@ static int _setup_pin_polarity(struct device *dev, int access_op,
int ret; int ret;
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
bit_mask = 1 << pin; bit_mask = 1 << pin;
/* normal == 0, invert == 1 */ /* normal == 0, invert == 1 */
if ((flags & GPIO_POL_MASK) == GPIO_POL_INV) { if ((flags & GPIO_POL_MASK) == GPIO_POL_INV) {
new_value = 1 << pin; new_value = 1 << pin;
} }
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
/* normal == 0, invert == 1 */ /* normal == 0, invert == 1 */
if ((flags & GPIO_POL_MASK) == GPIO_POL_INV) { if ((flags & GPIO_POL_MASK) == GPIO_POL_INV) {
port->all = 0xFFFF; port->all = 0xFFFF;
} else { } else {
port->all = 0x0; port->all = 0x0;
} }
break; break;
default: default:
ret = DEV_INVALID_OP; ret = DEV_INVALID_OP;
goto done; goto done;
} }
ret = _write_port_regs(dev, REG_POL_INV_PORT0, port); ret = _write_port_regs(dev, REG_POL_INV_PORT0, port);
@ -440,32 +440,32 @@ static int gpio_pcal9535a_write(struct device *dev, int access_op,
/* Invert input value for pins configurated as active low. */ /* Invert input value for pins configurated as active low. */
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
bit_mask = 1 << pin; bit_mask = 1 << pin;
new_value = (value << pin) & bit_mask; new_value = (value << pin) & bit_mask;
new_value ^= (drv_data->out_pol_inv & bit_mask); new_value ^= (drv_data->out_pol_inv & bit_mask);
new_value &= bit_mask; new_value &= bit_mask;
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
port->all = value; port->all = value;
bit_mask = drv_data->out_pol_inv; bit_mask = drv_data->out_pol_inv;
new_value = value & bit_mask; new_value = value & bit_mask;
new_value ^= drv_data->out_pol_inv; new_value ^= drv_data->out_pol_inv;
new_value &= bit_mask; new_value &= bit_mask;
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
break; break;
default: default:
ret = DEV_INVALID_OP; ret = DEV_INVALID_OP;
goto done; goto done;
} }
ret = _write_port_regs(dev, REG_OUTPUT_PORT0, port); ret = _write_port_regs(dev, REG_OUTPUT_PORT0, port);
@ -500,15 +500,15 @@ static int gpio_pcal9535a_read(struct device *dev, int access_op,
} }
switch (access_op) { switch (access_op) {
case GPIO_ACCESS_BY_PIN: case GPIO_ACCESS_BY_PIN:
*value = (buf.all >> pin) & 0x01; *value = (buf.all >> pin) & 0x01;
break; break;
case GPIO_ACCESS_BY_PORT: case GPIO_ACCESS_BY_PORT:
*value = buf.all; *value = buf.all;
break; break;
default: default:
ret = DEV_INVALID_OP; ret = DEV_INVALID_OP;
break; break;
} }
done: done:

View file

@ -90,17 +90,17 @@ static int pwm_pca9685_set_values(struct device *dev, int access_op,
} }
switch (access_op) { switch (access_op) {
case PWM_ACCESS_BY_PIN: case PWM_ACCESS_BY_PIN:
if (pwm > MAX_PWM_OUT) { if (pwm > MAX_PWM_OUT) {
return DEV_INVALID_CONF; return DEV_INVALID_CONF;
} }
buf[0] = REG_LED_ON_L(pwm); buf[0] = REG_LED_ON_L(pwm);
break; break;
case PWM_ACCESS_ALL: case PWM_ACCESS_ALL:
buf[0] = REG_ALL_LED_ON_L; buf[0] = REG_ALL_LED_ON_L;
break; break;
default: default:
return DEV_INVALID_OP; return DEV_INVALID_OP;
} }
/* If both ON and OFF > max ticks, treat PWM as 100%. /* If both ON and OFF > max ticks, treat PWM as 100%.

View file

@ -33,10 +33,10 @@ int atoi(const char *s)
s++; s++;
} }
switch (*s) { switch (*s) {
case '-': case '-':
neg=1; neg=1;
case '+': case '+':
s++; s++;
} }
/* Compute n as a negative number to avoid overflow on INT_MIN */ /* Compute n as a negative number to avoid overflow on INT_MIN */
while (isdigit(*s)) { while (isdigit(*s)) {