sd: MMC API, and MMC Spec
- Adds the declaration of the MMC API - Adds MMC spec related declarations - Adds some properties to sdhc dts binding for mmc Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
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5 changed files with 227 additions and 4 deletions
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@ -49,3 +49,13 @@ properties:
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description: |
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time in ms for SDHC to delay when toggling power to the SD card. This
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delay gives the card time to power up or down fully
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mmc-hs200-1_8v:
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type: boolean
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description: |
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The host controller supports HS200 at 1.8V
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mmc-hs400-1_8v:
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type: boolean
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description: |
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The host controller supports HS400 at 1.8V
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@ -165,6 +165,7 @@ struct sdhc_host_caps {
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unsigned int sd_base_clk: 8;
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unsigned int max_blk_len: 2;
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unsigned int bus_8_bit_support: 1;
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unsigned int bus_4_bit_support: 1;
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unsigned int adma_2_support: 1;
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unsigned int _rsvd_20: 1;
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unsigned int high_spd_support: 1;
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@ -193,6 +194,8 @@ struct sdhc_host_caps {
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unsigned int adma3_support: 1;
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unsigned int vdd2_180_support: 1;
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unsigned int _rsvd_61: 3;
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unsigned int hs200_support: 1;
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unsigned int hs400_support: 1;
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};
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/**
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76
include/zephyr/sd/mmc.h
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76
include/zephyr/sd/mmc.h
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@ -0,0 +1,76 @@
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/*
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* Copyright 2022 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Public API for MMC memory card subsystem
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*/
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#ifndef ZEPHYR_INCLUDE_SD_MMC_H_
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#define ZEPHYR_INCLUDE_SD_MMC_H_
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#include <zephyr/device.h>
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#include <zephyr/drivers/sdhc.h>
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#include <zephyr/sd/sd.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Write blocks to MMC card from buffer
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*
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* Writes blocks from MMC buffer to MMC card. For best performance, this buffer
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* should be aligned to CONFIG_SDHC_BUFFER_ALIGNMENT
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* @param card MMC card to write from
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* @param wbuf write buffer
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* @param start_block first block to write to
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* @param num_blocks number of blocks to write
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* @retval 0 write succeeded
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* @retval -EBUSY: card is busy with another request
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* @retval -ETIMEDOUT: card write timed out
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* @retval -EIO: I/O error
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*/
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int mmc_write_blocks(struct sd_card *card, const uint8_t *wbuf,
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uint32_t start_block, uint32_t num_blocks);
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/**
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* @brief Read block from MMC card to buffer
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*
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* Reads blocks into MMC buffer from MMC card. For best performance, this buffer
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* should be aligned to CONFIG_SDHC_BUFFER_ALIGNMENT
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* @param card MMC card to read from
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* @param rbuf read buffer
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* @param start_block first block to read from
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* @param num_blocks number of blocks to read
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* @retval 0 read succeeded
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* @retval -EBUSY: card is busy with another request
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* @retval -ETIMEDOUT: card read timed out
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* @retval -EIO: I/O error
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*/
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int mmc_read_blocks(struct sd_card *card, uint8_t *rbuf,
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uint32_t start_block, uint32_t num_blocks);
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/**
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* @brief Get I/O control data from MMC card
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*
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* Sends I/O control commands to MMC card.
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* @param card MMC card
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* @param cmd I/O control command
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* Mirrors disk subsystem,
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* see include/zephyr/drivers/disk.h for list of possible commands.
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* @param buf I/O control buf
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* @retval 0 IOCTL command succeeded
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* @retval -ENOTSUP: IOCTL command not supported
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* @retval -EIO: I/O failure
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*/
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int mmc_ioctl(struct sd_card *card, uint8_t cmd, void *buf);
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_SD_MMC_H_ */
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@ -36,6 +36,7 @@ enum card_type {
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CARD_SDMMC = 0, /*!< SD memory card */
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CARD_SDIO = 1, /*!< SD I/O card */
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CARD_COMBO = 2, /*!< SD memory and I/O card */
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CARD_MMC = 3, /*!< MMC memory card */
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};
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@ -59,7 +60,7 @@ struct sd_card {
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uint32_t block_count; /*!< Number of blocks in SD card */
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uint32_t block_size; /*!< SD block size */
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uint32_t sd_version; /*!< SD specification version */
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enum sd_timing_mode card_speed; /*!< Card timing mode */
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uint32_t card_speed; /*!< Card timing mode */
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enum card_status status; /*!< Card status */
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enum card_type type; /*!< Card type */
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uint32_t flags; /*!< Card flags */
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@ -26,22 +26,28 @@ extern "C" {
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*/
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enum sd_opcode {
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SD_GO_IDLE_STATE = 0,
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MMC_SEND_OP_COND = 1,
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SD_ALL_SEND_CID = 2,
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SD_SEND_RELATIVE_ADDR = 3,
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MMC_SEND_RELATIVE_ADDR = 3,
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SDIO_SEND_OP_COND = 5, /* SDIO cards only */
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SD_SWITCH = 6,
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SD_SELECT_CARD = 7,
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SD_SEND_IF_COND = 8,
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MMC_SEND_EXT_CSD = 8,
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SD_SEND_CSD = 9,
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SD_SEND_CID = 10,
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SD_VOL_SWITCH = 11,
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SD_STOP_TRANSMISSION = 12,
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SD_SEND_STATUS = 13,
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MMC_CHECK_BUS_TEST = 14,
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SD_GO_INACTIVE_STATE = 15,
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SD_SET_BLOCK_SIZE = 16,
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SD_READ_SINGLE_BLOCK = 17,
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SD_READ_MULTIPLE_BLOCK = 18,
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SD_SEND_TUNING_BLOCK = 19,
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MMC_SEND_BUS_TEST = 19,
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MMC_SEND_TUNING_BLOCK = 21,
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SD_SET_BLOCK_COUNT = 23,
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SD_WRITE_SINGLE_BLOCK = 24,
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SD_WRITE_MULTIPLE_BLOCK = 25,
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@ -278,6 +284,20 @@ enum sd_ocr_flag {
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/*!< VDD 3.4-3.5 */
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};
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/**
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* @brief MMC OCR bit flags
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*
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* bit flags present in MMC OCR response. Used to determine status and
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* supported functions of MMC card.
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*/
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enum mmc_ocr_flag {
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MMC_OCR_VDD170_195FLAG = BIT(7),
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MMC_OCR_VDD20_26FLAG = 0x7F << 8,
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MMC_OCR_VDD27_36FLAG = 0x1FF << 15,
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MMC_OCR_SECTOR_MODE = BIT(30),
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MMC_OCR_PWR_BUSY_FLAG = BIT(31)
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};
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#define SDIO_OCR_IO_NUMBER_SHIFT (28U)
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/* Lower 24 bits hold SDIO I/O OCR */
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#define SDIO_IO_OCR_MASK (0xFFFFFFU)
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@ -397,7 +417,7 @@ enum sdhc_clock_speed {
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MMC_CLOCK_52MHZ = 52000000U,
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MMC_CLOCK_DDR52 = 52000000U,
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MMC_CLOCK_HS200 = 200000000U,
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MMC_CLOCK_HS400 = 400000000U,
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MMC_CLOCK_HS400 = 200000000U, /* Same clock freq as HS200, just DDR */
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};
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/**
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@ -525,7 +545,6 @@ struct sd_csd {
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/*!< Maximum write current at VDD max [52:50] */
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uint8_t dev_size_mul;
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/*!< Device size multiplier [49:47] */
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uint8_t erase_size;
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/*!< Erase sector size [45:39] */
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uint8_t write_prtect_size;
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@ -538,6 +557,120 @@ struct sd_csd {
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/*!< File format [11:10] */
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};
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/**
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* @brief MMC Maximum Frequency
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*
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* Max freq in MMC csd
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*/
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enum mmc_csd_freq {
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MMC_MAXFREQ_100KHZ = 0U << 0U,
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MMC_MAXFREQ_1MHZ = 1U << 0U,
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MMC_MAXFREQ_10MHZ = 2U << 0U,
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MMC_MAXFREQ_100MHZ = 3U << 0U,
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MMC_MAXFREQ_MULT_10 = 1U << 3U,
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MMC_MAXFREQ_MULT_12 = 2U << 3U,
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MMC_MAXFREQ_MULT_13 = 3U << 3U,
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MMC_MAXFREQ_MULT_15 = 4U << 3U,
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MMC_MAXFREQ_MULT_20 = 5U << 3U,
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MMC_MAXFREQ_MULT_26 = 6U << 3U,
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MMC_MAXFREQ_MULT_30 = 7U << 3U,
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MMC_MAXFREQ_MULT_35 = 8U << 3U,
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MMC_MAXFREQ_MULT_40 = 9U << 3U,
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MMC_MAXFREQ_MULT_45 = 0xAU << 3U,
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MMC_MAXFREQ_MULT_52 = 0xBU << 3U,
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MMC_MAXFREQ_MULT_55 = 0xCU << 3U,
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MMC_MAXFREQ_MULT_60 = 0xDU << 3U,
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MMC_MAXFREQ_MULT_70 = 0xEU << 3U,
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MMC_MAXFREQ_MULT_80 = 0xFU << 3u
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};
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/**
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* @brief MMC Timing Modes
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*
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* MMC Timing Mode, encoded in EXT_CSD
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*/
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enum mmc_timing_mode {
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MMC_LEGACY_TIMING = 0U,
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MMC_HS_TIMING = 1U,
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MMC_HS200_TIMING = 2U,
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MMC_HS400_TIMING = 3U
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};
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/**
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* @brief MMC Driver Strengths
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*
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* Encoded in EXT_CSD
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*/
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enum mmc_driver_strengths {
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mmc_driv_type0 = 0U,
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mmc_driv_type1 = 1U,
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mmc_driv_type2 = 2U,
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mmc_driv_type3 = 3U,
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mmc_driv_type4 = 4U
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};
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/**
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* @brief MMC Device Type
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*
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* Encoded in EXT_CSD
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*/
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struct mmc_device_type {
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bool MMC_HS400_DDR_1200MV;
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bool MMC_HS400_DDR_1800MV;
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bool MMC_HS200_SDR_1200MV;
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bool MMC_HS200_SDR_1800MV;
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bool MMC_HS_DDR_1200MV;
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bool MMC_HS_DDR_1800MV;
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bool MMC_HS_52_DV;
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bool MMC_HS_26_DV;
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};
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/**
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* @brief CSD Revision
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*
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* Value of CSD rev in EXT_CSD
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*/
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enum mmc_ext_csd_rev {
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MMC_5_1 = 8U,
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MMC_5_0 = 7U,
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MMC_4_5 = 6U,
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MMC_4_4 = 5U,
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MMC_4_3 = 3U,
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MMC_4_2 = 2U,
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MMC_4_1 = 1U,
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MMC_4_0 = 0U
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};
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/**
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* @brief MMC extended card specific data register
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*
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* Extended card specific data register.
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* Contains additional additional data about MMC card.
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*/
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struct mmc_ext_csd {
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uint32_t sec_count;
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/*!< Sector Count [215:212] >*/
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uint8_t bus_width;
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/*!< Bus Width Mode [183] >*/
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enum mmc_timing_mode hs_timing;
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/*!< High Speed Timing Mode [185] >*/
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struct mmc_device_type device_type;
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/*!< Device Type [196] >*/
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enum mmc_ext_csd_rev rev;
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/*!< Extended CSD Revision [192] >*/
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uint8_t power_class;
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/*!< Selected power class [187]>*/
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uint8_t mmc_driver_strengths;
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/*!< Driver strengths [197] >*/
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uint8_t pwr_class_200MHZ_VCCQ195;
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/*!< Power class information for HS200 at VCC!=1.95V [237] >*/
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uint8_t pwr_class_HS400;
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/*!< Power class information for HS400 [253] >*/
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uint32_t cache_size;
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/*!< Size of eMMC cache [252:249]>*/
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};
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/**
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* @brief SD card specific data flags
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*
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@ -622,7 +755,7 @@ enum sd_spec_version {
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#define SDMMC_DEFAULT_BLOCK_SIZE (512U)
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#define MMC_EXT_CSD_BYTES 512
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#ifdef __cplusplus
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}
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