driver: uart: npcx: fix coding style
Fix the coding style by clang-format tool. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
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1 changed files with 39 additions and 36 deletions
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@ -71,7 +71,7 @@ static void uart_npcx_pm_policy_state_lock_get(struct uart_npcx_data *data,
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}
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}
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static void uart_npcx_pm_policy_state_lock_put(struct uart_npcx_data *data,
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static void uart_npcx_pm_policy_state_lock_put(struct uart_npcx_data *data,
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enum uart_pm_policy_state_flag flag)
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enum uart_pm_policy_state_flag flag)
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{
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{
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if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) {
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if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) {
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pm_policy_state_lock_put(PM_STATE_SUSPEND_TO_IDLE, PM_ALL_SUBSTATES);
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pm_policy_state_lock_put(PM_STATE_SUSPEND_TO_IDLE, PM_ALL_SUBSTATES);
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@ -125,8 +125,7 @@ static void uart_npcx_dis_all_tx_interrupts(const struct device *dev)
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struct uart_reg *const inst = config->inst;
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struct uart_reg *const inst = config->inst;
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/* Disable all Tx interrupts */
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/* Disable all Tx interrupts */
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inst->UFTCTL &= ~(BIT(NPCX_UFTCTL_TEMPTY_LVL_EN) |
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inst->UFTCTL &= ~(BIT(NPCX_UFTCTL_TEMPTY_LVL_EN) | BIT(NPCX_UFTCTL_TEMPTY_EN) |
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BIT(NPCX_UFTCTL_TEMPTY_EN) |
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BIT(NPCX_UFTCTL_NXMIP_EN));
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BIT(NPCX_UFTCTL_NXMIP_EN));
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}
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}
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@ -137,8 +136,9 @@ static void uart_npcx_clear_rx_fifo(const struct device *dev)
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uint8_t scratch;
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uint8_t scratch;
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/* Read all dummy bytes out from Rx FIFO */
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/* Read all dummy bytes out from Rx FIFO */
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while (uart_npcx_rx_fifo_available(dev))
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while (uart_npcx_rx_fifo_available(dev)) {
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scratch = inst->URBUF;
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scratch = inst->URBUF;
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}
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}
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}
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static int uart_npcx_fifo_fill(const struct device *dev, const uint8_t *tx_data, int size)
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static int uart_npcx_fifo_fill(const struct device *dev, const uint8_t *tx_data, int size)
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@ -271,7 +271,7 @@ static void uart_npcx_irq_err_disable(const struct device *dev)
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static int uart_npcx_irq_is_pending(const struct device *dev)
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static int uart_npcx_irq_is_pending(const struct device *dev)
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{
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{
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return uart_npcx_irq_tx_ready(dev) ||
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return uart_npcx_irq_tx_ready(dev) ||
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(uart_npcx_irq_rx_ready(dev) && uart_npcx_irq_rx_is_enabled(dev));
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(uart_npcx_irq_rx_ready(dev) && uart_npcx_irq_rx_is_enabled(dev));
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}
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}
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static int uart_npcx_irq_update(const struct device *dev)
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static int uart_npcx_irq_update(const struct device *dev)
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@ -341,11 +341,12 @@ static int uart_npcx_poll_in(const struct device *dev, unsigned char *c)
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*/
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*/
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static void uart_npcx_poll_out(const struct device *dev, unsigned char c)
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static void uart_npcx_poll_out(const struct device *dev, unsigned char c)
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{
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{
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while (!uart_npcx_fifo_fill(dev, &c, 1))
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while (!uart_npcx_fifo_fill(dev, &c, 1)) {
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continue;
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continue;
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}
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}
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}
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#else /* !CONFIG_UART_INTERRUPT_DRIVEN */
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#else /* !CONFIG_UART_INTERRUPT_DRIVEN */
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/*
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/*
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* Poll-in implementation for byte mode config, read byte from URBUF if
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* Poll-in implementation for byte mode config, read byte from URBUF if
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@ -357,8 +358,9 @@ static int uart_npcx_poll_in(const struct device *dev, unsigned char *c)
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struct uart_reg *const inst = config->inst;
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struct uart_reg *const inst = config->inst;
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/* Rx single byte buffer is not full */
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/* Rx single byte buffer is not full */
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if (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_RBF))
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if (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_RBF)) {
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return -1;
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return -1;
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}
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*c = inst->URBUF;
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*c = inst->URBUF;
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return 0;
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return 0;
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@ -373,8 +375,9 @@ static void uart_npcx_poll_out(const struct device *dev, unsigned char c)
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struct uart_reg *const inst = config->inst;
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struct uart_reg *const inst = config->inst;
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/* Wait while Tx single byte buffer is ready to send */
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/* Wait while Tx single byte buffer is ready to send */
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while (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_TBE))
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while (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_TBE)) {
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continue;
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continue;
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}
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inst->UTBUF = c;
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inst->UTBUF = c;
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}
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}
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@ -388,14 +391,17 @@ static int uart_npcx_err_check(const struct device *dev)
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uint32_t err = 0U;
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uint32_t err = 0U;
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uint8_t stat = inst->USTAT;
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uint8_t stat = inst->USTAT;
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if (IS_BIT_SET(stat, NPCX_USTAT_DOE))
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if (IS_BIT_SET(stat, NPCX_USTAT_DOE)) {
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err |= UART_ERROR_OVERRUN;
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err |= UART_ERROR_OVERRUN;
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}
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if (IS_BIT_SET(stat, NPCX_USTAT_PE))
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if (IS_BIT_SET(stat, NPCX_USTAT_PE)) {
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err |= UART_ERROR_PARITY;
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err |= UART_ERROR_PARITY;
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}
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if (IS_BIT_SET(stat, NPCX_USTAT_FE))
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if (IS_BIT_SET(stat, NPCX_USTAT_FE)) {
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err |= UART_ERROR_FRAMING;
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err |= UART_ERROR_FRAMING;
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}
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return err;
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return err;
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}
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}
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@ -480,8 +486,7 @@ static int uart_npcx_init(const struct device *dev)
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* If apb2's clock is not 15MHz, we need to find the other optimized
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* If apb2's clock is not 15MHz, we need to find the other optimized
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* values of UPSR and UBAUD for baud rate 115200.
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* values of UPSR and UBAUD for baud rate 115200.
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*/
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*/
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ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t)&config->clk_cfg,
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ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t)&config->clk_cfg, &uart_rate);
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&uart_rate);
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if (ret < 0) {
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if (ret < 0) {
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LOG_ERR("Get UART clock rate error %d", ret);
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LOG_ERR("Get UART clock rate error %d", ret);
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return ret;
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return ret;
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@ -560,32 +565,30 @@ static int uart_npcx_init(const struct device *dev)
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#define NPCX_UART_IRQ_CONFIG_FUNC(inst)
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#define NPCX_UART_IRQ_CONFIG_FUNC(inst)
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#endif
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#endif
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#define NPCX_UART_INIT(i) \
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#define NPCX_UART_INIT(i) \
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NPCX_UART_IRQ_CONFIG_FUNC_DECL(i); \
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NPCX_UART_IRQ_CONFIG_FUNC_DECL(i); \
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\
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\
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PINCTRL_DT_INST_DEFINE(i); \
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PINCTRL_DT_INST_DEFINE(i); \
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\
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\
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static const struct uart_npcx_config uart_npcx_cfg_##i = { \
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static const struct uart_npcx_config uart_npcx_cfg_##i = { \
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.inst = (struct uart_reg *)DT_INST_REG_ADDR(i), \
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.inst = (struct uart_reg *)DT_INST_REG_ADDR(i), \
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.clk_cfg = NPCX_DT_CLK_CFG_ITEM(i), \
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.clk_cfg = NPCX_DT_CLK_CFG_ITEM(i), \
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.uart_rx_wui = NPCX_DT_WUI_ITEM_BY_NAME(0, uart_rx), \
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.uart_rx_wui = NPCX_DT_WUI_ITEM_BY_NAME(0, uart_rx), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(i), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(i), \
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NPCX_UART_IRQ_CONFIG_FUNC_INIT(i) \
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NPCX_UART_IRQ_CONFIG_FUNC_INIT(i)}; \
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}; \
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\
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\
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static struct uart_npcx_data uart_npcx_data_##i = { \
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static struct uart_npcx_data uart_npcx_data_##i = { .baud_rate = DT_INST_PROP( \
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.baud_rate = DT_INST_PROP(i, current_speed)}; \
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i, current_speed) }; \
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\
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\
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DEVICE_DT_INST_DEFINE(i, &uart_npcx_init, NULL, &uart_npcx_data_##i, &uart_npcx_cfg_##i, \
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DEVICE_DT_INST_DEFINE(i, &uart_npcx_init, NULL, &uart_npcx_data_##i, \
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PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, &uart_npcx_driver_api); \
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&uart_npcx_cfg_##i, PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \
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\
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&uart_npcx_driver_api); \
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\
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NPCX_UART_IRQ_CONFIG_FUNC(i)
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NPCX_UART_IRQ_CONFIG_FUNC(i)
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DT_INST_FOREACH_STATUS_OKAY(NPCX_UART_INIT)
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DT_INST_FOREACH_STATUS_OKAY(NPCX_UART_INIT)
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#define ENABLE_MIWU_CRIN_IRQ(i) \
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#define ENABLE_MIWU_CRIN_IRQ(i) \
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npcx_miwu_irq_get_and_clear_pending(&uart_npcx_cfg_##i.uart_rx_wui); \
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npcx_miwu_irq_get_and_clear_pending(&uart_npcx_cfg_##i.uart_rx_wui); \
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npcx_miwu_irq_enable(&uart_npcx_cfg_##i.uart_rx_wui);
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npcx_miwu_irq_enable(&uart_npcx_cfg_##i.uart_rx_wui);
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#define DISABLE_MIWU_CRIN_IRQ(i) npcx_miwu_irq_disable(&uart_npcx_cfg_##i.uart_rx_wui);
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#define DISABLE_MIWU_CRIN_IRQ(i) npcx_miwu_irq_disable(&uart_npcx_cfg_##i.uart_rx_wui);
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