diff --git a/dts/arm/st/l4/stm32l452.dtsi b/dts/arm/st/l4/stm32l452.dtsi new file mode 100644 index 00000000000..82074cd5850 --- /dev/null +++ b/dts/arm/st/l4/stm32l452.dtsi @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2018 Georgij Cernysiov + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@48000000 { + gpiod: gpio@48000c00 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48000c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>; + label = "GPIOD"; + }; + + gpioe: gpio@48001000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>; + label = "GPIOE"; + }; + }; + + usb: usb@40006800 { + compatible = "st,stm32-usb"; + reg = <0x40006800 0x40000>; + interrupts = <67 0>; + interrupt-names = "usb"; + num-bidir-endpoints = <8>; + ram-size = <1024>; + phys = <&otgfs_phy>; + status = "disabled"; + label = "USB"; + }; + + i2c2: i2c@40005800 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40005800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; + interrupts = <33 0>, <34 0>; + interrupt-names = "event", "error"; + status = "disabled"; + label= "I2C_2"; + }; + + i2c4: i2c@40008400 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40008400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000002>; + interrupts = <83 0>, <84 0>; + interrupt-names = "event", "error"; + status = "disabled"; + label= "I2C_4"; + }; + + spi2: spi@40003800 { + compatible = "st,stm32-spi-fifo"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; + interrupts = <36 5>; + status = "disabled"; + label = "SPI_2"; + }; + + spi3: spi@40003C00 { + compatible = "st,stm32-spi-fifo"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003C00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>; + interrupts = <51 5>; + status = "disabled"; + label = "SPI_3"; + }; + + usart3: serial@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; + interrupts = <39 0>; + status = "disabled"; + label = "UART_3"; + }; + + uart4: serial@40004C00 { + compatible = "st,stm32-uart"; + reg = <0x40004C00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; + interrupts = <52 0>; + status = "disabled"; + label = "UART_4"; + }; + + timers3: timers@40000400 { + compatible = "st,stm32-timers"; + reg = <0x40000400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>; + status = "disabled"; + label = "TIMERS_3"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + st,prescaler = <10000>; + label = "PWM_3"; + #pwm-cells = <2>; + }; + }; + }; + + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; +}; diff --git a/dts/arm/st/l4/stm32l452Xc.dtsi b/dts/arm/st/l4/stm32l452Xc.dtsi new file mode 100644 index 00000000000..8b35e5442d2 --- /dev/null +++ b/dts/arm/st/l4/stm32l452Xc.dtsi @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2018 Georgij Cernysiov + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + sram0: memory@20000000 { + reg = <0x20000000 DT_SIZE_K(160)>; + }; + + soc { + flash-controller@40022000 { + flash0: flash@8000000 { + reg = <0x08000000 DT_SIZE_K(256)>; + }; + }; + }; +}; diff --git a/soc/arm/st_stm32/common/arm_mpu_mem_cfg.h b/soc/arm/st_stm32/common/arm_mpu_mem_cfg.h index c48e59c89eb..45fc2765b72 100644 --- a/soc/arm/st_stm32/common/arm_mpu_mem_cfg.h +++ b/soc/arm/st_stm32/common/arm_mpu_mem_cfg.h @@ -57,6 +57,10 @@ #define REGION_SRAM_0_SIZE REGION_64K #define REGION_SRAM_1_START 0x10000 #define REGION_SRAM_1_SIZE REGION_64K +#elif CONFIG_SRAM_SIZE == 160 +#define REGION_SRAM_0_SIZE REGION_128K +#define REGION_SRAM_1_START 0x20000 +#define REGION_SRAM_1_SIZE REGION_32K #elif CONFIG_SRAM_SIZE == 192 #define REGION_SRAM_0_SIZE REGION_128K #define REGION_SRAM_1_START 0x20000 diff --git a/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l452xx b/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l452xx new file mode 100644 index 00000000000..335b281a450 --- /dev/null +++ b/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l452xx @@ -0,0 +1,32 @@ +# Kconfig - ST Microelectronics STM32L452XX MCU +# +# Copyright (c) 2018 Georgij Cernysiov +# +# SPDX-License-Identifier: Apache-2.0 +# + +if SOC_STM32L452XC + +config SOC + string + default "stm32l452xx" + +config NUM_IRQS + int + default 85 + +if GPIO_STM32 + +config GPIO_STM32_PORTD + default y + +config GPIO_STM32_PORTE + default y + +config GPIO_STM32_PORTH + default y + +endif # GPIO_STM32 + +endif # SOC_STM32L452XC + diff --git a/soc/arm/st_stm32/stm32l4/Kconfig.soc b/soc/arm/st_stm32/stm32l4/Kconfig.soc index abafe6b26a2..0c431486499 100644 --- a/soc/arm/st_stm32/stm32l4/Kconfig.soc +++ b/soc/arm/st_stm32/stm32l4/Kconfig.soc @@ -22,6 +22,9 @@ config SOC_STM32L432XC config SOC_STM32L433XC bool "STM32L433XC" +config SOC_STM32L452XC + bool "STM32L452XC" + config SOC_STM32L475XG bool "STM32L475XG"