dts: Add I3C configuration for STM32.
This commit adds the main DTS configurations required to enable I3C support on STM32. Signed-off-by: Mohammad Badawi <zephyr@exalt.ps> Signed-off-by: Sara Touqan <zephyr@exalt.ps>
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2 changed files with 59 additions and 0 deletions
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@ -457,6 +457,32 @@
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status = "disabled";
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status = "disabled";
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};
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};
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i3c1: i3c@40005c00 {
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compatible = "st,stm32-i3c";
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reg = <0x40005c00 0x400>;
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interrupts = <123 0>, <124 0>;
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interrupt-names = "event", "error";
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#address-cells = <3>;
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#size-cells = <0>;
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clocks = <&rcc STM32_CLOCK(APB1, 23U)>;
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resets = <&rctl STM32_RESET(APB1L, 23U)>;
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zephyr,pm-device-runtime-auto;
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status = "disabled";
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};
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i3c2: i3c@44003000 {
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compatible = "st,stm32-i3c";
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reg = <0x44003000 0x400>;
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interrupts = <131 0>, <132 0>;
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interrupt-names = "event", "error";
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#address-cells = <3>;
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#size-cells = <0>;
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clocks = <&rcc STM32_CLOCK(APB3, 9U)>;
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resets = <&rctl STM32_RESET(APB3, 9U)>;
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zephyr,pm-device-runtime-auto;
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status = "disabled";
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};
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spi1: spi@40013000 {
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spi1: spi@40013000 {
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compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
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compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#address-cells = <1>;
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33
dts/bindings/i3c/st,stm32-i3c.yaml
Normal file
33
dts/bindings/i3c/st,stm32-i3c.yaml
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# Copyright (c) 2024 EXALT Technologies.
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#
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# SPDX-License-Identifier: Apache-2.0
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description: STM32H5 I3C controller
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compatible: "st,stm32-i3c"
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include: [i3c-controller.yaml, pinctrl-device.yaml, reset-device.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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pinctrl-names:
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required: true
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resets:
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required: true
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dmas:
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description: |
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Optional DMA channel specifier, required for DMA transactions.
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dma-names:
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description: |
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DMA channel name. If DMA should be used, expected value is "rx" "tx" "tc" "rs".
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For example
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dma-names = "rx", "tx", "tc", "rs";
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