dts: Add I3C configuration for STM32.

This commit adds the main DTS configurations required
to enable I3C support on STM32.

Signed-off-by: Mohammad Badawi <zephyr@exalt.ps>
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
This commit is contained in:
Sara Touqan 2024-11-19 12:53:19 +02:00 committed by Benjamin Cabé
commit 3b33aa5450
2 changed files with 59 additions and 0 deletions

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@ -457,6 +457,32 @@
status = "disabled"; status = "disabled";
}; };
i3c1: i3c@40005c00 {
compatible = "st,stm32-i3c";
reg = <0x40005c00 0x400>;
interrupts = <123 0>, <124 0>;
interrupt-names = "event", "error";
#address-cells = <3>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(APB1, 23U)>;
resets = <&rctl STM32_RESET(APB1L, 23U)>;
zephyr,pm-device-runtime-auto;
status = "disabled";
};
i3c2: i3c@44003000 {
compatible = "st,stm32-i3c";
reg = <0x44003000 0x400>;
interrupts = <131 0>, <132 0>;
interrupt-names = "event", "error";
#address-cells = <3>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(APB3, 9U)>;
resets = <&rctl STM32_RESET(APB3, 9U)>;
zephyr,pm-device-runtime-auto;
status = "disabled";
};
spi1: spi@40013000 { spi1: spi@40013000 {
compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"; compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>; #address-cells = <1>;

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@ -0,0 +1,33 @@
# Copyright (c) 2024 EXALT Technologies.
#
# SPDX-License-Identifier: Apache-2.0
description: STM32H5 I3C controller
compatible: "st,stm32-i3c"
include: [i3c-controller.yaml, pinctrl-device.yaml, reset-device.yaml]
properties:
reg:
required: true
interrupts:
required: true
pinctrl-names:
required: true
resets:
required: true
dmas:
description: |
Optional DMA channel specifier, required for DMA transactions.
dma-names:
description: |
DMA channel name. If DMA should be used, expected value is "rx" "tx" "tc" "rs".
For example
dma-names = "rx", "tx", "tc", "rs";