drivers: mipi_dbi: introduce MIPI DBI driver class

Introduce MIPI DBI driver class. MIPI DBI devices encompass several
interface types. All interfaces have a data/command, reset, chip select,
and tearing effect signal

Beyond this, MIPI DBI operates in 3 modes:

Mode A- 16/8 data pins, one clock pin, one read/write pin. Similar to
Motorola type 6800 bus

Mode B- 16/8 data pins, one read/write pin. Similar to Intel 8080 bus

Mode C- 1 data output pin, 1 data input pin, one clock pin.
Implementable using SPI peripheral, or MIPI-DBI specific controller.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>

dts/bindings/mipi-dbi/mipi-dbi-controller.yaml

@@ -0,0 +1,20 @@
+# Copyright 2023 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+# Common fields for MIPI-DBI controllers
+
+include: base.yaml
+
+bus: mipi-dbi
+
+properties:
+  clock-frequency:
+    type: int
+    description: |
+      Clock frequency of the SCL signal of the MBI-DBI peripheral, in Hz
+  "#address-cells":
+    required: true
+    const: 1
+  "#size-cells":
+    required: true
+    const: 0

dts/bindings/mipi-dbi/mipi-dbi-device.yaml

@@ -0,0 +1,13 @@
+# Copyright 2023 NXP
+# SPDX-License-Identifier: Apache-2.0
+#
+# Common fields for MIPI-DBI devices
+
+include: [base.yaml, power.yaml]
+
+on-bus: mipi-dbi
+
+properties:
+  mipi-max-frequency:
+    type: int
+    description: Maximum clock frequency of device's MIPI interface in Hz

dts/bindings/mipi-dbi/mipi-dbi-spi-device.yaml

@@ -0,0 +1,36 @@
+# Copyright 2023 NXP
+# SPDX-License-Identifier: Apache-2.0
+#
+# Common fields for MIPI DBI devices using Mode C (SPI)
+
+include: [mipi-dbi-device.yaml]
+
+properties:
+  duplex:
+    type: int
+    default: 0
+    description: |
+      SPI Duplex mode, full or half. By default it's always full duplex thus 0
+      as this is, by far, the most common mode.
+      Use the macros not the actual enum value, here is the concordance
+      list (see dt-bindings/spi/spi.h)
+        0    SPI_FULL_DUPLEX
+        2048 SPI_HALF_DUPLEX
+  mipi-cpol:
+    type: boolean
+    description: |
+      SPI clock polarity which indicates the clock idle state.
+      If it is used, the clock idle state is logic high; otherwise, low.
+  mipi-cpha:
+    type: boolean
+    description: |
+      SPI clock phase that indicates on which edge data is sampled.
+      If it is used, data is sampled on the second edge; otherwise, on the first edge.
+  mipi-hold-cs:
+    type: boolean
+    description: |
+      In some cases, it is necessary for the master to manage SPI chip select
+      under software control, so that multiple spi transactions can be performed
+      without releasing it. A typical use case is variable length SPI packets
+      where the first spi transaction reads the length and the second spi transaction
+      reads length bytes.