drivers: add SSD1673 EPD controller driver
Add SSD1673 electrophoretic display controller driver. Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This commit is contained in:
Johann Fischer
Anas Nashif
parent
419f4b7801
commit
3a66b86544
6 changed files with 705 additions and 0 deletions
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@ -7,3 +7,4 @@ zephyr_sources_ifdef(CONFIG_ILI9340_LCD_ADAFRUIT_1480
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display_ili9340_adafruit_1480.c
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)
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zephyr_sources_ifdef(CONFIG_SSD1306 ssd1306.c)
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zephyr_sources_ifdef(CONFIG_SSD1673 ssd1673.c)
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@ -23,4 +23,6 @@ source "drivers/display/Kconfig.ili9340"
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source "drivers/display/Kconfig.ssd1306"
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source "drivers/display/Kconfig.ssd1673"
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endif # DISPLAY
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29
drivers/display/Kconfig.ssd1673
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29
drivers/display/Kconfig.ssd1673
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@ -0,0 +1,29 @@
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# Kconfig - SSD1673 display controller configuration options
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#
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# Copyright (c) 2018 Phytec Messtechnik GmbH
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menuconfig SSD1673
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bool "SSD1673 display driver"
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depends on SPI
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help
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Enable driver for SSD1673 display driver.
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if SSD1673
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choice
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prompt "EPD display"
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default SSD1673_EPD_GDE0213B1
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help
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Specify the type of EPD connected to the SSD1673 controller.
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config SSD1673_EPD_GDE0213B1
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bool
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prompt "GDE0213B1 2.13\""
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endchoice
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endif #SSD1673
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532
drivers/display/ssd1673.c
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532
drivers/display/ssd1673.c
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@ -0,0 +1,532 @@
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/*
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* Copyright (c) 2018 PHYTEC Messtechnik GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define LOG_LEVEL CONFIG_DISPLAY_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(ssd1673);
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#include <string.h>
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#include <device.h>
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#include <display.h>
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#include <init.h>
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#include <gpio.h>
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#include <spi.h>
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#include "ssd1673_regs.h"
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#include <display/cfb.h>
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#define EPD_PANEL_WIDTH 250
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#define EPD_PANEL_HEIGHT 120
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#define EPD_PANEL_NUMOF_COLUMS 250
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#define EPD_PANEL_NUMOF_ROWS_PER_PAGE 8
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#define EPD_PANEL_NUMOF_PAGES (EPD_PANEL_HEIGHT / \
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EPD_PANEL_NUMOF_ROWS_PER_PAGE)
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#define SSD1673_PANEL_FIRST_PAGE 0
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#define SSD1673_PANEL_LAST_PAGE (EPD_PANEL_NUMOF_PAGES - 1)
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#define SSD1673_PANEL_FIRST_GATE 0
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#define SSD1673_PANEL_LAST_GATE 249
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struct ssd1673_data {
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struct device *reset;
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struct device *dc;
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struct device *busy;
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struct device *spi_dev;
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struct spi_config spi_config;
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#if defined(CONFIG_SSD1673_SPI_GPIO_CS)
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struct spi_cs_control cs_ctrl;
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#endif
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u8_t contrast;
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u8_t scan_mode;
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u8_t last_lut;
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u8_t numof_part_cycles;
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};
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#define SSD1673_LAST_LUT_INITIAL 0
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#define SSD1673_LAST_LUT_DEFAULT 255
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#define SSD1673_LUT_SIZE 29
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static u8_t ssd1673_lut_initial[SSD1673_LUT_SIZE] = {
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0x22, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x11,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x1E, 0x1E, 0x1E, 0x1E, 0x1E, 0x1E, 0x1E, 0x1E,
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0x01, 0x00, 0x00, 0x00, 0x00
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};
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static u8_t ssd1673_lut_default[SSD1673_LUT_SIZE] = {
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0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x0F, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00
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};
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static inline int ssd1673_write_cmd(struct ssd1673_data *driver,
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u8_t cmd, u8_t *data, size_t len)
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{
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struct spi_buf buf = {.buf = &cmd, .len = sizeof(cmd)};
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struct spi_buf_set buf_set = {.buffers = &buf, .count = 1};
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gpio_pin_write(driver->dc, CONFIG_SSD1673_DC_PIN, 0);
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if (spi_write(driver->spi_dev, &driver->spi_config, &buf_set)) {
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return -1;
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}
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if (data != NULL) {
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buf.buf = data;
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buf.len = len;
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gpio_pin_write(driver->dc, CONFIG_SSD1673_DC_PIN, 1);
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if (spi_write(driver->spi_dev, &driver->spi_config, &buf_set)) {
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return -1;
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}
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}
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return 0;
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}
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static inline void ssd1673_busy_wait(struct ssd1673_data *driver)
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{
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u32_t val = 0;
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gpio_pin_read(driver->busy, CONFIG_SSD1673_BUSY_PIN, &val);
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while (val) {
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k_busy_wait(SSD1673_BUSY_DELAY);
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gpio_pin_read(driver->busy, CONFIG_SSD1673_BUSY_PIN, &val);
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};
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}
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static inline int ssd1673_set_ram_param(struct ssd1673_data *driver,
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u8_t sx, u8_t ex, u8_t sy, u8_t ey)
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{
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u8_t tmp[2];
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tmp[0] = sx; tmp[1] = ex;
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if (ssd1673_write_cmd(driver, SSD1673_CMD_RAM_XPOS_CTRL,
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tmp, sizeof(tmp))) {
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return -1;
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}
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tmp[0] = sy; tmp[1] = ey;
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if (ssd1673_write_cmd(driver, SSD1673_CMD_RAM_YPOS_CTRL,
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tmp, sizeof(tmp))) {
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return -1;
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}
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return 0;
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}
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static inline int ssd1673_set_ram_ptr(struct ssd1673_data *driver,
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u8_t x, u8_t y)
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{
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if (ssd1673_write_cmd(driver, SSD1673_CMD_RAM_XPOS_CNTR,
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&x, sizeof(x))) {
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return -1;
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}
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if (ssd1673_write_cmd(driver, SSD1673_CMD_RAM_YPOS_CNTR,
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&y, sizeof(y))) {
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return -1;
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}
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return 0;
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}
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static inline void ssd1673_set_orientation(struct ssd1673_data *driver)
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{
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#if defined(CONFIG_SSD1673_ORIENTATION_FLIPPED)
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driver->scan_mode = SSD1673_DATA_ENTRY_XIYDY;
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#else
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driver->scan_mode = SSD1673_DATA_ENTRY_XDYIY;
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#endif
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}
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int ssd1673_resume(const struct device *dev)
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{
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struct ssd1673_data *driver = dev->driver_data;
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u8_t tmp;
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/*
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* Uncomment for voltage measurement
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* tmp = SSD1673_CTRL2_ENABLE_CLK;
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* ssd1673_write_cmd(SSD1673_CMD_UPDATE_CTRL2, &tmp, sizeof(tmp));
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* ssd1673_write_cmd(SSD1673_CMD_MASTER_ACTIVATION, NULL, 0);
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*/
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tmp = SSD1673_SLEEP_MODE_PON;
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return ssd1673_write_cmd(driver, SSD1673_CMD_SLEEP_MODE,
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&tmp, sizeof(tmp));
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}
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static int ssd1673_suspend(const struct device *dev)
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{
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struct ssd1673_data *driver = dev->driver_data;
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u8_t tmp = SSD1673_SLEEP_MODE_DSM;
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return ssd1673_write_cmd(driver, SSD1673_CMD_SLEEP_MODE,
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&tmp, sizeof(tmp));
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}
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static int ssd1673_update_display(const struct device *dev, bool initial)
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{
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struct ssd1673_data *driver = dev->driver_data;
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u8_t tmp;
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tmp = SSD1673_CTRL1_INITIAL_UPDATE_LH;
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if (ssd1673_write_cmd(driver, SSD1673_CMD_UPDATE_CTRL1,
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&tmp, sizeof(tmp))) {
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return -1;
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}
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if (initial) {
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driver->numof_part_cycles = 0;
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driver->last_lut = SSD1673_LAST_LUT_INITIAL;
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if (ssd1673_write_cmd(driver, SSD1673_CMD_UPDATE_LUT,
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ssd1673_lut_initial,
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sizeof(ssd1673_lut_initial))) {
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return -1;
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}
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} else {
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driver->numof_part_cycles++;
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if (driver->last_lut != SSD1673_LAST_LUT_DEFAULT) {
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driver->last_lut = SSD1673_LAST_LUT_DEFAULT;
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if (ssd1673_write_cmd(driver, SSD1673_CMD_UPDATE_LUT,
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ssd1673_lut_default,
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sizeof(ssd1673_lut_default))) {
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return -1;
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}
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}
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}
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tmp = (SSD1673_CTRL2_ENABLE_CLK |
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SSD1673_CTRL2_ENABLE_ANALOG |
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SSD1673_CTRL2_TO_PATTERN |
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SSD1673_CTRL2_DISABLE_ANALOG |
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SSD1673_CTRL2_DISABLE_CLK);
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if (ssd1673_write_cmd(driver, SSD1673_CMD_UPDATE_CTRL2,
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&tmp, sizeof(tmp))) {
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return -1;
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}
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if (ssd1673_write_cmd(driver, SSD1673_CMD_MASTER_ACTIVATION,
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NULL, 0)) {
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return -1;
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}
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return 0;
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}
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static int ssd1673_write(const struct device *dev, const u16_t x,
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const u16_t y,
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const struct display_buffer_descriptor *desc,
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const void *buf)
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{
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struct ssd1673_data *driver = dev->driver_data;
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u8_t cmd = SSD1673_CMD_WRITE_RAM;
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u8_t dummy_page[SSD1673_RAM_YRES];
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struct spi_buf sbuf = {.buf = &cmd, .len = 1};
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struct spi_buf_set buf_set = {.buffers = &sbuf, .count = 1};
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bool update = true;
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if (desc->pitch < desc->width) {
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LOG_ERR("Pitch is smaller then width");
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return -1;
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}
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if (buf == NULL || desc->buf_size == 0) {
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LOG_ERR("Display buffer is not available");
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return -1;
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}
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if (desc->pitch > desc->width) {
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LOG_ERR("Unsupported mode");
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return -1;
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}
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if (x != 0 && y != 0) {
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LOG_ERR("Unsupported origin");
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return -1;
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}
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ssd1673_busy_wait(driver);
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memset(dummy_page, 0xff, sizeof(dummy_page));
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switch (driver->scan_mode) {
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case SSD1673_DATA_ENTRY_XIYDY:
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if (ssd1673_set_ram_param(driver,
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SSD1673_PANEL_FIRST_PAGE,
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SSD1673_PANEL_LAST_PAGE + 1,
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SSD1673_PANEL_LAST_GATE,
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SSD1673_PANEL_FIRST_GATE)) {
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return -1;
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}
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if (ssd1673_set_ram_ptr(driver,
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SSD1673_PANEL_FIRST_PAGE,
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SSD1673_PANEL_LAST_GATE)) {
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return -1;
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}
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break;
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case SSD1673_DATA_ENTRY_XDYIY:
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if (ssd1673_set_ram_param(driver,
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SSD1673_PANEL_LAST_PAGE + 1,
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SSD1673_PANEL_FIRST_PAGE,
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SSD1673_PANEL_FIRST_GATE,
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SSD1673_PANEL_LAST_GATE)) {
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return -1;
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}
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if (ssd1673_set_ram_ptr(driver,
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SSD1673_PANEL_LAST_PAGE + 1,
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SSD1673_PANEL_FIRST_GATE)) {
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return -1;
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}
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break;
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default:
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return -1;
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}
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if (ssd1673_write_cmd(driver, SSD1673_CMD_ENTRY_MODE,
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&driver->scan_mode, sizeof(driver->scan_mode))) {
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return -1;
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}
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gpio_pin_write(driver->dc, CONFIG_SSD1673_DC_PIN, 0);
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if (spi_write(driver->spi_dev, &driver->spi_config, &buf_set)) {
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return -1;
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}
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gpio_pin_write(driver->dc, CONFIG_SSD1673_DC_PIN, 1);
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/* clear unusable page */
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if (driver->scan_mode == SSD1673_DATA_ENTRY_XDYIY) {
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sbuf.buf = dummy_page;
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sbuf.len = sizeof(dummy_page);
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if (spi_write(driver->spi_dev, &driver->spi_config, &buf_set)) {
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return -1;
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}
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}
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sbuf.buf = (u8_t *)buf;
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sbuf.len = desc->buf_size;
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if (spi_write(driver->spi_dev, &driver->spi_config, &buf_set)) {
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return -1;
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}
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/* clear unusable page */
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if (driver->scan_mode == SSD1673_DATA_ENTRY_XIYDY) {
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sbuf.buf = dummy_page;
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sbuf.len = sizeof(dummy_page);
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if (spi_write(driver->spi_dev, &driver->spi_config, &buf_set)) {
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return -1;
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}
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}
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if (update) {
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if (driver->contrast) {
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return ssd1673_update_display(dev, true);
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}
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return ssd1673_update_display(dev, false);
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}
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return 0;
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}
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static int ssd1673_read(const struct device *dev, const u16_t x,
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const u16_t y,
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const struct display_buffer_descriptor *desc,
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void *buf)
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{
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LOG_ERR("not supported");
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return -ENOTSUP;
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}
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static void *ssd1673_get_framebuffer(const struct device *dev)
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{
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LOG_ERR("not supported");
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return NULL;
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}
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static int ssd1673_set_brightness(const struct device *dev,
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const u8_t brightness)
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{
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LOG_WRN("not supported");
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return -ENOTSUP;
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}
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static int ssd1673_set_contrast(const struct device *dev, u8_t contrast)
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{
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struct ssd1673_data *driver = dev->driver_data;
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driver->contrast = contrast;
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return 0;
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}
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static void ssd1673_get_capabilities(const struct device *dev,
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struct display_capabilities *caps)
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{
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memset(caps, 0, sizeof(struct display_capabilities));
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caps->x_resolution = EPD_PANEL_WIDTH;
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caps->y_resolution = EPD_PANEL_HEIGHT;
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caps->supported_pixel_formats = PIXEL_FORMAT_MONO10;
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caps->current_pixel_format = PIXEL_FORMAT_MONO10;
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caps->screen_info = SCREEN_INFO_MONO_VTILED |
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SCREEN_INFO_MONO_MSB_FIRST |
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SCREEN_INFO_EPD;
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}
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static int ssd1673_set_pixel_format(const struct device *dev,
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const enum display_pixel_format pf)
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{
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LOG_ERR("not supported");
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return -ENOTSUP;
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}
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static int ssd1673_controller_init(struct device *dev)
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{
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struct ssd1673_data *driver = dev->driver_data;
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u8_t tmp[3];
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LOG_DBG("");
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gpio_pin_write(driver->reset, CONFIG_SSD1673_RESET_PIN, 0);
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k_sleep(SSD1673_RESET_DELAY);
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gpio_pin_write(driver->reset, CONFIG_SSD1673_RESET_PIN, 1);
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k_sleep(SSD1673_RESET_DELAY);
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ssd1673_busy_wait(driver);
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if (ssd1673_write_cmd(driver, SSD1673_CMD_SW_RESET, NULL, 0)) {
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return -1;
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}
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ssd1673_busy_wait(driver);
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tmp[0] = (SSD1673_RAM_YRES - 1);
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tmp[1] = 0;
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if (ssd1673_write_cmd(driver, SSD1673_CMD_GDO_CTRL, tmp, 2)) {
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return -1;
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}
|
||||
|
||||
tmp[0] = SSD1673_VAL_GDV_CTRL_A;
|
||||
tmp[1] = SSD1673_VAL_GDV_CTRL_B;
|
||||
if (ssd1673_write_cmd(driver, SSD1673_CMD_GDV_CTRL, tmp, 2)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tmp[0] = SSD1673_VAL_SDV_CTRL;
|
||||
if (ssd1673_write_cmd(driver, SSD1673_CMD_SDV_CTRL, tmp, 1)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tmp[0] = SSD1673_VAL_VCOM_VOLTAGE;
|
||||
if (ssd1673_write_cmd(driver, SSD1673_CMD_VCOM_VOLTAGE, tmp, 1)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tmp[0] = SSD1673_VAL_DUMMY_LINE;
|
||||
if (ssd1673_write_cmd(driver, SSD1673_CMD_DUMMY_LINE, tmp, 1)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tmp[0] = SSD1673_VAL_GATE_LWIDTH;
|
||||
if (ssd1673_write_cmd(driver, SSD1673_CMD_GATE_LINE_WIDTH, tmp, 1)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
ssd1673_set_orientation(driver);
|
||||
driver->numof_part_cycles = 0;
|
||||
driver->last_lut = SSD1673_LAST_LUT_INITIAL;
|
||||
driver->contrast = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ssd1673_init(struct device *dev)
|
||||
{
|
||||
struct ssd1673_data *driver = dev->driver_data;
|
||||
|
||||
LOG_DBG("");
|
||||
|
||||
driver->spi_dev = device_get_binding(CONFIG_SSD1673_SPI_DEV_NAME);
|
||||
if (driver->spi_dev == NULL) {
|
||||
LOG_ERR("Could not get SPI device for SSD1673");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
driver->spi_config.frequency = CONFIG_SSD1673_SPI_FREQ;
|
||||
driver->spi_config.operation = SPI_OP_MODE_MASTER | SPI_WORD_SET(8);
|
||||
driver->spi_config.slave = CONFIG_SSD1673_SPI_SLAVE_NUMBER;
|
||||
driver->spi_config.cs = NULL;
|
||||
|
||||
driver->reset = device_get_binding(CONFIG_SSD1673_RESET_GPIO_PORT_NAME);
|
||||
if (driver->reset == NULL) {
|
||||
LOG_ERR("Could not get GPIO port for SSD1673 reset");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
gpio_pin_configure(driver->reset, CONFIG_SSD1673_RESET_PIN,
|
||||
GPIO_DIR_OUT);
|
||||
|
||||
driver->dc = device_get_binding(CONFIG_SSD1673_DC_GPIO_PORT_NAME);
|
||||
if (driver->dc == NULL) {
|
||||
LOG_ERR("Could not get GPIO port for SSD1673 DC signal");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
gpio_pin_configure(driver->dc, CONFIG_SSD1673_DC_PIN,
|
||||
GPIO_DIR_OUT);
|
||||
|
||||
driver->busy = device_get_binding(CONFIG_SSD1673_BUSY_GPIO_PORT_NAME);
|
||||
if (driver->busy == NULL) {
|
||||
LOG_ERR("Could not get GPIO port for SSD1673 busy signal");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
gpio_pin_configure(driver->busy, CONFIG_SSD1673_BUSY_PIN,
|
||||
GPIO_DIR_IN);
|
||||
|
||||
#if defined(CONFIG_SSD1673_SPI_GPIO_CS)
|
||||
driver->cs_ctrl.gpio_dev = device_get_binding(
|
||||
CONFIG_SSD1673_SPI_GPIO_CS_DRV_NAME);
|
||||
if (!driver->cs_ctrl.gpio_dev) {
|
||||
LOG_ERR("Unable to get SPI GPIO CS device");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
driver->cs_ctrl.gpio_pin = CONFIG_SSD1673_SPI_GPIO_CS_PIN;
|
||||
driver->cs_ctrl.delay = 0;
|
||||
driver->spi_config.cs = &driver->cs_ctrl;
|
||||
#endif
|
||||
|
||||
ssd1673_controller_init(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct ssd1673_data ssd1673_driver;
|
||||
|
||||
static struct display_driver_api ssd1673_driver_api = {
|
||||
.blanking_on = ssd1673_resume,
|
||||
.blanking_off = ssd1673_suspend,
|
||||
.write = ssd1673_write,
|
||||
.read = ssd1673_read,
|
||||
.get_framebuffer = ssd1673_get_framebuffer,
|
||||
.set_brightness = ssd1673_set_brightness,
|
||||
.set_contrast = ssd1673_set_contrast,
|
||||
.get_capabilities = ssd1673_get_capabilities,
|
||||
.set_pixel_format = ssd1673_set_pixel_format,
|
||||
.set_orientation = NULL,
|
||||
};
|
||||
|
||||
|
||||
DEVICE_AND_API_INIT(ssd1673, CONFIG_SSD1673_DEV_NAME, ssd1673_init,
|
||||
&ssd1673_driver, NULL,
|
||||
POST_KERNEL, CONFIG_APPLICATION_INIT_PRIORITY,
|
||||
&ssd1673_driver_api);
|
||||
88
drivers/display/ssd1673_regs.h
Normal file
88
drivers/display/ssd1673_regs.h
Normal file
|
|
@ -0,0 +1,88 @@
|
|||
/* ssd1673_regs.h - Registers definition for SSD1673 controller */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2018 PHYTEC Messtechnik GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef __SSD1673_REGS_H__
|
||||
#define __SSD1673_REGS_H__
|
||||
|
||||
#define SSD1673_CMD_GDO_CTRL 0x01
|
||||
#define SSD1673_CMD_GDV_CTRL 0x03
|
||||
#define SSD1673_CMD_SDV_CTRL 0x04
|
||||
#define SSD1673_CMD_GSCAN_START 0x0f
|
||||
#define SSD1673_CMD_SLEEP_MODE 0x10
|
||||
#define SSD1673_CMD_ENTRY_MODE 0x11
|
||||
#define SSD1673_CMD_SW_RESET 0x12
|
||||
#define SSD1673_CMD_TSENS_CTRL 0x1a
|
||||
#define SSD1673_CMD_MASTER_ACTIVATION 0x20
|
||||
#define SSD1673_CMD_UPDATE_CTRL1 0x21
|
||||
#define SSD1673_CMD_UPDATE_CTRL2 0x22
|
||||
#define SSD1673_CMD_WRITE_RAM 0x24
|
||||
#define SSD1673_CMD_VCOM_SENSE 0x28
|
||||
#define SSD1673_CMD_VCOM_SENSE_DURATON 0x29
|
||||
#define SSD1673_CMD_PRGM_VCOM_OTP 0x2a
|
||||
#define SSD1673_CMD_VCOM_VOLTAGE 0x2c
|
||||
#define SSD1673_CMD_PRGM_WS_OTP 0x30
|
||||
#define SSD1673_CMD_UPDATE_LUT 0x32
|
||||
#define SSD1673_CMD_PRGM_OTP_SELECTION 0x36
|
||||
#define SSD1673_CMD_OTP_SELECTION_CTRL 0x37
|
||||
#define SSD1673_CMD_DUMMY_LINE 0x3a
|
||||
#define SSD1673_CMD_GATE_LINE_WIDTH 0x3b
|
||||
#define SSD1673_CMD_BWF_CTRL 0x3c
|
||||
#define SSD1673_CMD_RAM_XPOS_CTRL 0x44
|
||||
#define SSD1673_CMD_RAM_YPOS_CTRL 0x45
|
||||
#define SSD1673_CMD_RAM_XPOS_CNTR 0x4e
|
||||
#define SSD1673_CMD_RAM_YPOS_CNTR 0x4f
|
||||
|
||||
/* Data entry sequence modes */
|
||||
#define SSD1673_DATA_ENTRY_MASK 0x07
|
||||
#define SSD1673_DATA_ENTRY_XDYDX 0x00
|
||||
#define SSD1673_DATA_ENTRY_XIYDX 0x01
|
||||
#define SSD1673_DATA_ENTRY_XDYIX 0x02
|
||||
#define SSD1673_DATA_ENTRY_XIYIX 0x03
|
||||
#define SSD1673_DATA_ENTRY_XDYDY 0x04
|
||||
#define SSD1673_DATA_ENTRY_XIYDY 0x05
|
||||
#define SSD1673_DATA_ENTRY_XDYIY 0x06
|
||||
#define SSD1673_DATA_ENTRY_XIYIY 0x07
|
||||
|
||||
/* Options for display update */
|
||||
#define SSD1673_CTRL1_INITIAL_UPDATE_LL 0x00
|
||||
#define SSD1673_CTRL1_INITIAL_UPDATE_LH 0x01
|
||||
#define SSD1673_CTRL1_INITIAL_UPDATE_HL 0x02
|
||||
#define SSD1673_CTRL1_INITIAL_UPDATE_HH 0x03
|
||||
|
||||
/* Options for display update sequence */
|
||||
#define SSD1673_CTRL2_ENABLE_CLK 0x80
|
||||
#define SSD1673_CTRL2_ENABLE_ANALOG 0x40
|
||||
#define SSD1673_CTRL2_TO_INITIAL 0x08
|
||||
#define SSD1673_CTRL2_TO_PATTERN 0x04
|
||||
#define SSD1673_CTRL2_DISABLE_ANALOG 0x02
|
||||
#define SSD1673_CTRL2_DISABLE_CLK 0x01
|
||||
|
||||
#define SSD1673_SLEEP_MODE_DSM 0x01
|
||||
#define SSD1673_SLEEP_MODE_PON 0x00
|
||||
|
||||
/* Default values */
|
||||
#define SSD1673_VAL_GDV_CTRL_A 16
|
||||
#define SSD1673_VAL_GDV_CTRL_B 10
|
||||
#define SSD1673_VAL_SDV_CTRL 0x19
|
||||
#define SSD1673_VAL_VCOM_VOLTAGE 0xa8
|
||||
#define SSD1673_VAL_DUMMY_LINE 0x1a
|
||||
#define SSD1673_VAL_GATE_LWIDTH 0x08
|
||||
|
||||
/** Maximum resolution in the X direction */
|
||||
#define SSD1673_RAM_XRES 152
|
||||
/** Maximum resolution in the Y direction */
|
||||
#define SSD1673_RAM_YRES 250
|
||||
|
||||
/* time constants in ms */
|
||||
#define SSD1673_RESET_DELAY 1
|
||||
#define SSD1673_BUSY_DELAY 1
|
||||
|
||||
/** Size of each RAM in octets */
|
||||
#define SSD1673_RAM_SIZE (SSD1673_RAM_XRES * SSD1673_RAM_YRES / 8)
|
||||
|
||||
#endif /* __SSD1673_REGS_H__ */
|
||||
Loading…
Add table
Add a link
Reference in a new issue