diff --git a/dts/arm/armv7-m.dtsi b/dts/arm/armv7-m.dtsi
new file mode 100644
index 00000000000..e73a05a2b36
--- /dev/null
+++ b/dts/arm/armv7-m.dtsi
@@ -0,0 +1,25 @@
+#include "skeleton.dtsi"
+
+/ {
+	soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		interrupt-parent = <&nvic>;
+		ranges;
+
+		nvic: interrupt-controller@e000e100  {
+			compatible = "arm,armv7m-nvic";
+			reg = <0xe000e100 0xc00>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+		};
+
+		systick: timer@e000e010 {
+			compatible = "arm,armv7m-systick";
+			reg = <0xe000e010 0x10>;
+			status = "disabled";
+		};
+	};
+};
+
diff --git a/dts/arm/yaml/arm_cortex_m4_nvic.yaml b/dts/arm/yaml/arm_cortex_m4_nvic.yaml
new file mode 100644
index 00000000000..dfad8d9e1dc
--- /dev/null
+++ b/dts/arm/yaml/arm_cortex_m4_nvic.yaml
@@ -0,0 +1,37 @@
+---
+title: ARM Cortex M4 NVIC Interrupt Controller
+version: 0.1
+
+description: >
+    This binding describes the ARM Cortex M4 NVIC IRQ controller
+
+properties:
+  - compatible:
+      category: required
+      type: string
+      description: compatible strings
+      constraint: "arm,armv7m-nvic"
+
+  - reg:
+      category: required
+      type: int
+      description: mmio register space
+      generation: define
+
+  - num-irq-prio-bits:
+      category: required
+      type: int
+      description: number of bits of IRQ priorities
+      generation: define
+
+  - num-irqs:
+      category: required
+      type: int
+      description: number of interrupts controlled by controller
+      generation: define
+
+cell_prefix: IRQ
+
+"#cells":
+  - irq
+...
diff --git a/dts/common/skeleton.dtsi b/dts/common/skeleton.dtsi
new file mode 100644
index 00000000000..b41d241de2c
--- /dev/null
+++ b/dts/common/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value.  The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	chosen { };
+	aliases { };
+	memory { device_type = "memory"; reg = <0 0>; };
+};
diff --git a/dts/common/yaml/uart.yaml b/dts/common/yaml/uart.yaml
new file mode 100644
index 00000000000..6622395c577
--- /dev/null
+++ b/dts/common/yaml/uart.yaml
@@ -0,0 +1,25 @@
+---
+title: Uart Base Structure
+id: uart
+version: 0.1
+
+description: >
+    This binding gives the base structures for all UART devices
+
+properties:
+  - clock-frequency:
+      type: int
+      category: optional
+      description: Clock frequency information for UART operation
+      generation: define
+  - baud-rate:
+      type: int
+      category: required
+      description: Initial baud rate setting for UART
+      generation: define
+  - clocks:
+      type: array
+      category: required
+      description: Clock gate information
+      generation: define
+...
diff --git a/dts/common/yaml/zephyr_devices.yaml b/dts/common/yaml/zephyr_devices.yaml
new file mode 100644
index 00000000000..830f273ed16
--- /dev/null
+++ b/dts/common/yaml/zephyr_devices.yaml
@@ -0,0 +1,14 @@
+---
+title: Zephyr Device Specific Properties
+version: 0.1
+
+description: >
+    This binding describes Zephyr device specific properties
+
+properties:
+  - zephyr,irq-prio:
+      category: optional
+      type: int
+      description: priority setting
+      generation: define
+...