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ext: hal: nordic: Update nrfx to version 1.7.2

Browse source 
Update nrfx to the recently released version. See
https://github.com/NordicSemiconductor/nrfx/blob/v1.7.2/CHANGELOG.md
for a list of changes that this version introduces.

Origin: nrfx
License: BSD 3-Clause
URL: https://github.com/NordicSemiconductor/nrfx/tree/v1.7.2
commit: 13a7de7de72cfd444af468f11c0dbb9db7a26172
Purpose: Provide peripheral drivers for Nordic SoCs
Maintained-by: External

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2019-07-25 13:34:10 +02:00 • committed by Carles Cufí
commit 396bbae5f1
17 changed files with 401 additions and 175 deletions
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8
ext/hal/nordic/nrfx/README
View file

@ -2,10 +2,10 @@ nrfx
####
Origin:
https://github.com/NordicSemiconductor/nrfx/tree/v1.7.1
https://github.com/NordicSemiconductor/nrfx/tree/v1.7.2
Status:
v1.7.1
v1.7.2
Purpose:
With added proper shims adapting it to Zephyr's APIs, nrfx will provide
@ -32,7 +32,7 @@ URL:
https://github.com/NordicSemiconductor/nrfx
commit:
9d68726e41c321f1772c187bd12d82f5b13104f1
13a7de7de72cfd444af468f11c0dbb9db7a26172
Maintained-by:
External
@ -41,4 +41,4 @@ License:
BSD-3-Clause
License Link:
https://github.com/NordicSemiconductor/nrfx/blob/v1.7.1/LICENSE
https://github.com/NordicSemiconductor/nrfx/blob/v1.7.2/LICENSE

7
ext/hal/nordic/nrfx/drivers/include/nrfx_qspi.h
View file

@ -155,7 +155,8 @@ void nrfx_qspi_uninit(void);
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region
* or its address is not aligned to a 32-bit word.
*/
nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
size_t rx_buffer_length,
@ -182,7 +183,8 @@ nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
* @retval NRFX_ERROR_BUSY The driver currently handles other operation.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region
* or its address is not aligned to a 32-bit word.
*/
nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
size_t tx_buffer_length,
@ -208,6 +210,7 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
*
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
* @retval NRFX_ERROR_INVALID_ADDR The provided start address is not aligned to a 32-bit word.
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
*/
nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,

64
ext/hal/nordic/nrfx/drivers/include/nrfx_twi.h
View file

@ -98,6 +98,8 @@ typedef struct
#define NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
/** @brief Flag indicating that the TX transfer will not end with a stop condition. */
#define NRFX_TWI_FLAG_TX_NO_STOP (1UL << 5)
/** @brief Flag indicating that the transfer will be suspended. */
#define NRFX_TWI_FLAG_SUSPEND (1UL << 6)
/** @brief TWI master driver event types. */
typedef enum
@ -132,10 +134,10 @@ typedef struct
#define NRFX_TWI_XFER_DESC_TX(addr, p_data, length) \
{ \
.type = NRFX_TWI_XFER_TX, \
.address = addr, \
.primary_length = length, \
.address = (addr), \
.primary_length = (length), \
.secondary_length = 0, \
.p_primary_buf = p_data, \
.p_primary_buf = (p_data), \
.p_secondary_buf = NULL, \
}
@ -143,10 +145,10 @@ typedef struct
#define NRFX_TWI_XFER_DESC_RX(addr, p_data, length) \
{ \
.type = NRFX_TWI_XFER_RX, \
.address = addr, \
.primary_length = length, \
.address = (addr), \
.primary_length = (length), \
.secondary_length = 0, \
.p_primary_buf = p_data, \
.p_primary_buf = (p_data), \
.p_secondary_buf = NULL, \
}
@ -154,22 +156,22 @@ typedef struct
#define NRFX_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
{ \
.type = NRFX_TWI_XFER_TXRX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = rx_len, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_rx, \
.address = (addr), \
.primary_length = (tx_len), \
.secondary_length = (rx_len), \
.p_primary_buf = (p_tx), \
.p_secondary_buf = (p_rx), \
}
/** @brief Macro for setting the TX-TX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \
{ \
.type = NRFX_TWI_XFER_TXTX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = tx_len2, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_tx2, \
.address = (addr), \
.primary_length = (tx_len), \
.secondary_length = (tx_len2), \
.p_primary_buf = (p_tx), \
.p_secondary_buf = (p_tx2), \
}
/** @brief Structure for a TWI event. */
@ -230,6 +232,8 @@ void nrfx_twi_disable(nrfx_twi_t const * p_instance);
* The transmission will be stopped when an error occurs. If a transfer is ongoing,
* the function returns the error code @ref NRFX_ERROR_BUSY.
*
* @note This function is deprecated. Use @ref nrfx_twi_xfer instead.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] address Address of a specific slave device (only 7 LSB).
* @param[in] p_data Pointer to a transmit buffer.
@ -241,8 +245,11 @@ void nrfx_twi_disable(nrfx_twi_t const * p_instance);
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
* @retval NRFX_ERROR_INVALID_STATE RX transaction is suspended on bus.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK Negative acknowledgement (NACK) is received after sending
* the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK Negative acknowledgement (NACK) is received after sending
* a data byte in polling mode.
*/
nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance,
uint8_t address,
@ -256,6 +263,8 @@ nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance,
* The transmission will be stopped when an error occurs. If a transfer is ongoing,
* the function returns the error code @ref NRFX_ERROR_BUSY.
*
* @note This function is deprecated. Use @ref nrfx_twi_xfer instead.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] address Address of a specific slave device (only 7 LSB).
* @param[in] p_data Pointer to a receive buffer.
@ -264,17 +273,21 @@ nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance,
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
* @retval NRFX_ERROR_INVALID_STATE TX transaction is suspended on bus.
* @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK Negative acknowledgement (NACK) is received after sending
* the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK Negative acknowledgement (NACK) is received after sending
* a data byte in polling mode.
*/
nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
uint8_t address,
uint8_t * p_data,
size_t length);
/**
* @brief Function for preparing a TWI transfer.
* @brief Function for performing a TWI transfer.
*
* The following transfer types can be configured (@ref nrfx_twi_xfer_desc_t::type):
* - @ref NRFX_TWI_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between).
@ -287,6 +300,8 @@ nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
* Additional options are provided using the flags parameter:
* - @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER - No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer.
* - @ref NRFX_TWI_FLAG_TX_NO_STOP - No stop condition after TX transfer.
* - @ref NRFX_TWI_FLAG_SUSPEND - Transfer will be suspended. This allows for combining multiple transfers into one transaction.
* Only transactions with the same direction can be combined. To finish the transaction, call the function without this flag.
*
* @note
* Some flag combinations are invalid:
@ -300,9 +315,12 @@ nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
* @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
* @retval NRFX_ERROR_INVALID_STATE Other direction of transaction is suspended on the bus.
* @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data (TXRX and RX)
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK Negative acknowledgement (NACK) is received after sending
* the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK Negative acknowledgement (NACK) is received after sending
* a data byte in polling mode.
*/
nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance,
nrfx_twi_xfer_desc_t const * p_xfer_desc,

38
ext/hal/nordic/nrfx/drivers/include/nrfx_twim.h
View file

@ -144,10 +144,10 @@ typedef struct
#define NRFX_TWIM_XFER_DESC_TX(addr, p_data, length) \
{ \
.type = NRFX_TWIM_XFER_TX, \
.address = addr, \
.primary_length = length, \
.address = (addr), \
.primary_length = (length), \
.secondary_length = 0, \
.p_primary_buf = p_data, \
.p_primary_buf = (p_data), \
.p_secondary_buf = NULL, \
}
@ -155,10 +155,10 @@ typedef struct
#define NRFX_TWIM_XFER_DESC_RX(addr, p_data, length) \
{ \
.type = NRFX_TWIM_XFER_RX, \
.address = addr, \
.primary_length = length, \
.address = (addr), \
.primary_length = (length), \
.secondary_length = 0, \
.p_primary_buf = p_data, \
.p_primary_buf = (p_data), \
.p_secondary_buf = NULL, \
}
@ -166,22 +166,22 @@ typedef struct
#define NRFX_TWIM_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
{ \
.type = NRFX_TWIM_XFER_TXRX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = rx_len, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_rx, \
.address = (addr), \
.primary_length = (tx_len), \
.secondary_length = (rx_len), \
.p_primary_buf = (p_tx), \
.p_secondary_buf = (p_rx), \
}
/** @brief Macro for setting the TX-TX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \
{ \
.type = NRFX_TWIM_XFER_TXTX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = tx_len2, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_tx2, \
.address = (addr), \
.primary_length = (tx_len), \
.secondary_length = (tx_len2), \
.p_primary_buf = (p_tx), \
.p_secondary_buf = (p_tx2), \
}
/** @brief Structure for a TWI event. */
@ -242,6 +242,8 @@ void nrfx_twim_disable(nrfx_twim_t const * p_instance);
* The transmission will be stopped when an error occurs. If a transfer is ongoing,
* the function returns the error code @ref NRFX_ERROR_BUSY.
*
* @note This function is deprecated. Use @ref nrfx_twim_xfer instead.
*
* @note Peripherals using EasyDMA (including TWIM) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function fails with the error code NRFX_ERROR_INVALID_ADDR.
@ -276,6 +278,8 @@ nrfx_err_t nrfx_twim_tx(nrfx_twim_t const * p_instance,
* The transmission will be stopped when an error occurs. If a transfer is ongoing,
* the function returns the error code @ref NRFX_ERROR_BUSY.
*
* @note This function is deprecated. Use @ref nrfx_twim_xfer instead.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] address Address of a specific slave device (only 7 LSB).
* @param[in] p_data Pointer to a receive buffer.
@ -296,7 +300,7 @@ nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance,
size_t length);
/**
* @brief Function for preparing a TWI transfer.
* @brief Function for performing a TWI transfer.
*
* The following transfer types can be configured (@ref nrfx_twim_xfer_desc_t::type):
* - @ref NRFX_TWIM_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between).

11
ext/hal/nordic/nrfx/drivers/nrfx_common.h
View file

@ -136,6 +136,17 @@ extern "C" {
*/
#define NRFX_ARRAY_SIZE(array) (sizeof(array) / sizeof((array)[0]))
/**
* @brief Macro for getting the offset (in bytes) from the beginning of a structure
* of the specified type to its specified member.
*
* @param[in] type Structure type.
* @param[in] member Structure member whose offset is searched for.
*
* @return Member offset in bytes.
*/
#define NRFX_OFFSETOF(type, member) ((size_t)&(((type *)0)->member))
/**@brief Macro for checking if given lengths of EasyDMA transfers do not exceed
* the limit of the specified peripheral.
*

17
ext/hal/nordic/nrfx/drivers/src/nrfx_qspi.c
View file

@ -179,6 +179,7 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
{
nrf_qspi_cinstrdata_set(NRF_QSPI, p_config->length, p_tx_buffer);
}
nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
nrf_qspi_cinstr_transfer_start(NRF_QSPI, p_config);
@ -193,7 +194,6 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
return NRFX_ERROR_TIMEOUT;
}
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
if (p_rx_buffer)
{
@ -349,17 +349,14 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
NRFX_ASSERT(p_tx_buffer != NULL);
NRFX_ASSERT(nrfx_is_in_ram(p_tx_buffer));
NRFX_ASSERT(nrfx_is_word_aligned(p_tx_buffer));
if (!nrfx_is_in_ram(p_tx_buffer))
if (!nrfx_is_in_ram(p_tx_buffer) || !nrfx_is_word_aligned(p_tx_buffer))
{
return NRFX_ERROR_INVALID_ADDR;
}
nrf_qspi_write_buffer_set(NRF_QSPI, p_tx_buffer, tx_buffer_length, dst_address);
return qspi_task_perform(NRF_QSPI_TASK_WRITESTART);
}
nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
@ -368,10 +365,8 @@ nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
NRFX_ASSERT(p_rx_buffer != NULL);
NRFX_ASSERT(nrfx_is_in_ram(p_rx_buffer));
NRFX_ASSERT(nrfx_is_word_aligned(p_rx_buffer));
if (!nrfx_is_in_ram(p_rx_buffer))
if (!nrfx_is_in_ram(p_rx_buffer) || !nrfx_is_word_aligned(p_rx_buffer))
{
return NRFX_ERROR_INVALID_ADDR;
}
@ -384,6 +379,12 @@ nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
uint32_t start_address)
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
if (!nrfx_is_word_aligned((void const *)start_address))
{
return NRFX_ERROR_INVALID_ADDR;
}
nrf_qspi_erase_ptr_set(NRF_QSPI, start_address, length);
return qspi_task_perform(NRF_QSPI_TASK_ERASESTART);
}

180
ext/hal/nordic/nrfx/drivers/src/nrfx_twi.c
View file

@ -73,8 +73,20 @@
NRF_GPIO_PIN_S0D1, \
NRF_GPIO_PIN_NOSENSE)
#define TWI_FLAG_NO_STOP(flags) (flags & NRFX_TWI_FLAG_TX_NO_STOP)
#define TWI_FLAG_SUSPEND(flags) (flags & NRFX_TWI_FLAG_SUSPEND)
#define TWI_FLAG_NO_HANDLER_IN_USE(flags) (flags & NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER)
#define HW_TIMEOUT 100000
/* TWI master driver suspend types. */
typedef enum
{
TWI_NO_SUSPEND, //< Last transfer was not suspended.
TWI_SUSPEND_TX, //< Last transfer was TX and was suspended.
TWI_SUSPEND_RX //< Last transfer was RX and was suspended.
} twi_suspend_t;
// Control block - driver instance local data.
typedef struct
{
@ -85,7 +97,8 @@ typedef struct
uint32_t flags;
uint8_t * p_curr_buf;
size_t curr_length;
bool curr_no_stop;
bool curr_tx_no_stop;
twi_suspend_t prev_suspend;
nrfx_drv_state_t state;
bool error;
volatile bool busy;
@ -162,6 +175,7 @@ nrfx_err_t nrfx_twi_init(nrfx_twi_t const * p_instance,
p_cb->handler = event_handler;
p_cb->p_context = p_context;
p_cb->int_mask = 0;
p_cb->prev_suspend = TWI_NO_SUSPEND;
p_cb->repeated = false;
p_cb->busy = false;
p_cb->hold_bus_uninit = p_config->hold_bus_uninit;
@ -244,23 +258,26 @@ void nrfx_twi_disable(nrfx_twi_t const * p_instance)
}
static bool twi_send_byte(NRF_TWI_Type * p_twi,
uint8_t const * p_data,
size_t length,
size_t * p_bytes_transferred,
bool no_stop)
twi_control_block_t * p_cb)
{
if (*p_bytes_transferred < length)
if (p_cb->bytes_transferred < p_cb->curr_length)
{
nrf_twi_txd_set(p_twi, p_data[*p_bytes_transferred]);
++(*p_bytes_transferred);
nrf_twi_txd_set(p_twi, p_cb->p_curr_buf[p_cb->bytes_transferred]);
++(p_cb->bytes_transferred);
}
else
{
if (no_stop)
if (p_cb->curr_tx_no_stop)
{
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_SUSPEND);
return false;
}
else if(TWI_FLAG_SUSPEND(p_cb->flags))
{
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_SUSPEND);
p_cb->prev_suspend = TWI_SUSPEND_TX;
return false;
}
else
{
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP);
@ -269,40 +286,40 @@ static bool twi_send_byte(NRF_TWI_Type * p_twi,
return true;
}
static void twi_receive_byte(NRF_TWI_Type * p_twi,
uint8_t * p_data,
size_t length,
size_t * p_bytes_transferred)
static bool twi_receive_byte(NRF_TWI_Type * p_twi,
twi_control_block_t * p_cb)
{
if (*p_bytes_transferred < length)
if (p_cb->bytes_transferred < p_cb->curr_length)
{
p_data[*p_bytes_transferred] = nrf_twi_rxd_get(p_twi);
p_cb->p_curr_buf[p_cb->bytes_transferred] = nrf_twi_rxd_get(p_twi);
++(*p_bytes_transferred);
++(p_cb->bytes_transferred);
if (*p_bytes_transferred == length - 1)
if ((p_cb->bytes_transferred == p_cb->curr_length - 1) && (!TWI_FLAG_SUSPEND(p_cb->flags)))
{
nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_STOP_MASK);
}
else if (*p_bytes_transferred == length)
else if (p_cb->bytes_transferred == p_cb->curr_length && (!TWI_FLAG_SUSPEND(p_cb->flags)))
{
return;
return true;
}
else if (p_cb->bytes_transferred == p_cb->curr_length && TWI_FLAG_SUSPEND(p_cb->flags))
{
p_cb->prev_suspend = TWI_SUSPEND_RX;
return false;
}
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME);
}
return true;
}
static bool twi_transfer(NRF_TWI_Type * p_twi,
bool * p_error,
size_t * p_bytes_transferred,
uint8_t * p_data,
size_t length,
bool no_stop)
twi_control_block_t * p_cb)
{
bool do_stop_check = ((*p_error) || ((*p_bytes_transferred) == length));
bool do_stop_check = ((p_cb->error) || ((p_cb->bytes_transferred) == p_cb->curr_length));
if (*p_error)
if (p_cb->error)
{
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR);
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT);
@ -313,7 +330,7 @@ static bool twi_transfer(NRF_TWI_Type * p_twi,
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR);
NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR));
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP);
*p_error = true;
p_cb->error = true;
}
else
{
@ -326,11 +343,11 @@ static bool twi_transfer(NRF_TWI_Type * p_twi,
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR);
NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR));
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP);
*p_error = true;
p_cb->error = true;
}
else
{
if (!twi_send_byte(p_twi, p_data, length, p_bytes_transferred, no_stop))
if (!twi_send_byte(p_twi, p_cb))
{
return false;
}
@ -345,11 +362,14 @@ static bool twi_transfer(NRF_TWI_Type * p_twi,
NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR));
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR);
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP);
*p_error = true;
p_cb->error = true;
}
else
{
twi_receive_byte(p_twi, p_data, length, p_bytes_transferred);
if (!twi_receive_byte(p_twi, p_cb))
{
return false;
}
}
}
}
@ -357,6 +377,7 @@ static bool twi_transfer(NRF_TWI_Type * p_twi,
if (do_stop_check && nrf_twi_event_check(p_twi, NRF_TWI_EVENT_STOPPED))
{
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_STOPPED);
p_cb->prev_suspend = TWI_NO_SUSPEND;
NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_STOPPED));
return false;
}
@ -364,11 +385,8 @@ static bool twi_transfer(NRF_TWI_Type * p_twi,
return true;
}
static nrfx_err_t twi_tx_start_transfer(twi_control_block_t * p_cb,
NRF_TWI_Type * p_twi,
uint8_t const * p_data,
size_t length,
bool no_stop)
static nrfx_err_t twi_tx_start_transfer(NRF_TWI_Type * p_twi,
twi_control_block_t * p_cb)
{
nrfx_err_t ret_code = NRFX_SUCCESS;
volatile int32_t hw_timeout;
@ -386,9 +404,13 @@ static nrfx_err_t twi_tx_start_transfer(twi_control_block_t * p_cb,
// In case TWI is suspended resume its operation.
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME);
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTTX);
(void)twi_send_byte(p_twi, p_data, length, &p_cb->bytes_transferred, no_stop);
if (p_cb->prev_suspend != TWI_SUSPEND_TX)
{
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTTX);
}
(void)twi_send_byte(p_twi, p_cb);
if (p_cb->handler)
{
@ -396,17 +418,13 @@ static nrfx_err_t twi_tx_start_transfer(twi_control_block_t * p_cb,
NRF_TWI_INT_ERROR_MASK |
NRF_TWI_INT_TXDSENT_MASK |
NRF_TWI_INT_RXDREADY_MASK;
nrf_twi_int_enable(p_twi, p_cb->int_mask);
}
else
{
while ((hw_timeout > 0) &&
twi_transfer(p_twi,
&p_cb->error,
&p_cb->bytes_transferred,
(uint8_t *)p_data,
length,
no_stop))
twi_transfer(p_twi, p_cb))
{
hw_timeout--;
}
@ -432,10 +450,8 @@ static nrfx_err_t twi_tx_start_transfer(twi_control_block_t * p_cb,
return ret_code;
}
static nrfx_err_t twi_rx_start_transfer(twi_control_block_t * p_cb,
NRF_TWI_Type * p_twi,
uint8_t const * p_data,
size_t length)
static nrfx_err_t twi_rx_start_transfer(NRF_TWI_Type * p_twi,
twi_control_block_t * p_cb)
{
nrfx_err_t ret_code = NRFX_SUCCESS;
volatile int32_t hw_timeout;
@ -450,7 +466,7 @@ static nrfx_err_t twi_rx_start_transfer(twi_control_block_t * p_cb,
p_cb->bytes_transferred = 0;
p_cb->error = false;
if (length == 1)
if ((p_cb->curr_length == 1) && (!TWI_FLAG_SUSPEND(p_cb->flags)))
{
nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_STOP_MASK);
}
@ -460,7 +476,11 @@ static nrfx_err_t twi_rx_start_transfer(twi_control_block_t * p_cb,
}
// In case TWI is suspended resume its operation.
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME);
if (p_cb->prev_suspend != TWI_SUSPEND_RX)
{
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTRX);
}
if (p_cb->handler)
{
@ -473,12 +493,7 @@ static nrfx_err_t twi_rx_start_transfer(twi_control_block_t * p_cb,
else
{
while ((hw_timeout > 0) &&
twi_transfer(p_twi,
&p_cb->error,
&p_cb->bytes_transferred,
(uint8_t*)p_data,
length,
false))
twi_transfer(p_twi, p_cb))
{
hw_timeout--;
}
@ -502,14 +517,25 @@ static nrfx_err_t twi_rx_start_transfer(twi_control_block_t * p_cb,
return ret_code;
}
__STATIC_INLINE nrfx_err_t twi_xfer(twi_control_block_t * p_cb,
NRF_TWI_Type * p_twi,
__STATIC_INLINE nrfx_err_t twi_xfer(NRF_TWI_Type * p_twi,
twi_control_block_t * p_cb,
nrfx_twi_xfer_desc_t const * p_xfer_desc,
uint32_t flags)
{
nrfx_err_t err_code = NRFX_SUCCESS;
if ((p_cb->prev_suspend == TWI_SUSPEND_TX) && (p_xfer_desc->type == NRFX_TWI_XFER_RX))
{
/* RX is invalid after TX suspend */
return NRFX_ERROR_INVALID_STATE;
}
else if ((p_cb->prev_suspend == TWI_SUSPEND_RX) && (p_xfer_desc->type != NRFX_TWI_XFER_RX))
{
/* TX, TXRX and TXTX are invalid after RX suspend */
return NRFX_ERROR_INVALID_STATE;
}
/* Block TWI interrupts to ensure that function is not interrupted by TWI interrupt. */
nrf_twi_int_disable(p_twi, NRF_TWI_ALL_INTS_MASK);
@ -524,7 +550,7 @@ __STATIC_INLINE nrfx_err_t twi_xfer(twi_control_block_t * p_cb,
}
else
{
p_cb->busy = (NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER & flags) ? false : true;
p_cb->busy = (TWI_FLAG_NO_HANDLER_IN_USE(flags)) ? false : true;
}
p_cb->flags = flags;
@ -535,23 +561,14 @@ __STATIC_INLINE nrfx_err_t twi_xfer(twi_control_block_t * p_cb,
if (p_xfer_desc->type != NRFX_TWI_XFER_RX)
{
p_cb->curr_no_stop = ((p_xfer_desc->type == NRFX_TWI_XFER_TX) &&
p_cb->curr_tx_no_stop = ((p_xfer_desc->type == NRFX_TWI_XFER_TX) &&
!(flags & NRFX_TWI_FLAG_TX_NO_STOP)) ? false : true;
err_code = twi_tx_start_transfer(p_cb,
p_twi,
p_xfer_desc->p_primary_buf,
p_xfer_desc->primary_length,
p_cb->curr_no_stop);
err_code = twi_tx_start_transfer(p_twi, p_cb);
}
else
{
p_cb->curr_no_stop = false;
err_code = twi_rx_start_transfer(p_cb,
p_twi,
p_xfer_desc->p_primary_buf,
p_xfer_desc->primary_length);
err_code = twi_rx_start_transfer(p_twi, p_cb);
}
if (p_cb->handler == NULL)
{
@ -589,7 +606,7 @@ nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance,
NRFX_LOG_HEXDUMP_DEBUG(p_xfer_desc->p_secondary_buf,
p_xfer_desc->secondary_length * sizeof(p_xfer_desc->p_secondary_buf[0]));
err_code = twi_xfer(p_cb, (NRF_TWI_Type *)p_instance->p_twi, p_xfer_desc, flags);
err_code = twi_xfer((NRF_TWI_Type *)p_instance->p_twi, p_cb, p_xfer_desc, flags);
NRFX_LOG_WARNING("Function: %s, error code: %s.",
__func__,
NRFX_LOG_ERROR_STRING_GET(err_code));
@ -603,7 +620,6 @@ nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance,
bool no_stop)
{
nrfx_twi_xfer_desc_t xfer = NRFX_TWI_XFER_DESC_TX(address, (uint8_t*)p_data, length);
return nrfx_twi_xfer(p_instance, &xfer, no_stop ? NRFX_TWI_FLAG_TX_NO_STOP : 0);
}
@ -630,12 +646,7 @@ static void twi_irq_handler(NRF_TWI_Type * p_twi, twi_control_block_t * p_cb)
{
NRFX_ASSERT(p_cb->handler);
if (twi_transfer(p_twi,
&p_cb->error,
&p_cb->bytes_transferred,
p_cb->p_curr_buf,
p_cb->curr_length,
p_cb->curr_no_stop ))
if (twi_transfer(p_twi, p_cb))
{
return;
}
@ -647,19 +658,16 @@ static void twi_irq_handler(NRF_TWI_Type * p_twi, twi_control_block_t * p_cb)
{
p_cb->p_curr_buf = p_cb->xfer_desc.p_secondary_buf;
p_cb->curr_length = p_cb->xfer_desc.secondary_length;
p_cb->curr_no_stop = (p_cb->flags & NRFX_TWI_FLAG_TX_NO_STOP);
p_cb->curr_tx_no_stop = (p_cb->flags & NRFX_TWI_FLAG_TX_NO_STOP);
p_cb->prev_suspend = TWI_NO_SUSPEND;
if (p_cb->xfer_desc.type == NRFX_TWI_XFER_TXTX)
{
(void)twi_tx_start_transfer(p_cb,
p_twi,
p_cb->p_curr_buf,
p_cb->curr_length,
p_cb->curr_no_stop);
(void)twi_tx_start_transfer(p_twi, p_cb);
}
else
{
(void)twi_rx_start_transfer(p_cb, p_twi, p_cb->p_curr_buf, p_cb->curr_length);
(void)twi_rx_start_transfer(p_twi, p_cb);
}
}
else
@ -689,7 +697,7 @@ static void twi_irq_handler(NRF_TWI_Type * p_twi, twi_control_block_t * p_cb)
p_cb->busy = false;
if (!(NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER & p_cb->flags))
if (!(TWI_FLAG_NO_HANDLER_IN_USE(p_cb->flags)))
{
p_cb->handler(&event, p_cb->p_context);
}

13
ext/hal/nordic/nrfx/drivers/src/nrfx_uart.c
View file

@ -58,7 +58,7 @@ typedef struct
uint8_t const * p_tx_buffer;
uint8_t * p_rx_buffer;
uint8_t * p_rx_secondary_buffer;
size_t tx_buffer_length;
volatile size_t tx_buffer_length;
size_t rx_buffer_length;
size_t rx_secondary_buffer_length;
volatile size_t tx_counter;
@ -242,7 +242,10 @@ static void tx_byte(NRF_UART_Type * p_uart, uart_control_block_t * p_cb)
static bool tx_blocking(NRF_UART_Type * p_uart, uart_control_block_t * p_cb)
{
while (p_cb->tx_counter < p_cb->tx_buffer_length)
// Use a local variable to avoid undefined order of accessing two volatile variables
// in one statement.
size_t const tx_buffer_length = p_cb->tx_buffer_length;
while (p_cb->tx_counter < tx_buffer_length)
{
// Wait until the transmitter is ready to accept a new byte.
// Exit immediately if the transfer has been aborted.
@ -598,8 +601,10 @@ static void uart_irq_handler(NRF_UART_Type * p_uart,
if (nrf_uart_event_check(p_uart, NRF_UART_EVENT_TXDRDY))
{
if (p_cb->tx_counter < p_cb->tx_buffer_length &&
!p_cb->tx_abort)
// Use a local variable to avoid undefined order of accessing two volatile variables
// in one statement.
size_t const tx_buffer_length = p_cb->tx_buffer_length;
if (p_cb->tx_counter < tx_buffer_length && !p_cb->tx_abort)
{
tx_byte(p_uart, p_cb);
}

12
ext/hal/nordic/nrfx/drivers/src/nrfx_uarte.c
View file

@ -85,7 +85,6 @@
UARTE2_LENGTH_VALIDATE(drv_inst_idx, length, 0) || \
UARTE3_LENGTH_VALIDATE(drv_inst_idx, length, 0))
typedef struct
{
void * p_context;
@ -260,13 +259,20 @@ void nrfx_uarte_uninit(nrfx_uarte_t const * p_instance)
{
uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
nrf_uarte_disable(p_instance->p_reg);
if (p_cb->handler)
{
interrupts_disable(p_instance);
}
// Make sure all transfers are finished before UARTE is disabled
// to achieve the lowest power consumption.
nrf_uarte_shorts_disable(p_instance->p_reg, NRF_UARTE_SHORT_ENDRX_STARTRX);
nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPRX);
nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED);
nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPTX);
while (!nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED))
{}
nrf_uarte_disable(p_instance->p_reg);
pins_to_default(p_instance);
#if NRFX_CHECK(NRFX_PRS_ENABLED)

7
ext/hal/nordic/nrfx/drivers/src/nrfx_usbd.c
View file

@ -1485,7 +1485,8 @@ static void usbd_dmareq_process(void)
/* There is a lot of USBD registers that cannot be accessed during EasyDMA transfer.
* This is quick fix to maintain stability of the stack.
* It cost some performance but makes stack stable. */
while (!nrf_usbd_event_check(nrfx_usbd_ep_to_endevent(ep)))
while (!nrf_usbd_event_check(nrfx_usbd_ep_to_endevent(ep)) &&
!nrf_usbd_event_check(NRF_USBD_EVENT_USBRESET))
{
/* Empty */
}
@ -1998,7 +1999,9 @@ void nrfx_usbd_force_bus_wakeup(void)
void nrfx_usbd_ep_max_packet_size_set(nrfx_usbd_ep_t ep, uint16_t size)
{
/* Only power of 2 size allowed */
NRFX_ASSERT((size != 0) && (size & (size - 1)) == 0);
NRFX_ASSERT((size & 0x01) == 0);
/* 0 allowed only for ISO endpoints */
NRFX_ASSERT((size != 0) || NRF_USBD_EPISO_CHECK(ep));
/* Packet size cannot be higher than maximum buffer size */
NRFX_ASSERT((NRF_USBD_EPISO_CHECK(ep) && (size <= usbd_ep_iso_capacity(ep))) ||
(!NRF_USBD_EPISO_CHECK(ep) && (size <= NRFX_USBD_EPSIZE)));

15
ext/hal/nordic/nrfx/hal/nrf_clock.h
View file

@ -48,8 +48,7 @@ extern "C" {
* (HFCLK) settings.
*/
#if defined(CLOCK_LFCLKSRC_BYPASS_Enabled) && \
defined(CLOCK_LFCLKSRC_EXTERNAL_Enabled)
#if defined(CLOCK_LFCLKSRC_BYPASS_Msk) && defined(CLOCK_LFCLKSRC_EXTERNAL_Msk)
// Enable support for external LFCLK sources. Read more in the Product Specification.
#define NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES
#endif
@ -133,7 +132,11 @@ typedef enum
NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */
#if (NRF_CLOCK_HAS_CALIBRATION) || defined(__NRFX_DOXYGEN__)
NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */
NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */
NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk, /**< Interrupt on CTTO event. */
#endif
#if defined(CLOCK_INTENSET_CTSTARTED_Msk) || defined(__NRFX_DOXYGEN__)
NRF_CLOCK_INT_CTSTARTED_MASK = CLOCK_INTENSET_CTSTARTED_Msk, /**< Interrupt on CTSTARTED event. */
NRF_CLOCK_INT_CTSTOPPED_MASK = CLOCK_INTENSET_CTSTOPPED_Msk /**< Interrupt on CTSTOPPED event. */
#endif
} nrf_clock_int_mask_t;
@ -163,7 +166,11 @@ typedef enum
NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/
#if (NRF_CLOCK_HAS_CALIBRATION) || defined(__NRFX_DOXYGEN__)
NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/
NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/
NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO), /**< Calibration timer time-out.*/
#endif
#if defined(CLOCK_INTENSET_CTSTARTED_Msk) || defined(__NRFX_DOXYGEN__)
NRF_CLOCK_EVENT_CTSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_CTSTARTED), /**< Calibration timer started.*/
NRF_CLOCK_EVENT_CTSTOPPED = offsetof(NRF_CLOCK_Type, EVENTS_CTSTOPPED) /**< Calibration timer stopped.*/
#endif
} nrf_clock_event_t;

47
ext/hal/nordic/nrfx/hal/nrf_dppi.h
View file

@ -82,6 +82,17 @@ typedef enum
*/
__STATIC_INLINE void nrf_dppi_task_trigger(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t dppi_task);
/**
* @brief Function for getting the address of the specified DPPI task register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Requested task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_dppi_task_address_get(NRF_DPPIC_Type const * p_reg,
nrf_dppi_task_t task);
/**
* @brief Function for checking the state of a specific DPPI channel.
*
@ -200,6 +211,24 @@ __STATIC_INLINE void nrf_dppi_group_enable(NRF_DPPIC_Type * p_reg,
__STATIC_INLINE void nrf_dppi_group_disable(NRF_DPPIC_Type * p_reg,
nrf_dppi_channel_group_t group);
/**
* @brief Function for getting the ENABLE task associated with the specified channel group.
*
* @param[in] index Channel group index.
*
* @return Requested ENABLE task.
*/
__STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_enable_task_get(uint8_t index);
/**
* @brief Function for getting the DISABLE task associated with the specified channel group.
*
* @param[in] index Channel group index.
*
* @return Requested DISABLE task.
*/
__STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_disable_task_get(uint8_t index);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@ -208,6 +237,12 @@ __STATIC_INLINE void nrf_dppi_task_trigger(NRF_DPPIC_Type * p_reg, nrf_dppi_task
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) dppi_task)) = 1;
}
__STATIC_INLINE uint32_t nrf_dppi_task_address_get(NRF_DPPIC_Type const * p_reg,
nrf_dppi_task_t task)
{
return (uint32_t) ((uint8_t *) p_reg + (uint32_t ) task);
}
__STATIC_INLINE bool nrf_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel)
{
return ((p_reg->CHEN & (DPPIC_CHEN_CH0_Enabled << (DPPIC_CHEN_CH0_Pos + channel))) != 0);
@ -274,6 +309,18 @@ __STATIC_INLINE void nrf_dppi_group_disable(NRF_DPPIC_Type * p_reg,
p_reg->TASKS_CHG[(uint32_t) group].DIS = 1;
}
__STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_enable_task_get(uint8_t index)
{
NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_DPPIC->TASKS_CHG));
return (nrf_dppi_task_t)NRFX_OFFSETOF(NRF_DPPIC_Type, TASKS_CHG[index].EN);
}
__STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_disable_task_get(uint8_t index)
{
NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_DPPIC->TASKS_CHG));
return (nrf_dppi_task_t)NRFX_OFFSETOF(NRF_DPPIC_Type, TASKS_CHG[index].DIS);
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */

69
ext/hal/nordic/nrfx/hal/nrf_gpiote.h
View file

@ -345,6 +345,46 @@ __STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx);
*/
__STATIC_INLINE bool nrf_gpiote_te_is_enabled(uint32_t idx);
/**
* @brief Function for getting the OUT task associated with the specified GPIOTE channel.
*
* @param[in] index Channel index.
*
* @return Requested OUT task.
*/
__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_out_task_get(uint8_t index);
#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for getting the SET task associated with the specified GPIOTE channel.
*
* @param[in] index Channel index.
*
* @return Requested SET task.
*/
__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_set_task_get(uint8_t index);
#endif
#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for getting the CLR task associated with the specified GPIOTE channel.
*
* @param[in] index Channel index.
*
* @return Requested CLR task.
*/
__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_clr_task_get(uint8_t index);
#endif
/**
* @brief Function for getting the IN event associated with the specified GPIOTE channel.
*
* @param[in] index Channel index.
*
* @return Requested IN event.
*/
__STATIC_INLINE nrf_gpiote_events_t nrf_gpiote_in_event_get(uint8_t index);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task)
@ -493,6 +533,35 @@ __STATIC_INLINE bool nrf_gpiote_te_is_enabled(uint32_t idx)
{
return (NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_MODE_Msk) != GPIOTE_CONFIG_MODE_Disabled;
}
__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_out_task_get(uint8_t index)
{
NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_GPIOTE->TASKS_OUT));
return (nrf_gpiote_tasks_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, TASKS_OUT[index]);
}
#if defined(GPIOTE_FEATURE_SET_PRESENT)
__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_set_task_get(uint8_t index)
{
NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_GPIOTE->TASKS_SET));
return (nrf_gpiote_tasks_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, TASKS_SET[index]);
}
#endif
#if defined(GPIOTE_FEATURE_CLR_PRESENT)
__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_clr_task_get(uint8_t index)
{
NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_GPIOTE->TASKS_CLR));
return (nrf_gpiote_tasks_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, TASKS_CLR[index]);
}
#endif
__STATIC_INLINE nrf_gpiote_events_t nrf_gpiote_in_event_get(uint8_t index)
{
NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_GPIOTE->EVENTS_IN));
return (nrf_gpiote_events_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, EVENTS_IN[index]);
}
#endif //SUPPRESS_INLINE_IMPLEMENTATION
/** @} */

30
ext/hal/nordic/nrfx/hal/nrf_ppi.h
View file

@ -333,6 +333,24 @@ __STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel
*/
__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group);
/**
* @brief Function for getting the ENABLE task associated with the specified channel group.
*
* @param[in] index Channel group index.
*
* @return Requested ENABLE task.
*/
__STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_enable_task_get(uint8_t index);
/**
* @brief Function for getting the DISABLE task associated with the specified channel group.
*
* @param[in] index Channel group index.
*
* @return Requested DISABLE task.
*/
__STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_disable_task_get(uint8_t index);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@ -474,6 +492,18 @@ __STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channe
return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].DIS;
}
__STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_enable_task_get(uint8_t index)
{
NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_PPI->TASKS_CHG));
return (nrf_ppi_task_t)NRFX_OFFSETOF(NRF_PPI_Type, TASKS_CHG[index].EN);
}
__STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_disable_task_get(uint8_t index)
{
NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_PPI->TASKS_CHG));
return (nrf_ppi_task_t)NRFX_OFFSETOF(NRF_PPI_Type, TASKS_CHG[index].DIS);
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */

2
ext/hal/nordic/nrfx/hal/nrf_radio.h
View file

@ -1042,7 +1042,7 @@ __STATIC_INLINE void nrf_radio_frequency_set(uint16_t radio_frequency)
NRF_RADIO->FREQUENCY = delta;
#else
NRFX_ASSERT(radio_frequency >= 2400);
NRF_RADIO->FREQUENCY = (uint32_t)(2400 - radio_frequency);
NRF_RADIO->FREQUENCY = (uint32_t)(radio_frequency - 2400);
#endif //defined(RADIO_FREQUENCY_MAP_Msk)
}

16
ext/hal/nordic/nrfx/hal/nrf_rtc.h
View file

@ -275,6 +275,15 @@ __STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_reg, uint32_t mask);
*/
__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t event);
/**
* @brief Function for getting the COMPARE event associated with the specified compare channel.
*
* @param[in] index Compare channel index.
*
* @return Requested COMPARE event.
*/
__STATIC_INLINE nrf_rtc_event_t nrf_rtc_compare_event_get(uint8_t index);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@ -386,10 +395,17 @@ __STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_reg, uint32_t mask)
{
p_reg->EVTENSET = mask;
}
__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t mask)
{
p_reg->EVTENCLR = mask;
}
__STATIC_INLINE nrf_rtc_event_t nrf_rtc_compare_event_get(uint8_t index)
{
return (nrf_rtc_event_t)NRFX_OFFSETOF(NRF_RTC_Type, EVENTS_COMPARE[index]);
}
#endif
/** @} */

6
ext/hal/nordic/nrfx/hal/nrf_timer.h
View file

@ -658,14 +658,12 @@ __STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg,
__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel)
{
return (nrf_timer_task_t)
((uint32_t)NRF_TIMER_TASK_CAPTURE0 + (channel * sizeof(uint32_t)));
return (nrf_timer_task_t)NRFX_OFFSETOF(NRF_TIMER_Type, TASKS_CAPTURE[channel]);
}
__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel)
{
return (nrf_timer_event_t)
((uint32_t)NRF_TIMER_EVENT_COMPARE0 + (channel * sizeof(uint32_t)));
return (nrf_timer_event_t)NRFX_OFFSETOF(NRF_TIMER_Type, EVENTS_COMPARE[channel]);
}
__STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel)