driver: update gpt driver to support internal divider by dts
using dts support gpt clock source and divider Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
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parent
2a6657f952
commit
3940b407d9
1 changed files with 19 additions and 3 deletions
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@ -7,6 +7,7 @@
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#define DT_DRV_COMPAT nxp_imx_gpt
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#include <drivers/counter.h>
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#include <drivers/clock_control.h>
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#include <fsl_gpt.h>
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#include <logging/log.h>
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@ -15,6 +16,8 @@ LOG_MODULE_REGISTER(mcux_gpt, CONFIG_COUNTER_LOG_LEVEL);
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struct mcux_gpt_config {
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/* info must be first element */
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struct counter_config_info info;
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char *clock_name;
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clock_control_subsys_t clock_subsys;
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GPT_Type *base;
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clock_name_t clock_source;
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};
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@ -169,13 +172,24 @@ static uint32_t mcux_gpt_get_max_relative_alarm(const struct device *dev)
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static int mcux_gpt_init(const struct device *dev)
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{
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const struct mcux_gpt_config *config = dev->config;
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const struct device *clock_dev;
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gpt_config_t gptConfig;
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uint32_t clock_freq;
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clock_dev = device_get_binding(config->clock_name);
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if (clock_dev == NULL) {
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return -EINVAL;
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}
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if (clock_control_get_rate(clock_dev, config->clock_subsys,
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&clock_freq)) {
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return -EINVAL;
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}
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/* Adjust divider to match expected freq */
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clock_freq = CLOCK_GetFreq(config->clock_source);
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if (clock_freq % config->info.freq) {
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LOG_ERR("Cannot Adjust GPT freq to %u\n", config->info.freq);
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LOG_ERR("clock src is %u\n", clock_freq);
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return -EINVAL;
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}
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@ -205,10 +219,12 @@ static const struct counter_driver_api mcux_gpt_driver_api = {
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\
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static const struct mcux_gpt_config mcux_gpt_config_ ## n = { \
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.base = (void *)DT_INST_REG_ADDR(n), \
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.clock_source = kCLOCK_PerClk, \
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.clock_name = DT_INST_CLOCKS_LABEL(n), \
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.clock_subsys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
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.info = { \
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.max_top_value = UINT32_MAX, \
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.freq = 25000000, \
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.freq = DT_INST_PROP(n, gptfreq), \
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.channels = 1, \
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.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
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}, \
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