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checkpatch: error - spacing

Browse source 
Change-Id: Ie6e1c43581dd4b0734625b3a4e59a4ca79619e99
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
This commit is contained in:
Dan Kalowsky 2015-10-14 13:34:31 -07:00 • committed by Anas Nashif
commit 39063598db
27 changed files with 312 additions and 308 deletions
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2
arch/arc/core/sys_fatal_error_handler.c
View file

@ -68,7 +68,7 @@ static inline void nonEssentialTaskAbort(void)
void _SysFatalErrorHandler(
unsigned int reason, /* fatal error reason */
const NANO_ESF *pEsf /* pointer to exception stack frame */
const NANO_ESF * pEsf /* pointer to exception stack frame */
)
{
nano_context_type_t curCtx = sys_execution_context_type_get();

4
arch/x86/include/asm_inline_gcc.h
View file

@ -26,8 +26,8 @@
#ifdef _ASMLANGUAGE
#define SYS_NANO_CPU_EXC_CONNECT(handler,vector) \
NANO_CPU_EXC_CONNECT_NO_ERR(handler,vector,0)
#define SYS_NANO_CPU_EXC_CONNECT(handler, vector) \
NANO_CPU_EXC_CONNECT_NO_ERR(handler, vector, 0)
#else /* !_ASMLANGUAGE */

484
arch/x86/platforms/galileo/galileo_pinmux.c
View file

@ -119,422 +119,422 @@ struct mux_path _galileo_path[CONFIG_PINMUX_NUM_PINS * NUM_PIN_FUNCS] = {
{0, PINMUX_FUNC_A, {{ EXP1, 0, PIN_HIGH, (GPIO_DIR_OUT) }, /* GPIO3 out */
{ EXP1, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 3, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{0, PINMUX_FUNC_B, {{ EXP1, 0, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO3 in */
{ EXP1, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 3, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_DW, 3, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{0, PINMUX_FUNC_C, {{ EXP1, 0, PIN_LOW, (GPIO_DIR_OUT) }, /* UART0_RXD */
{ EXP1, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{0, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{0, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{1, PINMUX_FUNC_A, {{ EXP1, 13, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO4 out */
{ EXP0, 12, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 13, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 4, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{1, PINMUX_FUNC_B, {{ EXP1, 13, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO4 in */
{ EXP0, 12, PIN_HIGH, (GPIO_DIR_OUT)},
{ EXP0, 12, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 13, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 4, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{1, PINMUX_FUNC_C, {{ EXP1, 13, PIN_HIGH, (GPIO_DIR_OUT)}, /* UART0_TXD */
{ G_DW, 4, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{1, PINMUX_FUNC_C, {{ EXP1, 13, PIN_HIGH, (GPIO_DIR_OUT) }, /* UART0_TXD */
{ EXP0, 12, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 13, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{1, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{1, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{2, PINMUX_FUNC_A, {{ PWM0, 13, PIN_HIGH, (GPIO_DIR_OUT) }, /* GPIO5 out */
{ EXP1, 2, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP1, 3, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{2, PINMUX_FUNC_B, {{ PWM0, 13, PIN_HIGH, (GPIO_DIR_OUT) }, /* GPIO5 in */
{ EXP1, 2, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP1, 3, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 5, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_DW, 5, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{2, PINMUX_FUNC_C, {{ PWM0, 13, PIN_LOW, (GPIO_DIR_OUT) }, /* UART1_RXD */
{ EXP1, 2, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP1, 3, PIN_HIGH, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{2, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{2, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{3, PINMUX_FUNC_A, {{ PWM0, 0, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO6 out */
{ PWM0, 12, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 0, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 6, PIN_LOW, (GPIO_DIR_OUT) }}},
{ G_DW, 6, PIN_LOW, (GPIO_DIR_OUT) } } },
{3, PINMUX_FUNC_B, {{ PWM0, 0, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO6 in */
{ PWM0, 12, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 0, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 6, PIN_LOW, (GPIO_DIR_IN ) }}},
{ G_DW, 6, PIN_LOW, (GPIO_DIR_IN) } } },
{3, PINMUX_FUNC_C, {{ PWM0, 0, PIN_LOW, (GPIO_DIR_OUT) }, /* UART1_TXD */
{ PWM0, 12, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 0, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{3, PINMUX_FUNC_D, {{ PWM0, 0, PIN_HIGH, (GPIO_DIR_OUT) }, /* PWM.LED1 */
{ PWM0, 12, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 0, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{4, PINMUX_FUNC_A, {{ EXP1, 4, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS4 out */
{ EXP1, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 4, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{4, PINMUX_FUNC_B, {{ EXP1, 4, PIN_HIGH, (GPIO_DIR_OUT) }, /* GPIO_SUS4 in */
{ EXP1, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 4, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{4, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{4, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_RW, 4, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{4, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{4, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{5, PINMUX_FUNC_A, {{ PWM0, 2, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO8 (out) */
{ EXP0, 2, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 3, PIN_LOW, (GPIO_DIR_OUT) },
{ G_CW, 0, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{5, PINMUX_FUNC_B, {{ PWM0, 2, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO8 (in) */
{ EXP0, 2, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 3, PIN_LOW, (GPIO_DIR_OUT) },
{ G_CW, 0, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{5, PINMUX_FUNC_C, {{ PWM0, 2, PIN_HIGH, (GPIO_DIR_OUT) }, /* PWM.LED3 */
{ EXP0, 2, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 3, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{5, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{5, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{6, PINMUX_FUNC_A, {{ PWM0, 4, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO9 (out) */
{ EXP0, 4, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ G_CW, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{6, PINMUX_FUNC_B, {{ PWM0, 4, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO9 (in) */
{ EXP0, 4, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 4, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ G_CW, 1, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_CW, 1, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{6, PINMUX_FUNC_C, {{ PWM0, 4, PIN_HIGH, (GPIO_DIR_OUT) }, /* PWM.LED5 */
{ EXP0, 4, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{6, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{6, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{7, PINMUX_FUNC_A, {{ EXP1, 6, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS0 (out) */
{ EXP1, 7, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 0, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{7, PINMUX_FUNC_B, {{ EXP1, 6, PIN_LOW, (GPIO_DIR_IN ) }, /* GPIO_SUS0 (in) */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{7, PINMUX_FUNC_B, {{ EXP1, 6, PIN_LOW, (GPIO_DIR_IN) }, /* GPIO_SUS0 (in) */
{ EXP1, 7, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 0, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{7, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{7, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_RW, 0, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{7, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{7, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{8, PINMUX_FUNC_A, {{ EXP1, 8, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS1 (out) */
{ EXP1, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{8, PINMUX_FUNC_B, {{ EXP1, 8, PIN_LOW, (GPIO_DIR_IN ) }, /* GPIO_SUS1 (in) */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{8, PINMUX_FUNC_B, {{ EXP1, 8, PIN_LOW, (GPIO_DIR_IN) }, /* GPIO_SUS1 (in) */
{ EXP1, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 1, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{8, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{8, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_RW, 1, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{8, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{8, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{9, PINMUX_FUNC_A, {{ PWM0, 6, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS2 (out) */
{ EXP0, 6, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 7, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 2, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{9, PINMUX_FUNC_B, {{ PWM0, 6, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS2 (in) */
{ EXP0, 6, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 7, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 2, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_RW, 2, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{9, PINMUX_FUNC_C, {{ PWM0, 6, PIN_HIGH, (GPIO_DIR_OUT) }, /* PWM.LED7 */
{ EXP0, 6, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 7, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{9, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{9, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{10, PINMUX_FUNC_A, {{ PWM0, 10, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO2 (out) */
{ EXP0, 10, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 2, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{10, PINMUX_FUNC_B, {{ PWM0, 10, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO2 (in) */
{ EXP0, 10, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 2, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_DW, 2, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{10, PINMUX_FUNC_C, {{ PWM0, 10, PIN_HIGH, (GPIO_DIR_OUT) }, /* PWM.LED11 */
{ EXP0, 10, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{10, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{10, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{11, PINMUX_FUNC_A, {{ EXP1, 12, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS3 (out) */
{ PWM0, 8, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 8, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 3, PIN_LOW, (GPIO_DIR_OUT) }}},
{ G_RW, 3, PIN_LOW, (GPIO_DIR_OUT) } } },
{11, PINMUX_FUNC_B, {{ EXP1, 12, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS3 (in) */
{ PWM0, 8, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 8, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 3, PIN_LOW, (GPIO_DIR_IN ) }}},
{ G_RW, 3, PIN_LOW, (GPIO_DIR_IN) } } },
{11, PINMUX_FUNC_C, {{ EXP1, 12, PIN_LOW, (GPIO_DIR_OUT) }, /* PWM.LED9 */
{ PWM0, 8, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 8, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{11, PINMUX_FUNC_D, {{ EXP1, 12, PIN_HIGH, (GPIO_DIR_OUT) }, /* SPI1_MOSI */
{ PWM0, 8, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 8, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{12, PINMUX_FUNC_A, {{ EXP1, 10, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO7 (out) */
{ EXP1, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 7, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{12, PINMUX_FUNC_B, {{ EXP1, 10, PIN_HIGH, (GPIO_DIR_OUT) }, /* GPIO7 (in) */
{ EXP1, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ G_DW, 7, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_DW, 7, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{12, PINMUX_FUNC_C, {{ EXP1, 10, PIN_LOW, (GPIO_DIR_OUT) }, /* SPI1_MISO */
{ EXP1, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{12, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{12, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{13, PINMUX_FUNC_A, {{ EXP1, 14, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS5 (out) */
{ EXP0, 14, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 15, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{13, PINMUX_FUNC_B, {{ EXP1, 14, PIN_LOW, (GPIO_DIR_OUT) }, /* GPIO_SUS5 (in) */
{ EXP0, 14, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP0, 15, PIN_LOW, (GPIO_DIR_OUT) },
{ G_RW, 5, PIN_LOW, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ G_RW, 5, PIN_LOW, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{13, PINMUX_FUNC_C, {{ EXP1, 14, PIN_HIGH, (GPIO_DIR_OUT) }, /* SPI1_CLK */
{ EXP0, 14, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP0, 15, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{13, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{13, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{14, PINMUX_FUNC_A, {{ EXP2, 0, PIN_LOW, (GPIO_DIR_OUT) }, /* EXP2.P0_0 (out)/ADC.IN0 */
{ EXP2, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{14, PINMUX_FUNC_B, {{ EXP2, 0, PIN_LOW, (GPIO_DIR_IN ) }, /* EXP2.P0_0 (in)/ADC.IN0 */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{14, PINMUX_FUNC_B, {{ EXP2, 0, PIN_LOW, (GPIO_DIR_IN) }, /* EXP2.P0_0 (in)/ADC.IN0 */
{ EXP2, 1, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{14, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{14, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{14, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{14, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{15, PINMUX_FUNC_A, {{ EXP2, 2, PIN_LOW, (GPIO_DIR_OUT) }, /* EXP2.P0_2 (out)/ADC.IN1 */
{ EXP2, 3, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{15, PINMUX_FUNC_B, {{ EXP2, 2, PIN_LOW, (GPIO_DIR_IN ) }, /* EXP2.P0_2 (in)/ADC.IN1 */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{15, PINMUX_FUNC_B, {{ EXP2, 2, PIN_LOW, (GPIO_DIR_IN) }, /* EXP2.P0_2 (in)/ADC.IN1 */
{ EXP2, 3, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{15, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{15, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{15, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{15, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{16, PINMUX_FUNC_A, {{ EXP2, 4, PIN_LOW, (GPIO_DIR_OUT) }, /* EXP2.P0_4 (out)/ADC.IN2 */
{ EXP2, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{16, PINMUX_FUNC_B, {{ EXP2, 4, PIN_LOW, (GPIO_DIR_IN ) }, /* EXP2.P0_4 (in)/ADC.IN2 */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{16, PINMUX_FUNC_B, {{ EXP2, 4, PIN_LOW, (GPIO_DIR_IN) }, /* EXP2.P0_4 (in)/ADC.IN2 */
{ EXP2, 5, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{16, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{16, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{16, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{16, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{17, PINMUX_FUNC_A, {{ EXP2, 6, PIN_LOW, (GPIO_DIR_OUT) }, /* EXP2.P0_6 (out)/ADC.IN3 */
{ EXP2, 7, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{17, PINMUX_FUNC_B, {{ EXP2, 6, PIN_LOW, (GPIO_DIR_IN ) }, /* EXP2.P0_6 (in)/ADC.IN3 */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{17, PINMUX_FUNC_B, {{ EXP2, 6, PIN_LOW, (GPIO_DIR_IN) }, /* EXP2.P0_6 (in)/ADC.IN3 */
{ EXP2, 7, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{17, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{17, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{17, PINMUX_FUNC_C, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{17, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{18, PINMUX_FUNC_A, {{ PWM0, 14, PIN_HIGH, (GPIO_DIR_OUT) }, /* EXP2.P1_0 (out)/ADC.IN4 */
{ EXP2, 12, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP2, 8, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP2, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{18, PINMUX_FUNC_B, {{ PWM0, 14, PIN_LOW, (GPIO_DIR_OUT) }, /* EXP2.P1_0 (in)/ADC.IN4 */
{ EXP2, 12, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP2, 8, PIN_LOW, (GPIO_DIR_IN ) },
{ EXP2, 8, PIN_LOW, (GPIO_DIR_IN) },
{ EXP2, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{18, PINMUX_FUNC_C, {{ PWM0, 14, PIN_HIGH, (GPIO_DIR_OUT) }, /* I2C SDA */
{ EXP2, 9, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP2, 12, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{18, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{18, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{19, PINMUX_FUNC_A, {{ PWM0, 15, PIN_HIGH, (GPIO_DIR_OUT) }, /* EXP2.P1_2 (out)/ADC.IN5 */
{ EXP2, 12, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP2, 10, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP2, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{19, PINMUX_FUNC_B, {{ PWM0, 15, PIN_LOW, (GPIO_DIR_OUT) }, /* EXP2.P1_2 (in)/ADC.IN5 */
{ EXP2, 12, PIN_HIGH, (GPIO_DIR_OUT) },
{ EXP2, 10, PIN_LOW, (GPIO_DIR_IN ) },
{ EXP2, 10, PIN_LOW, (GPIO_DIR_IN) },
{ EXP2, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{19, PINMUX_FUNC_C, {{ PWM0, 15, PIN_HIGH, (GPIO_DIR_OUT) }, /* I2C SCL */
{ EXP2, 11, PIN_LOW, (GPIO_DIR_OUT) },
{ EXP2, 12, PIN_LOW, (GPIO_DIR_OUT) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{19, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN ) }}},
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
{19, PINMUX_FUNC_D, {{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) }, /* NONE */
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) },
{ NONE, 0, DONT_CARE, (GPIO_DIR_IN) } } },
};
@ -558,7 +558,7 @@ uint8_t _galileo_set_pin(struct device *port, uint8_t pin, uint8_t func)
enable = &_galileo_path[mux_index];
for (i = 0; i < 5; i++) {
switch(enable->path[i].mux) {
switch (enable->path[i].mux) {
case EXP0:
gpio_pin_write(drv_data->exp0,
enable->path[i].pin,

6
drivers/gpio/gpio_dw.c
View file

@ -98,11 +98,11 @@ static inline void dw_interrupt_config(struct device *port, int access_op,
}
/* use built-in debounce */
flag_is_set = (flags & GPIO_INT_DEBOUNCE );
flag_is_set = (flags & GPIO_INT_DEBOUNCE);
dw_set_bit(base_addr, PORTA_DEBOUNCE, pin, flag_is_set);
/* level triggered int synchronous with clock */
flag_is_set = (flags & GPIO_INT_CLOCK_SYNC );
flag_is_set = (flags & GPIO_INT_CLOCK_SYNC);
dw_set_bit(base_addr, INT_CLOCK_SYNC, pin, flag_is_set);
dw_set_bit(base_addr, INTEN, pin, 1);
}
@ -128,7 +128,7 @@ static inline void dw_port_config(struct device *port, int flags)
struct gpio_config_dw *config = port->config->config_info;
int i;
for (i=0; i < config->bits; i++) {
for (i = 0; i < config->bits; i++) {
dw_pin_config(port, i, flags);
}
}

10
drivers/gpio/gpio_pcal9535a.c
View file

@ -26,7 +26,7 @@
#include "gpio_pcal9535a.h"
#ifndef CONFIG_GPIO_PCAL9535A_DEBUG
#define DBG(...) {;}
#define DBG(...) { ; }
#else
#if defined(CONFIG_STDOUT_CONSOLE)
#include <stdio.h>
@ -614,7 +614,7 @@ static struct gpio_pcal9535a_config gpio_pcal9535a_0_cfg = {
static struct gpio_pcal9535a_drv_data gpio_pcal9535a_0_drvdata = {
/* Default for registers according to datasheet */
.reg_cache.output = { .all = 0xFFFF },
.reg_cache.pol_inv ={ .all = 0x0 },
.reg_cache.pol_inv = { .all = 0x0 },
.reg_cache.dir = { .all = 0xFFFF },
.reg_cache.pud_en = { .all = 0x0 },
.reg_cache.pud_sel = { .all = 0xFFFF },
@ -642,7 +642,7 @@ static struct gpio_pcal9535a_config gpio_pcal9535a_1_cfg = {
static struct gpio_pcal9535a_drv_data gpio_pcal9535a_1_drvdata = {
/* Default for registers according to datasheet */
.reg_cache.output = { .all = 0xFFFF },
.reg_cache.pol_inv ={ .all = 0x0 },
.reg_cache.pol_inv = { .all = 0x0 },
.reg_cache.dir = { .all = 0xFFFF },
.reg_cache.pud_en = { .all = 0x0 },
.reg_cache.pud_sel = { .all = 0xFFFF },
@ -670,7 +670,7 @@ static struct gpio_pcal9535a_config gpio_pcal9535a_2_cfg = {
static struct gpio_pcal9535a_drv_data gpio_pcal9535a_2_drvdata = {
/* Default for registers according to datasheet */
.reg_cache.output = { .all = 0xFFFF },
.reg_cache.pol_inv ={ .all = 0x0 },
.reg_cache.pol_inv = { .all = 0x0 },
.reg_cache.dir = { .all = 0xFFFF },
.reg_cache.pud_en = { .all = 0x0 },
.reg_cache.pud_sel = { .all = 0xFFFF },
@ -698,7 +698,7 @@ static struct gpio_pcal9535a_config gpio_pcal9535a_3_cfg = {
static struct gpio_pcal9535a_drv_data gpio_pcal9535a_3_drvdata = {
/* Default for registers according to datasheet */
.reg_cache.output = { .all = 0xFFFF },
.reg_cache.pol_inv ={ .all = 0x0 },
.reg_cache.pol_inv = { .all = 0x0 },
.reg_cache.dir = { .all = 0xFFFF },
.reg_cache.pud_en = { .all = 0x0 },
.reg_cache.pud_sel = { .all = 0xFFFF },

2
drivers/i2c/i2c_dw.c
View file

@ -37,7 +37,7 @@
#include "i2c_dw_registers.h"
#ifndef CONFIG_I2C_DEBUG
#define DBG(...) {;}
#define DBG(...) { ; }
#else
#if defined(CONFIG_STDOUT_CONSOLE)
#include <stdio.h>

2
drivers/interrupt_controller/loapic_intr.c
View file

@ -434,7 +434,7 @@ int _loapic_isr_vector_get(void)
{
/* pointer to ISR vector table */
volatile int *pReg;
int block=0;
int block = 0;
while (block < 8) {
pReg = (volatile int *)

10
drivers/spi/intel_spi.c
View file

@ -30,7 +30,7 @@
#include "intel_spi_priv.h"
#ifndef CONFIG_SPI_DEBUG
#define DBG(...) {;}
#define DBG(...) { ; }
#else
#if defined(CONFIG_STDOUT_CONSOLE)
#include <stdio.h>
@ -118,8 +118,8 @@ static inline void _spi_control_cs(struct device *dev, int on)
gpio_pin_write(spi->cs_gpio_port, info->cs_gpio_pin, !on);
}
#else
#define _spi_control_cs(...) {;}
#define _spi_config_cs(...) {;}
#define _spi_control_cs(...) { ; }
#define _spi_config_cs(...) { ; }
#endif /* CONFIG_SPI_INTEL_CS_GPIO */
static void completed(struct device *dev, uint32_t error)
@ -171,7 +171,7 @@ static void push_data(struct device *dev)
DBG("spi: push_data\n");
while(read_sssr(info->regs) & INTEL_SPI_SSSR_TNF) {
while (read_sssr(info->regs) & INTEL_SPI_SSSR_TNF) {
if (spi->tx_buf && spi->tx_buf_len > 0) {
data = *(uint8_t *)(spi->tx_buf);
spi->tx_buf++;
@ -207,7 +207,7 @@ static void pull_data(struct device *dev)
uint32_t cnt = 0;
uint8_t data;
while(read_sssr(info->regs) & INTEL_SPI_SSSR_RNE) {
while (read_sssr(info->regs) & INTEL_SPI_SSSR_RNE) {
data = (uint8_t) read_ssdr(info->regs);
cnt++;

2
drivers/spi/intel_spi_priv.h
View file

@ -84,7 +84,7 @@ struct spi_intel_data {
#define INTEL_SPI_SSCR1_RFT(__rft) \
(((__rft) - 1) << 11)
#define INTEL_SPI_SSCR1_EFWR (0x1 << 16)
#define INTEL_SPI_SSCR1_STRF (0x1 << 17)
#define INTEL_SPI_SSCR1_STRF (0x1 << 17)
#define INTEL_SPI_SSCR1_TFT_DFLT (8)
#define INTEL_SPI_SSCR1_RFT_DFLT (8)

2
include/arch/arc/v2/error.h
View file

@ -29,7 +29,7 @@ ARC-specific nanokernel error handling interface. Included by ARC/arch.h.
#ifndef _ASMLANGUAGE
#include <toolchain/gcc.h>
extern FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int,
const NANO_ESF *);
const NANO_ESF*);
extern void _SysFatalErrorHandler(unsigned int cause, const NANO_ESF *esf);
#endif

4
include/arch/arm/cortex_m/error.h
View file

@ -28,8 +28,8 @@ ARM-specific nanokernel error handling interface. Included by ARM/arch.h.
#ifndef _ASMLANGUAGE
extern FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int,
const NANO_ESF *);
extern void _SysFatalErrorHandler(unsigned int, const NANO_ESF *);
const NANO_ESF*);
extern void _SysFatalErrorHandler(unsigned int, const NANO_ESF*);
#endif
#define _NANO_ERR_HW_EXCEPTION (0) /* MPU/Bus/Usage fault */

4
include/arch/arm/cortex_m/gdb_stub.h
View file

@ -31,7 +31,7 @@
#if CONFIG_GDB_INFO
GTEXT(_GdbStubExcEntry)
_GDB_STUB_EXC_ENTRY: .macro
_GDB_STUB_EXC_ENTRY : .macro
push {lr}
bl irq_lock
bl _GdbStubExcEntry
@ -40,7 +40,7 @@ _GDB_STUB_EXC_ENTRY: .macro
.endm
GTEXT(_GdbStubExcExit)
_GDB_STUB_EXC_EXIT: .macro
_GDB_STUB_EXC_EXIT : .macro
push {lr}
bl irq_lock
bl _GdbStubExcExit

8
include/arch/x86/arch.h
View file

@ -177,7 +177,7 @@ typedef struct s_isrList {
do { \
_SysIntVecProgram(_##device##_int_vector, irq); \
_IntVecMarkAllocated(_##device##_int_vector); \
} while(0)
} while (0)
/**
@ -280,7 +280,7 @@ typedef struct nanoIsf {
#ifdef CONFIG_NO_ISRS
static inline unsigned int irq_lock(void) {return 1;}
static inline unsigned int irq_lock(void) { return 1; }
static inline void irq_unlock(unsigned int key) {}
#else /* CONFIG_NO_ISRS */
@ -420,10 +420,10 @@ extern void nano_cpu_idle(void);
/** Nanokernel provided routine to report any detected fatal error. */
extern FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int reason,
const NANO_ESF *pEsf);
const NANO_ESF * pEsf);
/** User provided routine to handle any detected fatal error post reporting. */
extern FUNC_NORETURN void _SysFatalErrorHandler(unsigned int reason,
const NANO_ESF *pEsf);
const NANO_ESF * pEsf);
/** Dummy ESF for fatal errors that would otherwise not have an ESF */
extern const NANO_ESF _default_esf;

4
include/bluetooth/hci.h
View file

@ -33,8 +33,8 @@ typedef struct {
uint8_t val[6];
} bt_addr_le_t;
#define BT_ADDR_ANY (&(bt_addr_t) {{0, 0, 0, 0, 0, 0}})
#define BT_ADDR_LE_ANY (&(bt_addr_le_t) { 0, {0, 0, 0, 0, 0, 0}})
#define BT_ADDR_ANY (&(bt_addr_t) {{0, 0, 0, 0, 0, 0} })
#define BT_ADDR_LE_ANY (&(bt_addr_le_t) { 0, {0, 0, 0, 0, 0, 0} })
/* HCI Error Codes */
#define BT_HCI_ERR_UNKNOWN_CONN_ID 0x02

4
include/drivers/pci/pci.h
View file

@ -56,7 +56,7 @@ struct pci_dev_info {
extern void pci_bus_scan_init(void);
extern int pci_bus_scan(struct pci_dev_info *dev_info);
#else
#define pci_bus_scan_init(void) {;}
#define pci_bus_scan_init(void) { ; }
static inline int pci_bus_scan(struct pci_dev_info *dev_info)
{
return 1;
@ -73,7 +73,7 @@ void pci_legacy_bridge_configure(struct pci_dev_info *dev_info,
#ifdef CONFIG_PCI_DEBUG
extern void pci_show(struct pci_dev_info *dev_info);
#else
#define pci_show(__unused__) {;}
#define pci_show(__unused__) { ; }
#endif
#endif /* _PCI_H_ */

2
include/drivers/system_timer.h
View file

@ -57,7 +57,7 @@ extern uint32_t _nano_get_earliest_deadline(void);
#if defined(CONFIG_NANO_TIMEOUTS) || defined(CONFIG_NANO_TIMERS)
extern void _nano_sys_clock_tick_announce(uint32_t ticks);
#else
#define _nano_sys_clock_tick_announce(ticks) do { } while((0))
#define _nano_sys_clock_tick_announce(ticks) do { } while ((0))
#endif
#ifdef CONFIG_MICROKERNEL

10
include/net/net_buf.h
View file

@ -47,7 +47,7 @@
NET_ERR("**ERROR** buf %p in use (%s:%s():%d)\n", \
buf, __FILE__, __FUNCTION__, __LINE__); \
} \
} while(0)
} while (0)
#define NET_BUF_CHECK_IF_NOT_IN_USE(buf) \
do { \
@ -55,7 +55,7 @@
NET_ERR("**ERROR** buf %p not in use (%s:%s():%d)\n",\
buf, __FILE__, __FUNCTION__, __LINE__); \
} \
} while(0)
} while (0)
#else
#define NET_BUF_CHECK_IF_IN_USE(buf)
#define NET_BUF_CHECK_IF_NOT_IN_USE(buf)
@ -222,8 +222,8 @@ struct net_buf *net_buf_get_tx(struct net_context *context);
*/
/* Same as net_buf_get, but also reserve headroom for potential headers */
#ifdef DEBUG_NET_BUFS
#define net_buf_get_reserve_rx(res) net_buf_get_reserve_rx_debug(res,__FUNCTION__,__LINE__)
#define net_buf_get_reserve_tx(res) net_buf_get_reserve_tx_debug(res,__FUNCTION__,__LINE__)
#define net_buf_get_reserve_rx(res) net_buf_get_reserve_rx_debug(res, __FUNCTION__, __LINE__)
#define net_buf_get_reserve_tx(res) net_buf_get_reserve_tx_debug(res, __FUNCTION__, __LINE__)
struct net_buf *net_buf_get_reserve_rx_debug(uint16_t reserve_head, const char *caller, int line);
struct net_buf *net_buf_get_reserve_tx_debug(uint16_t reserve_head, const char *caller, int line);
#else
@ -345,7 +345,7 @@ struct net_mbuf {
* @return Network buffer if successful, NULL otherwise.
*/
#ifdef DEBUG_NET_BUFS
#define net_mbuf_get_reserve(res) net_mbuf_get_reserve_debug(res,__FUNCTION__,__LINE__)
#define net_mbuf_get_reserve(res) net_mbuf_get_reserve_debug(res, __FUNCTION__, __LINE__)
struct net_mbuf *net_mbuf_get_reserve_debug(uint16_t reserve_head, const char *caller, int line);
#else
struct net_mbuf *net_mbuf_get_reserve(uint16_t reserve_head);

6
include/net/net_ip.h
View file

@ -78,8 +78,10 @@ struct net_addr {
};
};
#define IN6ADDR_ANY_INIT { { { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } } }
#define IN6ADDR_LOOPBACK_INIT { { { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1 } } }
#define IN6ADDR_ANY_INIT { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0 } } }
#define IN6ADDR_LOOPBACK_INIT { { { 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 1 } } }
#define INET6_ADDRSTRLEN 46

2
include/toolchain/common.h
View file

@ -95,7 +95,7 @@ Macros to abstract compiler capabilities (common to all toolchains).
#define GC_SECTION(sym) SECTION .text.FUNC(sym), "ax"
#define BRANCH_LABEL(sym) FUNC(sym):
#define BRANCH_LABEL(sym) FUNC(sym) :
#define VAR(sym) FUNC(sym)
#endif /* _ASMLANGUAGE */

24
include/toolchain/gcc.h
View file

@ -145,10 +145,10 @@ A##a:
#if defined(_ASMLANGUAGE) && !defined(_LINKER)
#ifdef CONFIG_ARM
#define GTEXT(sym) .global FUNC(sym); .type FUNC(sym),%function
#define GDATA(sym) .global FUNC(sym); .type FUNC(sym),%object
#define WTEXT(sym) .weak FUNC(sym); .type FUNC(sym),%function
#define WDATA(sym) .weak FUNC(sym); .type FUNC(sym),%object
#define GTEXT(sym) .global FUNC(sym); .type FUNC(sym), %function
#define GDATA(sym) .global FUNC(sym); .type FUNC(sym), %object
#define WTEXT(sym) .weak FUNC(sym); .type FUNC(sym), %function
#define WDATA(sym) .weak FUNC(sym); .type FUNC(sym), %object
#elif defined(CONFIG_ARC)
/*
* Need to use assembly macros because ';' is interpreted as the start of
@ -168,8 +168,8 @@ A##a:
#define GTEXT(sym) glbl_text sym
#define GDATA(sym) glbl_data sym
#else /* !CONFIG_ARM && !CONFIG_ARC */
#define GTEXT(sym) .globl FUNC(sym); .type FUNC(sym),@function
#define GDATA(sym) .globl FUNC(sym); .type FUNC(sym),@object
#define GTEXT(sym) .globl FUNC(sym); .type FUNC(sym), @function
#define GDATA(sym) .globl FUNC(sym); .type FUNC(sym), @object
#endif
/*
@ -193,21 +193,21 @@ A##a:
.macro section_var section, symbol
.section .\section\().FUNC(\symbol)
FUNC(\symbol):
FUNC(\symbol) :
.endm
.macro section_func section, symbol
.section .\section\().FUNC(\symbol), "ax"
FUNC_CODE()
PERFOPT_ALIGN
FUNC(\symbol):
FUNC(\symbol) :
FUNC_INSTR(\symbol)
.endm
.macro section_subsec_func section, subsection, symbol
.section .\section\().\subsection, "ax"
PERFOPT_ALIGN
FUNC(\symbol):
FUNC(\symbol) :
.endm
#define SECTION_VAR(sect, sym) section_var sect, sym
@ -216,14 +216,14 @@ A##a:
section_subsec_func sect, subsec, sym
#else /* !CONFIG_ARC */
#define SECTION_VAR(sect, sym) .section .sect.FUNC(sym); FUNC(sym):
#define SECTION_VAR(sect, sym) .section .sect.FUNC(sym); FUNC(sym) :
#define SECTION_FUNC(sect, sym) \
.section .sect.FUNC(sym), "ax"; \
FUNC_CODE() \
PERFOPT_ALIGN; FUNC(sym): \
PERFOPT_ALIGN; FUNC(sym) : \
FUNC_INSTR(sym)
#define SECTION_SUBSEC_FUNC(sect, subsec, sym) \
.section .sect.subsec, "ax"; PERFOPT_ALIGN; FUNC(sym):
.section .sect.subsec, "ax"; PERFOPT_ALIGN; FUNC(sym) :
#endif /* CONFIG_ARC */

6
kernel/nanokernel/nano_fifo.c
View file

@ -122,7 +122,7 @@ void _fifo_put_non_preemptible(struct nano_fifo *fifo, void *data)
irq_unlock(imask);
}
void nano_task_fifo_put( struct nano_fifo *fifo, void *data)
void nano_task_fifo_put(struct nano_fifo *fifo, void *data)
{
unsigned int imask;
@ -203,7 +203,7 @@ void *_fifo_get(struct nano_fifo *fifo)
return data;
}
void *nano_fiber_fifo_get_wait( struct nano_fifo *fifo)
void *nano_fiber_fifo_get_wait(struct nano_fifo *fifo)
{
void *data;
unsigned int imask;
@ -222,7 +222,7 @@ void *nano_fiber_fifo_get_wait( struct nano_fifo *fifo)
return data;
}
void *nano_task_fifo_get_wait( struct nano_fifo *fifo)
void *nano_task_fifo_get_wait(struct nano_fifo *fifo)
{
void *data;
unsigned int imask;

2
kernel/nanokernel/nano_lifo.c
View file

@ -133,7 +133,7 @@ void *_lifo_get(struct nano_lifo *lifo)
* task cannot pend on a nanokernel object. Instead, tasks will poll
* the lifo object.
*/
void *nano_fiber_lifo_get_wait(struct nano_lifo *lifo )
void *nano_fiber_lifo_get_wait(struct nano_lifo *lifo)
{
void *data;
unsigned int imask;

4
kernel/nanokernel/nano_sys_clock.c
View file

@ -158,7 +158,7 @@ static inline void handle_expired_nano_timeouts(int ticks)
}
}
#else
#define handle_expired_nano_timeouts(ticks) do { } while((0))
#define handle_expired_nano_timeouts(ticks) do { } while ((0))
#endif
/* handle the expired nano timers in the nano timers queue */
@ -178,7 +178,7 @@ static inline void handle_expired_nano_timers(int ticks)
}
}
#else
#define handle_expired_nano_timers(ticks) do { } while((0))
#define handle_expired_nano_timers(ticks) do { } while ((0))
#endif
#if defined(CONFIG_NANO_TIMEOUTS) || defined(CONFIG_NANO_TIMERS)

2
kernel/nanokernel/profiler.c
View file

@ -29,7 +29,7 @@
uint32_t _sys_profiler_buffer[CONFIG_PROFILER_BUFFER_SIZE];
#ifdef CONFIG_PROFILER_CONTEXT_SWITCH
void *_collector_fiber=NULL;
void *_collector_fiber = NULL;
#endif
#ifdef CONFIG_PROFILER_SLEEP

4
kernel/nanokernel/ring_buffer.c
View file

@ -44,13 +44,13 @@ int sys_ring_buf_put(struct ring_buf *buf, uint16_t type, uint8_t value,
header->value = value;
if (likely(buf->mask)) {
for (i=0; i < size32; ++i) {
for (i = 0; i < size32; ++i) {
index = (i + buf->tail + 1) & buf->mask;
buf->buf[index] = data[i];
}
buf->tail = (buf->tail + size32 + 1) & buf->mask;
} else {
for (i=0; i < size32; ++i) {
for (i = 0; i < size32; ++i) {
index = (i + buf->tail + 1) % buf->size;
buf->buf[index] = data[i];
}

6
lib/libc/minimal/source/stdlib/atoi.c
View file

@ -28,13 +28,15 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
int atoi(const char *s)
{
int n=0, neg=0;
int n = 0;
int neg = 0;
while (isspace(*s)) {
s++;
}
switch (*s) {
case '-':
neg=1;
neg = 1;
case '+':
s++;
}

4
lib/libc/minimal/source/stdout/fprintf.c
View file

@ -24,7 +24,7 @@
extern int _prf(int (*func)(), void *dest,
const char *format, va_list vargs);
int fprintf(FILE *restrict F, const char *restrict format, ...)
int fprintf(FILE * restrict F, const char *restrict format, ...)
{
va_list vargs;
int r;
@ -36,7 +36,7 @@ int fprintf(FILE *restrict F, const char *restrict format, ...)
return r;
}
int vfprintf(FILE *restrict F, const char *restrict format, va_list vargs)
int vfprintf(FILE * restrict F, const char *restrict format, va_list vargs)
{
int r;