drivers: dac: added driver for Microchip MCP4725
The MCP4725 is a single channel 12 bit DAC. It is controlled via I2C. Signed-off-by: Kieran Mackey <kieran.mackey@lairdconnect.com>
This commit is contained in:
parent
25578be909
commit
38ed9c885e
29 changed files with 465 additions and 2 deletions
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@ -9,4 +9,5 @@ zephyr_library_sources_ifdef(CONFIG_DAC_SAM0 dac_sam0.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_DACX0508 dac_dacx0508.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_DACX3608 dac_dacx3608.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_SHELL dac_shell.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_MCP4725 dac_mcp4725.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE dac_handlers.c)
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@ -34,4 +34,6 @@ source "drivers/dac/Kconfig.dacx0508"
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source "drivers/dac/Kconfig.dacx3608"
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source "drivers/dac/Kconfig.mcp4725"
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endif # DAC
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21
drivers/dac/Kconfig.mcp4725
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21
drivers/dac/Kconfig.mcp4725
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@ -0,0 +1,21 @@
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# DAC configuration options
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# Copyright (c) 2021 Laird Connectivity
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#
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# SPDX-License-Identifier: Apache-2.0
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config DAC_MCP4725
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bool "Microchip MCP4725 DAC driver"
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depends on I2C
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help
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Enable the driver for the Microchip MCP4725.
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if DAC_MCP4725
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config DAC_MCP4725_INIT_PRIORITY
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int "Init priority"
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default 80
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help
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MCP4725 DAC device driver initialization priority.
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endif # DAC_MCP4725
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148
drivers/dac/dac_mcp4725.c
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148
drivers/dac/dac_mcp4725.c
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@ -0,0 +1,148 @@
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/*
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* Copyright (c) 2021 Laird Connectivity
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT microchip_mcp4725
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#include <zephyr.h>
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#include <drivers/i2c.h>
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#include <drivers/dac.h>
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#include <logging/log.h>
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LOG_MODULE_REGISTER(dac_mcp4725, CONFIG_DAC_LOG_LEVEL);
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/* Information in this file comes from MCP4725 datasheet revision D
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* found at https://ww1.microchip.com/downloads/en/DeviceDoc/22039d.pdf
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*/
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/* Defines for field values in MCP4725 DAC register */
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#define MCP4725_DAC_MAX_VAL 0xFFF
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#define MCP4725_FAST_MODE_POWER_DOWN_POS 4U
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#define MCP4725_FAST_MODE_DAC_UPPER_VAL_POS 8U
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#define MCP4725_FAST_MODE_DAC_UPPER_VAL_MASK 0xF
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#define MCP4725_FAST_MODE_DAC_LOWER_VAL_MASK 0xFF
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#define MCP4725_READ_RDY_POS 7U
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#define MCP4725_READ_RDY_MASK (0x1 << MCP4725_READ_RDY_POS)
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/* After writing eeprom, the MCP4725 can be in a busy state for 25 - 50ms
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* See section 1.0 of MCP4725 datasheet, 'Electrical Characteristics'
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*/
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#define MCP4725_BUSY_TIMEOUT_MS 60U
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struct mcp4725_config {
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const struct device *i2c_dev;
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uint16_t i2c_addr;
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};
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/* Read mcp4725 and check RDY status bit */
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static int mcp4725_wait_until_ready(const struct device *dev, uint16_t i2c_addr)
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{
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uint8_t rx_data[5];
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bool mcp4725_ready = false;
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int ret;
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int32_t timeout = k_uptime_get_32() + MCP4725_BUSY_TIMEOUT_MS;
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/* Wait until RDY bit is set or return error if timer exceeds MCP4725_BUSY_TIMEOUT_MS */
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while (!mcp4725_ready) {
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ret = i2c_read(dev, rx_data, sizeof(rx_data), i2c_addr);
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if (ret == 0) {
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mcp4725_ready = rx_data[0] & MCP4725_READ_RDY_MASK;
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} else {
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/* I2C error */
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return ret;
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}
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if (k_uptime_get_32() > timeout) {
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return -ETIMEDOUT;
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}
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}
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return 0;
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}
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/* MCP4725 is a single channel 12 bit DAC */
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static int mcp4725_channel_setup(const struct device *dev,
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const struct dac_channel_cfg *channel_cfg)
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{
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if (channel_cfg->channel_id != 0) {
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return -EINVAL;
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}
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if (channel_cfg->resolution != 12) {
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return -ENOTSUP;
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}
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return 0;
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}
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static int mcp4725_write_value(const struct device *dev, uint8_t channel,
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uint32_t value)
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{
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const struct mcp4725_config *config = (struct mcp4725_config *)dev->config;
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uint8_t tx_data[2];
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int ret;
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if (channel != 0) {
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return -EINVAL;
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}
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/* Check value isn't over 12 bits */
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if (value > MCP4725_DAC_MAX_VAL) {
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return -ENOTSUP;
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}
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/* WRITE_MODE_FAST message format (2 bytes):
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*
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* || 15 14 | 13 12 | 11 10 9 8 || 7 6 5 4 3 2 1 0 ||
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* || Fast mode (0) | Power-down bits (0) | DAC value[11:8] || DAC value[7:0] ||
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*/
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tx_data[0] = ((value >> MCP4725_FAST_MODE_DAC_UPPER_VAL_POS) &
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MCP4725_FAST_MODE_DAC_UPPER_VAL_MASK);
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tx_data[1] = (value & MCP4725_FAST_MODE_DAC_LOWER_VAL_MASK);
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ret = i2c_write(config->i2c_dev, tx_data, sizeof(tx_data),
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config->i2c_addr);
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return ret;
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}
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static int dac_mcp4725_init(const struct device *dev)
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{
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const struct mcp4725_config *config = dev->config;
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if (!device_is_ready(config->i2c_dev)) {
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LOG_ERR("I2C device not found");
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return -EINVAL;
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}
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/* Check we can read a 'RDY' bit from this device */
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if (mcp4725_wait_until_ready(config->i2c_dev, config->i2c_addr)) {
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return -EBUSY;
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}
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return 0;
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}
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static const struct dac_driver_api mcp4725_driver_api = {
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.channel_setup = mcp4725_channel_setup,
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.write_value = mcp4725_write_value,
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};
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#define INST_DT_MCP4725(index) \
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static const struct mcp4725_config mcp4725_config_##index = { \
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.i2c_dev = DEVICE_DT_GET(DT_INST_BUS(index)), \
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.i2c_addr = DT_INST_REG_ADDR(index) \
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}; \
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\
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DEVICE_DT_INST_DEFINE(index, dac_mcp4725_init, \
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device_pm_control_nop, \
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NULL, \
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&mcp4725_config_##index, POST_KERNEL, \
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CONFIG_DAC_MCP4725_INIT_PRIORITY, \
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&mcp4725_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(INST_DT_MCP4725);
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15
dts/bindings/dac/microchip,mcp4725.yaml
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15
dts/bindings/dac/microchip,mcp4725.yaml
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# Copyright (c) 2021 Laird Connectivity
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# SPDX-License-Identifier: Apache-2.0
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description: Microchip MCP4725 12-bit DAC
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compatible: "microchip,mcp4725"
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include: [dac-controller.yaml, i2c-device.yaml]
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properties:
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"#io-channel-cells":
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const: 1
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io-channel-cells:
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- output
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@ -88,6 +88,48 @@ follows:
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DAC output is available on connector J4 pin 11.
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Building and Running for BL652
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======================================
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The BL652 DVK PCB contains a footprint for a MCP4725 to use as an external
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DAC. Note this is not populated by default. The sample can be built and
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executed for the :ref:`bl652_dvk` as follows:
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.. zephyr-app-commands::
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:zephyr-app: samples/drivers/dac
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:board: bl652_dvk
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:goals: build flash
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:compact:
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DAC output is available on pin 1 of the MCP4725.
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Building and Running for BL653
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======================================
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The BL653 DVK PCB contains a footprint for a MCP4725 to use as an external
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DAC. Note this is not populated by default. The sample can be built and
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executed for the :ref:`bl653_dvk` as follows:
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.. zephyr-app-commands::
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:zephyr-app: samples/drivers/dac
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:board: bl653_dvk
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:goals: build flash
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:compact:
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DAC output is available on pin 1 of the MCP4725.
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Building and Running for BL654
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======================================
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The BL654 DVK PCB contains a footprint for a MCP4725 to use as an external
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DAC. Note this is not populated by default. The sample can be built and
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executed for the :ref:`bl654_dvk` as follows:
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.. zephyr-app-commands::
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:zephyr-app: samples/drivers/dac
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:board: bl654_dvk
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:goals: build flash
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:compact:
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DAC output is available on pin 1 of the MCP4725.
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Sample output
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=============
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6
samples/drivers/dac/boards/bl652_dvk.conf
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6
samples/drivers/dac/boards/bl652_dvk.conf
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#
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# Copyright (c) 2021 Laird Connectivity
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_DAC_MCP4725=y
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14
samples/drivers/dac/boards/bl652_dvk.overlay
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14
samples/drivers/dac/boards/bl652_dvk.overlay
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/*
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* Copyright 2021 Laird Connectivity
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&i2c0 {
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dac0: mcp4725@60 {
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compatible = "microchip,mcp4725";
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reg = <0x60>;
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label = "MCP4725";
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#io-channel-cells = <1>;
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};
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};
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6
samples/drivers/dac/boards/bl653_dvk.conf
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6
samples/drivers/dac/boards/bl653_dvk.conf
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#
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# Copyright (c) 2021 Laird Connectivity
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_DAC_MCP4725=y
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14
samples/drivers/dac/boards/bl653_dvk.overlay
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14
samples/drivers/dac/boards/bl653_dvk.overlay
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/*
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* Copyright 2021 Laird Connectivity
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&i2c0 {
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dac0: mcp4725@60 {
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compatible = "microchip,mcp4725";
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reg = <0x60>;
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label = "MCP4725";
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#io-channel-cells = <1>;
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};
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};
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6
samples/drivers/dac/boards/bl654_dvk.conf
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6
samples/drivers/dac/boards/bl654_dvk.conf
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#
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# Copyright (c) 2021 Laird Connectivity
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_DAC_MCP4725=y
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14
samples/drivers/dac/boards/bl654_dvk.overlay
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14
samples/drivers/dac/boards/bl654_dvk.overlay
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/*
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* Copyright 2021 Laird Connectivity
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&i2c0 {
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dac0: mcp4725@60 {
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compatible = "microchip,mcp4725";
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reg = <0x60>;
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label = "MCP4725";
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#io-channel-cells = <1>;
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};
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};
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@ -5,7 +5,8 @@ tests:
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tags: DAC
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platform_allow: |
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arduino_zero frdm_k22f frdm_k64f nucleo_f091rc nucleo_g071rb nucleo_g431rb
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nucleo_l073rz nucleo_l152re twr_ke18f nucleo_f767zi nucleo_f429zi
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nucleo_l073rz nucleo_l152re twr_ke18f nucleo_f767zi nucleo_f429zi bl652_dvk
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bl653_dvk bl654_dvk
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depends_on: dac
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harness: console
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harness_config:
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7
tests/drivers/dac/dac_api/boards/bl652_dvk.conf
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7
tests/drivers/dac/dac_api/boards/bl652_dvk.conf
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#
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# Copyright (c) 2021 Laird Connectivity
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_I2C=y
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CONFIG_DAC_MCP4725=y
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15
tests/drivers/dac/dac_api/boards/bl652_dvk.overlay
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15
tests/drivers/dac/dac_api/boards/bl652_dvk.overlay
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/*
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* Copyright 2021 Laird Connectivity
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&i2c0 {
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dac0: mcp4725@60 {
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/* MCP4725 not populated at factory */
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compatible = "microchip,mcp4725";
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reg = <0x60>;
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label = "MCP4725";
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#io-channel-cells = <1>;
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};
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};
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7
tests/drivers/dac/dac_api/boards/bl653_dvk.conf
Normal file
7
tests/drivers/dac/dac_api/boards/bl653_dvk.conf
Normal file
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#
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# Copyright (c) 2021 Laird Connectivity
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_I2C=y
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CONFIG_DAC_MCP4725=y
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15
tests/drivers/dac/dac_api/boards/bl653_dvk.overlay
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15
tests/drivers/dac/dac_api/boards/bl653_dvk.overlay
Normal file
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/*
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* Copyright 2021 Laird Connectivity
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&i2c0 {
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dac0: mcp4725@60 {
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/* MCP4725 not populated at factory */
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compatible = "microchip,mcp4725";
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reg = <0x60>;
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label = "MCP4725";
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#io-channel-cells = <1>;
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};
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};
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7
tests/drivers/dac/dac_api/boards/bl654_dvk.conf
Normal file
7
tests/drivers/dac/dac_api/boards/bl654_dvk.conf
Normal file
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#
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# Copyright (c) 2021 Laird Connectivity
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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CONFIG_I2C=y
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CONFIG_DAC_MCP4725=y
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15
tests/drivers/dac/dac_api/boards/bl654_dvk.overlay
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15
tests/drivers/dac/dac_api/boards/bl654_dvk.overlay
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/*
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* Copyright 2021 Laird Connectivity
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&i2c0 {
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dac0: mcp4725@60 {
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/* MCP4725 not populated at factory */
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compatible = "microchip,mcp4725";
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reg = <0x60>;
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label = "MCP4725";
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#io-channel-cells = <1>;
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};
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};
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@ -37,6 +37,16 @@
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#define DAC_RESOLUTION 12
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#define DAC_CHANNEL_ID 0
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#elif defined(CONFIG_BOARD_BL652_DVK) || \
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defined(CONFIG_BOARD_BL653_DVK) || \
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defined(CONFIG_BOARD_BL654_DVK)
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/* Note external DAC MCP4725 is not populated on BL652_DVK, BL653_DVK and
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* BL654_DVK at factory
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*/
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#define DAC_DEVICE_NAME DT_LABEL(DT_NODELABEL(dac0))
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#define DAC_RESOLUTION 12
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#define DAC_CHANNEL_ID 0
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#else
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#error "Unsupported board."
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#endif
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@ -2,5 +2,7 @@ common:
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tags: dac drivers userspace
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tests:
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drivers.dac:
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platform_allow: frdm_k22f frdm_k64f nucleo_l073rz nucleo_l152re twr_ke18f nucleo_f767zi nucleo_f429zi
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platform_allow:
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frdm_k22f frdm_k64f nucleo_l073rz nucleo_l152re twr_ke18f nucleo_f767zi
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nucleo_f429zi bl652_dvk bl653_dvk bl654_dvk
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depends_on: dac
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7
tests/drivers/dac/dac_loopback/boards/bl652_dvk.conf
Normal file
7
tests/drivers/dac/dac_loopback/boards/bl652_dvk.conf
Normal file
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|
|||
#
|
||||
# Copyright (c) 2021 Laird Connectivity
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
CONFIG_I2C=y
|
||||
CONFIG_DAC_MCP4725=y
|
15
tests/drivers/dac/dac_loopback/boards/bl652_dvk.overlay
Normal file
15
tests/drivers/dac/dac_loopback/boards/bl652_dvk.overlay
Normal file
|
@ -0,0 +1,15 @@
|
|||
/*
|
||||
* Copyright 2021 Laird Connectivity
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
&i2c0 {
|
||||
dac0: mcp4725@60 {
|
||||
/* MCP4725 not populated at factory */
|
||||
compatible = "microchip,mcp4725";
|
||||
reg = <0x60>;
|
||||
label = "MCP4725";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
};
|
7
tests/drivers/dac/dac_loopback/boards/bl653_dvk.conf
Normal file
7
tests/drivers/dac/dac_loopback/boards/bl653_dvk.conf
Normal file
|
@ -0,0 +1,7 @@
|
|||
#
|
||||
# Copyright (c) 2021 Laird Connectivity
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
CONFIG_I2C=y
|
||||
CONFIG_DAC_MCP4725=y
|
15
tests/drivers/dac/dac_loopback/boards/bl653_dvk.overlay
Normal file
15
tests/drivers/dac/dac_loopback/boards/bl653_dvk.overlay
Normal file
|
@ -0,0 +1,15 @@
|
|||
/*
|
||||
* Copyright 2021 Laird Connectivity
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
&i2c0 {
|
||||
dac0: mcp4725@60 {
|
||||
/* MCP4725 not populated at factory */
|
||||
compatible = "microchip,mcp4725";
|
||||
reg = <0x60>;
|
||||
label = "MCP4725";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
};
|
7
tests/drivers/dac/dac_loopback/boards/bl654_dvk.conf
Normal file
7
tests/drivers/dac/dac_loopback/boards/bl654_dvk.conf
Normal file
|
@ -0,0 +1,7 @@
|
|||
#
|
||||
# Copyright (c) 2021 Laird Connectivity
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
CONFIG_I2C=y
|
||||
CONFIG_DAC_MCP4725=y
|
15
tests/drivers/dac/dac_loopback/boards/bl654_dvk.overlay
Normal file
15
tests/drivers/dac/dac_loopback/boards/bl654_dvk.overlay
Normal file
|
@ -0,0 +1,15 @@
|
|||
/*
|
||||
* Copyright 2021 Laird Connectivity
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
&i2c0 {
|
||||
mcp4725@60 {
|
||||
/* MCP4725 not populated at factory */
|
||||
compatible = "microchip,mcp4725";
|
||||
reg = <0x60>;
|
||||
label = "MCP4725";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
};
|
|
@ -111,6 +111,28 @@
|
|||
#define ADC_ACQUISITION_TIME ADC_ACQ_TIME_DEFAULT
|
||||
#define ADC_CHANNEL_ID 23
|
||||
|
||||
#elif defined(CONFIG_BOARD_BL652_DVK) || \
|
||||
defined(CONFIG_BOARD_BL653_DVK) || \
|
||||
defined(CONFIG_BOARD_BL654_DVK)
|
||||
#include <hal/nrf_saadc.h>
|
||||
/* DAC output from MCP4725 pin 1
|
||||
* ADC_1 input read from pin SIO_3
|
||||
* Note external DAC MCP4725 is not populated on BL652_DVK, BL653_DVK and
|
||||
* BL654_DVK at factory
|
||||
*/
|
||||
|
||||
#define DAC_DEVICE_NAME DT_LABEL(DT_NODELABEL(dac0))
|
||||
#define DAC_RESOLUTION 12
|
||||
#define DAC_CHANNEL_ID 0
|
||||
|
||||
#define ADC_DEVICE_NAME DT_LABEL(DT_NODELABEL(adc))
|
||||
#define ADC_RESOLUTION 12
|
||||
#define ADC_GAIN ADC_GAIN_1_4
|
||||
#define ADC_REFERENCE ADC_REF_VDD_1_4
|
||||
#define ADC_ACQUISITION_TIME ADC_ACQ_TIME_DEFAULT
|
||||
#define ADC_CHANNEL_ID 1
|
||||
#define ADC_1ST_CHANNEL_INPUT NRF_SAADC_INPUT_AIN1
|
||||
|
||||
#else
|
||||
#error "Unsupported board."
|
||||
#endif
|
||||
|
@ -125,6 +147,12 @@ static const struct adc_channel_cfg adc_ch_cfg = {
|
|||
.reference = ADC_REFERENCE,
|
||||
.acquisition_time = ADC_ACQUISITION_TIME,
|
||||
.channel_id = ADC_CHANNEL_ID,
|
||||
|
||||
#if defined(CONFIG_BOARD_BL652_DVK) || \
|
||||
defined(CONFIG_BOARD_BL653_DVK) || \
|
||||
defined(CONFIG_BOARD_BL654_DVK)
|
||||
.input_positive = ADC_1ST_CHANNEL_INPUT,
|
||||
#endif
|
||||
};
|
||||
|
||||
static const struct device *init_dac(void)
|
||||
|
|
|
@ -8,3 +8,4 @@ tests:
|
|||
fixture: dac_adc_loopback
|
||||
platform_allow: |
|
||||
frdm_k22f frdm_k64f nucleo_f207zg nucleo_l073rz nucleo_l152re twr_ke18f
|
||||
bl652_dvk bl653_dvk bl654_dvk
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue