cc3200: Add support for the TI CC32xx SoC Series
Initial support is for the CC3200 SoC, comprising a network coprocessor and Cortex-M4 MPU. This leverages the CC3200 SDK driver peripheral library, installed separately, or built from ext/hal/. Jira: ZEP-1109 Change-Id: I508afc8596c165b309a4ec641c39abadc779eea3 Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This commit is contained in:
parent
88101bceb2
commit
385c7be8af
13 changed files with 156 additions and 0 deletions
10
arch/arm/soc/ti_simplelink/cc32xx/README
Normal file
10
arch/arm/soc/ti_simplelink/cc32xx/README
Normal file
|
@ -0,0 +1,10 @@
|
|||
CC3200 Board and Bootloader info taken from:
|
||||
* http://www.ti.com.cn/cn/lit/ug/swru367c/swru367c.pdf
|
||||
* http://www.ti.com/lit/ug/swru369c/swru369c.pdf
|
||||
|
||||
Notes:
|
||||
* CC3200 has no integrated flash Memory.
|
||||
* TI bootloader takes first 16Kb of the 256Kb SRAM, so app must start at
|
||||
0x20004000. CC3200 Kconfig must set SRAM size to 240Kb or less, since
|
||||
Zephyr computes TOP_OF_MEMORY (used for stack) based on SRAM_BASE_ADDRESS
|
||||
+ SRAM_SIZE.
|
Loading…
Add table
Add a link
Reference in a new issue