soc: wch: reorganize series directories by core

Place ch32v003 under the qingke_v2a series.
Place qingke series under the ch32v family.

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>

modules/hal_wch/CMakeLists.txt

@@ -1,3 +1,3 @@
-if(CONFIG_SOC_SERIES_CH32V00X)
+if(CONFIG_SOC_CH32V003)
   zephyr_include_directories(${ZEPHYR_HAL_WCH_MODULE_DIR}/ch32v003fun .)
 endif()

soc/wch/ch32v/CMakeLists.txt

@@ -1,9 +1,6 @@
 # Copyright (c) 2024 Michael Hope
 # SPDX-License-Identifier: Apache-2.0
 
-zephyr_sources(
-  soc_irq.S
-  vector.S
-)
+add_subdirectory(${SOC_SERIES})
 
 set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/riscv/common/linker.ld CACHE INTERNAL "")

soc/wch/ch32v/Kconfig

@@ -0,0 +1,15 @@
+# Copyright (c) 2024 Michael Hope
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_FAMILY_CH32V
+	select RISCV
+	select BUILD_OUTPUT_HEX
+	select CH32V00X_SYSTICK
+	select ATOMIC_OPERATIONS_C
+	imply XIP
+
+if SOC_FAMILY_CH32V
+
+rsource "*/Kconfig"
+
+endif # SOC_FAMILY_CH32V

soc/wch/ch32v/Kconfig.defconfig

@@ -0,0 +1,9 @@
+# Copyright (c) 2024 Michael Hope
+# Copyright (c) 2024 Jianxiong Gu
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_FAMILY_CH32V
+
+rsource "*/Kconfig.defconfig"
+
+endif # SOC_FAMILY_CH32V

soc/wch/ch32v/Kconfig.soc

@@ -0,0 +1,11 @@
+# Copyright (c) 2024 Michael Hope
+# Copyright (c) 2024 Jianxiong Gu
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_FAMILY_CH32V
+	bool
+
+config SOC_FAMILY
+	default "ch32v" if SOC_FAMILY_CH32V
+
+rsource "*/Kconfig.soc"

soc/wch/ch32v/qingke_v2a/CMakeLists.txt

@@ -0,0 +1,10 @@
+# Copyright (c) 2024 Michael Hope
+# Copyright (c) 2024 Jianxiong Gu
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_sources(
+  soc_irq.S
+  vector.S
+)
+
+zephyr_include_directories(.)

soc/wch/ch32v/qingke_v2a/Kconfig

@@ -1,13 +1,8 @@
 # Copyright (c) 2024 Michael Hope
 # SPDX-License-Identifier: Apache-2.0
 
-config SOC_CH32V003
-	select RISCV
-	select BUILD_OUTPUT_HEX
+config SOC_SERIES_QINGKE_V2A
 	select RISCV_ISA_RV32E
 	select RISCV_ISA_EXT_ZICSR
 	select RISCV_ISA_EXT_ZIFENCEI
 	select RISCV_ISA_EXT_C
-	select CH32V00X_SYSTICK
-	select ATOMIC_OPERATIONS_C
-	imply XIP

soc/wch/ch32v/qingke_v2a/Kconfig.defconfig

@@ -1,10 +1,7 @@
 # Copyright (c) 2024 Michael Hope
 # SPDX-License-Identifier: Apache-2.0
 
-if SOC_CH32V003
-
-config NUM_IRQS
-	default 48
+if SOC_SERIES_QINGKE_V2A
 
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
@@ -21,4 +18,6 @@ config ISR_STACK_SIZE
 config CLOCK_CONTROL
 	default y
 
-endif # SOC_CH32V003
+rsource "Kconfig.defconfig.*"
+
+endif # SOC_SERIES_QINGKE_V2A

soc/wch/ch32v/qingke_v2a/Kconfig.defconfig.ch32v003

@@ -0,0 +1,9 @@
+# Copyright (c) 2024 Michael Hope
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_CH32V003
+
+config NUM_IRQS
+	default 48
+
+endif # SOC_CH32V003

soc/wch/ch32v/qingke_v2a/Kconfig.soc

@@ -0,0 +1,11 @@
+# Copyright (c) 2024 Jianxiong Gu
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_QINGKE_V2A
+	bool
+	select SOC_FAMILY_CH32V
+
+config SOC_SERIES
+	default "qingke_v2a" if SOC_SERIES_QINGKE_V2A
+
+rsource "Kconfig.soc.*"

soc/wch/ch32v/qingke_v2a/Kconfig.soc.ch32v003

@@ -1,15 +1,9 @@
 # Copyright (c) 2024 Michael Hope
 # SPDX-License-Identifier: Apache-2.0
 
-config SOC_SERIES_CH32V00X
-	bool
-
 config SOC_CH32V003
 	bool
-	select SOC_SERIES_CH32V00X
-
-config SOC_SERIES
-	default "ch32v00x" if SOC_SERIES_CH32V00X
+	select SOC_SERIES_QINGKE_V2A
 
 config SOC
 	default "ch32v003" if SOC_CH32V003

soc/wch/ch32v/soc.yml

@@ -1,7 +1,9 @@
 # Copyright (c) 2024 Michael Hope
 # SPDX-License-Identifier: Apache-2.0
 
+family:
+- name: ch32v
   series:
-  - name: ch32v00x
+  - name: qingke-v2
     socs:
     - name: ch32v003