tests: drivers: spi: stm32h7: Run 16-bit frames tests for DMA
Run 16-bit frames tests also when DMA is enabled. In addition, remove the extra code required for the mentioned tests in favor of config. files, and add test cases for nocache regions defined in devicetree. Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
This commit is contained in:
parent
0e72d63a01
commit
382eaf7baa
10 changed files with 173 additions and 69 deletions
|
@ -6,3 +6,20 @@ source "Kconfig.zephyr"
|
|||
|
||||
config SPI_LOOPBACK_MODE_LOOP
|
||||
bool "Configure the SPI in LOOP mode, so that no extra wiring is needed"
|
||||
|
||||
if SOC_SERIES_STM32H7X
|
||||
|
||||
config SPI_LOOPBACK_16BITS_FRAMES
|
||||
bool "Use 16 bits frames for tests"
|
||||
|
||||
config DT_DEFINED_NOCACHE
|
||||
bool "Enable this if nocache regions are defined in devicetree"
|
||||
|
||||
if DT_DEFINED_NOCACHE
|
||||
|
||||
config DT_DEFINED_NOCACHE_NAME
|
||||
string "Name of the nocache region defined in devicetree (capitals)"
|
||||
|
||||
endif # DT_DEFINED_NOCACHE
|
||||
|
||||
endif # SOC_SERIES_STM32H7X
|
||||
|
|
|
@ -4,6 +4,12 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
|
||||
|
||||
&sram2 {
|
||||
zephyr,memory-attr = < DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) >;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
dmas = <&dmamux1 0 38 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)
|
||||
&dmamux1 1 37 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
|
||||
|
|
|
@ -4,6 +4,12 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
|
||||
|
||||
&sram2 {
|
||||
zephyr,memory-attr = < DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) >;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
dmas = <&dmamux1 0 38 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)
|
||||
&dmamux1 1 37 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
|
||||
|
|
|
@ -0,0 +1,14 @@
|
|||
#
|
||||
# Copyright (c) 2023 Graphcore Ltd, All rights reserved.
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
# enable DMA mode for SPI loopback test
|
||||
CONFIG_SPI_STM32_DMA=y
|
||||
CONFIG_SPI_STM32_INTERRUPT=n
|
||||
CONFIG_SPI_ASYNC=n
|
||||
CONFIG_NOCACHE_MEMORY=n
|
||||
CONFIG_DT_DEFINED_NOCACHE=y
|
||||
CONFIG_DT_DEFINED_NOCACHE_NAME="SRAM2"
|
||||
CONFIG_SPI_LOOPBACK_16BITS_FRAMES=y
|
|
@ -0,0 +1,11 @@
|
|||
#
|
||||
# Copyright (c) 2023 Graphcore Ltd, All rights reserved.
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
# enable DMA mode for SPI loopback test
|
||||
CONFIG_SPI_STM32_DMA=y
|
||||
CONFIG_SPI_STM32_INTERRUPT=n
|
||||
CONFIG_SPI_ASYNC=n
|
||||
CONFIG_SPI_LOOPBACK_16BITS_FRAMES=y
|
|
@ -0,0 +1,6 @@
|
|||
#
|
||||
# Copyright (c) 2023 Graphcore Ltd, All rights reserved.
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
CONFIG_SPI_LOOPBACK_16BITS_FRAMES=y
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* Copyright (c) 2023 Graphcore Ltd, All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
&sram2 {
|
||||
zephyr,memory-attr = < DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) >;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
dmas = <&dmamux1 0 38 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS)
|
||||
&dmamux1 1 37 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS)>;
|
||||
dma-names = "tx", "rx";
|
||||
slow@0 {
|
||||
compatible = "test-spi-loopback-slow";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <500000>;
|
||||
};
|
||||
fast@0 {
|
||||
compatible = "test-spi-loopback-fast";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <16000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&dma1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dma2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dmamux1 {
|
||||
status = "okay";
|
||||
};
|
|
@ -0,0 +1,7 @@
|
|||
# enable DMA mode for SPI loopback test
|
||||
CONFIG_SPI_STM32_DMA=y
|
||||
CONFIG_SPI_STM32_INTERRUPT=n
|
||||
CONFIG_SPI_ASYNC=n
|
||||
CONFIG_NOCACHE_MEMORY=n
|
||||
CONFIG_DT_DEFINED_NOCACHE=y
|
||||
CONFIG_DT_DEFINED_NOCACHE_NAME="SRAM2"
|
|
@ -25,17 +25,32 @@ LOG_MODULE_REGISTER(spi_loopback);
|
|||
#define MODE_LOOP 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPI_LOOPBACK_16BITS_FRAMES
|
||||
#define FRAME_SIZE (16)
|
||||
#define FRAME_SIZE_STR ", frame size = 16"
|
||||
#else
|
||||
#define FRAME_SIZE (8)
|
||||
#define FRAME_SIZE_STR ", frame size = 8"
|
||||
#endif /* CONFIG_SPI_LOOPBACK_16BITS_FRAMES */
|
||||
|
||||
#ifdef CONFIG_DMA
|
||||
|
||||
#ifdef CONFIG_NOCACHE_MEMORY
|
||||
#define DMA_ENABLED_STR ", DMA enabled"
|
||||
#else /* CONFIG_NOCACHE_MEMORY */
|
||||
#define DMA_ENABLED_STR ", DMA enabled (without CONFIG_NOCACHE_MEMORY)"
|
||||
#endif
|
||||
|
||||
#else /* CONFIG_DMA */
|
||||
|
||||
#define DMA_ENABLED_STR
|
||||
#endif /* CONFIG_DMA */
|
||||
|
||||
#define SPI_OP(frame_size) SPI_OP_MODE_MASTER | SPI_MODE_CPOL | MODE_LOOP | \
|
||||
SPI_MODE_CPHA | SPI_WORD_SET(frame_size) | SPI_LINES_SINGLE
|
||||
|
||||
|
||||
static struct spi_dt_spec spi_fast = SPI_DT_SPEC_GET(SPI_FAST_DEV, SPI_OP(8), 0);
|
||||
static struct spi_dt_spec spi_slow = SPI_DT_SPEC_GET(SPI_SLOW_DEV, SPI_OP(8), 0);
|
||||
|
||||
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
|
||||
static __used struct spi_dt_spec spi_fast_16 = SPI_DT_SPEC_GET(SPI_FAST_DEV, SPI_OP(16), 0);
|
||||
static __used struct spi_dt_spec spi_slow_16 = SPI_DT_SPEC_GET(SPI_SLOW_DEV, SPI_OP(16), 0);
|
||||
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi) */
|
||||
static struct spi_dt_spec spi_fast = SPI_DT_SPEC_GET(SPI_FAST_DEV, SPI_OP(FRAME_SIZE), 0);
|
||||
static struct spi_dt_spec spi_slow = SPI_DT_SPEC_GET(SPI_SLOW_DEV, SPI_OP(FRAME_SIZE), 0);
|
||||
|
||||
/* to run this test, connect MOSI pin to the MISO of the SPI */
|
||||
|
||||
|
@ -44,20 +59,19 @@ static __used struct spi_dt_spec spi_slow_16 = SPI_DT_SPEC_GET(SPI_SLOW_DEV, SPI
|
|||
#define BUF2_SIZE 36
|
||||
|
||||
#if CONFIG_NOCACHE_MEMORY
|
||||
static const char tx_data[BUF_SIZE] = "0123456789abcdef-\0";
|
||||
static __aligned(32) char buffer_tx[BUF_SIZE] __used __attribute__((__section__(".nocache")));
|
||||
static __aligned(32) char buffer_rx[BUF_SIZE] __used __attribute__((__section__(".nocache")));
|
||||
static const char tx2_data[BUF2_SIZE] = "Thequickbrownfoxjumpsoverthelazydog\0";
|
||||
static __aligned(32) char buffer2_tx[BUF2_SIZE] __used __attribute__((__section__(".nocache")));
|
||||
static __aligned(32) char buffer2_rx[BUF2_SIZE] __used __attribute__((__section__(".nocache")));
|
||||
#else
|
||||
/* this src memory shall be in RAM to support using as a DMA source pointer.*/
|
||||
static uint8_t buffer_tx[] = "0123456789abcdef-\0";
|
||||
static uint8_t buffer_rx[BUF_SIZE] = {};
|
||||
#define __NOCACHE __attribute__((__section__(".nocache")))
|
||||
#elif defined(CONFIG_DT_DEFINED_NOCACHE)
|
||||
#define __NOCACHE __attribute__((__section__(CONFIG_DT_DEFINED_NOCACHE_NAME)))
|
||||
#else /* CONFIG_NOCACHE_MEMORY */
|
||||
#define __NOCACHE
|
||||
#endif /* CONFIG_NOCACHE_MEMORY */
|
||||
|
||||
static uint8_t buffer2_tx[] = "Thequickbrownfoxjumpsoverthelazydog\0";
|
||||
static uint8_t buffer2_rx[BUF2_SIZE] = {};
|
||||
#endif
|
||||
static const char tx_data[BUF_SIZE] = "0123456789abcdef-\0";
|
||||
static __aligned(32) char buffer_tx[BUF_SIZE] __used __NOCACHE;
|
||||
static __aligned(32) char buffer_rx[BUF_SIZE] __used __NOCACHE;
|
||||
static const char tx2_data[BUF2_SIZE] = "Thequickbrownfoxjumpsoverthelazydog\0";
|
||||
static __aligned(32) char buffer2_tx[BUF2_SIZE] __used __NOCACHE;
|
||||
static __aligned(32) char buffer2_rx[BUF2_SIZE] __used __NOCACHE;
|
||||
|
||||
/*
|
||||
* We need 5x(buffer size) + 1 to print a comma-separated list of each
|
||||
|
@ -539,7 +553,10 @@ ZTEST(spi_loopback, test_spi_loopback)
|
|||
struct k_thread async_thread;
|
||||
k_tid_t async_thread_id;
|
||||
#endif
|
||||
LOG_INF("SPI test on buffers TX/RX %p/%p", buffer_tx, buffer_rx);
|
||||
|
||||
LOG_INF("SPI test on buffers TX/RX %p/%p" FRAME_SIZE_STR DMA_ENABLED_STR,
|
||||
buffer_tx,
|
||||
buffer_rx);
|
||||
|
||||
#if (CONFIG_SPI_ASYNC)
|
||||
async_thread_id = k_thread_create(&async_thread,
|
||||
|
@ -582,51 +599,6 @@ ZTEST(spi_loopback, test_spi_loopback)
|
|||
goto end;
|
||||
}
|
||||
|
||||
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
|
||||
|
||||
/* 16 bits DMA test require to change dmamux config. by adding:
|
||||
* STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS
|
||||
*/
|
||||
#ifndef CONFIG_SPI_STM32_DMA
|
||||
|
||||
zassert_true(spi_is_ready_dt(&spi_slow_16),
|
||||
"Slow spi lookback (16 bits) device is not ready");
|
||||
|
||||
LOG_INF("SPI test slow config (16 bits)");
|
||||
|
||||
if (spi_complete_multiple(&spi_slow_16) ||
|
||||
spi_complete_loop(&spi_slow_16) ||
|
||||
spi_null_tx_buf(&spi_slow_16) ||
|
||||
spi_rx_half_start(&spi_slow_16) ||
|
||||
spi_rx_half_end(&spi_slow_16) ||
|
||||
spi_rx_every_4(&spi_slow_16)
|
||||
#if (CONFIG_SPI_ASYNC)
|
||||
|| spi_async_call(&spi_slow_16)
|
||||
#endif /* (CONFIG_SPI_ASYNC) */
|
||||
) {
|
||||
goto end;
|
||||
}
|
||||
|
||||
zassert_true(spi_is_ready_dt(&spi_fast_16),
|
||||
"Fast spi lookback (16 bits) device is not ready");
|
||||
|
||||
LOG_INF("SPI test fast config (16 bits)");
|
||||
|
||||
if (spi_complete_multiple(&spi_fast_16) ||
|
||||
spi_complete_loop(&spi_fast_16) ||
|
||||
spi_null_tx_buf(&spi_fast_16) ||
|
||||
spi_rx_half_start(&spi_fast_16) ||
|
||||
spi_rx_half_end(&spi_fast_16) ||
|
||||
spi_rx_every_4(&spi_fast_16)
|
||||
#if (CONFIG_SPI_ASYNC)
|
||||
|| spi_async_call(&spi_fast_16)
|
||||
#endif /* (CONFIG_SPI_ASYNC) */
|
||||
) {
|
||||
goto end;
|
||||
}
|
||||
#endif /* CONFIG_SPI_STM32_DMA */
|
||||
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi) */
|
||||
|
||||
if (spi_resource_lock_test(&spi_slow, &spi_fast)) {
|
||||
goto end;
|
||||
}
|
||||
|
@ -642,12 +614,10 @@ end:
|
|||
|
||||
static void *spi_loopback_setup(void)
|
||||
{
|
||||
#if CONFIG_NOCACHE_MEMORY
|
||||
memset(buffer_tx, 0, sizeof(buffer_tx));
|
||||
memcpy(buffer_tx, tx_data, sizeof(tx_data));
|
||||
memset(buffer2_tx, 0, sizeof(buffer2_tx));
|
||||
memcpy(buffer2_tx, tx2_data, sizeof(tx2_data));
|
||||
#endif
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
|
@ -32,6 +32,13 @@ tests:
|
|||
- tdk_robokit1
|
||||
integration_platforms:
|
||||
- sam_e70_xplained
|
||||
drivers.spi.stm32_spi_16bits_frames.loopback:
|
||||
extra_args:
|
||||
- OVERLAY_CONFIG="overlay-stm32-spi-16bits.conf"
|
||||
- DTC_OVERLAY_FILE="overlay-stm32-spi-16bits.overlay"
|
||||
platform_allow:
|
||||
- nucleo_h743zi
|
||||
- nucleo_h753zi
|
||||
drivers.spi.stm32_spi_dma.loopback:
|
||||
extra_args: OVERLAY_CONFIG="overlay-stm32-spi-dma.conf"
|
||||
filter: CONFIG_SOC_FAMILY_STM32
|
||||
|
@ -48,6 +55,29 @@ tests:
|
|||
- stm32h573i_dk
|
||||
integration_platforms:
|
||||
- nucleo_g474re
|
||||
drivers.spi.stm32_spi_dma_no_nocache.loopback:
|
||||
extra_args:
|
||||
- OVERLAY_CONFIG="overlay-stm32-spi-dma-no-nocache.conf"
|
||||
filter: CONFIG_SOC_FAMILY_STM32
|
||||
platform_allow:
|
||||
- nucleo_h743zi
|
||||
- nucleo_h753zi
|
||||
drivers.spi.stm32_spi_16bits_frames_dma.loopback:
|
||||
extra_args:
|
||||
- OVERLAY_CONFIG="overlay-stm32-spi-16bits-dma.conf"
|
||||
- DTC_OVERLAY_FILE="overlay-stm32-spi-16bits.overlay"
|
||||
filter: CONFIG_SOC_FAMILY_STM32
|
||||
platform_allow:
|
||||
- nucleo_h743zi
|
||||
- nucleo_h753zi
|
||||
drivers.spi.stm32_spi_16bits_frames_dma_no_nocache.loopback:
|
||||
extra_args:
|
||||
- OVERLAY_CONFIG="overlay-stm32-spi-16bits-dma-no-nocache.conf"
|
||||
- DTC_OVERLAY_FILE="overlay-stm32-spi-16bits.overlay"
|
||||
filter: CONFIG_SOC_FAMILY_STM32
|
||||
platform_allow:
|
||||
- nucleo_h743zi
|
||||
- nucleo_h753zi
|
||||
drivers.spi.gd32_spi_interrupt.loopback:
|
||||
extra_args: OVERLAY_CONFIG="overlay-gd32-spi-interrupt.conf"
|
||||
platform_allow:
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue