arch/x86_64: do not modify CR8 in interrupt path
Currently, the interrupt service code manually raises the CPU task priority to the priority level of the vector being serviced to defer any lower-priority interrupts. This is unnecessary; the local APIC is aware that an interrupt is in-service and accounts for its priority when deciding whether to issue an overriding interrupt to the CPU. Signed-off-by: Charles E. Youse <charles@gnuless.org>
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1 changed files with 2 additions and 13 deletions
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@ -176,15 +176,7 @@ long _isr_c_top(unsigned long vecret, unsigned long rsp,
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z_isr_entry();
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z_isr_entry();
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/* Set current priority in CR8 to the currently-serviced IRQ
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__asm__ volatile("sti"); /* re-enable interrupts */
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* and re-enable interrupts
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*/
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unsigned long long cr8, cr8new = vector >> 4;
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__asm__ volatile("movq %%cr8, %0;"
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"movq %1, %%cr8;"
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"sti"
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: "=r"(cr8) : "r"(cr8new));
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if (h->fn) {
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if (h->fn) {
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h->fn(h->arg, err);
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h->fn(h->arg, err);
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@ -192,10 +184,7 @@ long _isr_c_top(unsigned long vecret, unsigned long rsp,
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z_unhandled_vector(vector, err, frame);
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z_unhandled_vector(vector, err, frame);
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}
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}
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/* Mask interrupts to finish processing (they'll get restored
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__asm__ volatile("cli"); /* mask [at least] until upcoming IRET */
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* in the upcoming IRET) and restore CR8
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*/
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__asm__ volatile("cli; movq %0, %%cr8" : : "r"(cr8));
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/* Signal EOI if it's an APIC-managed interrupt */
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/* Signal EOI if it's an APIC-managed interrupt */
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if (vector > 0x1f) {
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if (vector > 0x1f) {
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