soc: esp32s2: ESP WiFi heap

Provide symbols for the creation of dynamic memory pool.
Fix the loader ROM buffers start address.
Fix static allocation size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
Marek Matej 2024-09-02 14:43:46 +02:00 committed by Henrik Brix Andersen
commit 3784beb6cc
2 changed files with 27 additions and 28 deletions

View file

@ -23,12 +23,12 @@ user_iram_end = BOOTLOADER_IRAM_LOADER_SEG_START;
#endif #endif
/* User available SRAM memory segments */ /* User available SRAM memory segments */
user_iram_seg_org = (SRAM_IRAM_START + SRAM_CACHE_SIZE); user_iram_seg_org = SRAM_IRAM_START + SRAM_CACHE_SIZE;
user_dram_seg_org = (SRAM_DRAM_START + SRAM_CACHE_SIZE); user_dram_seg_org = SRAM_DRAM_START + SRAM_CACHE_SIZE;
user_dram_end = (user_iram_end - IRAM_DRAM_OFFSET); user_dram_end = user_iram_end - IRAM_DRAM_OFFSET;
user_idram_size = (user_dram_end - user_dram_seg_org); user_sram_size = (user_dram_end - user_dram_seg_org);
user_iram_seg_len = user_idram_size; user_iram_seg_len = user_sram_size;
user_dram_seg_len = user_idram_size; user_dram_seg_len = user_sram_size;
/* Aliases */ /* Aliases */
#define FLASH_CODE_REGION irom0_0_seg #define FLASH_CODE_REGION irom0_0_seg
@ -102,7 +102,7 @@ ENTRY(CONFIG_KERNEL_ENTRY)
_rom_store_table = 0; _rom_store_table = 0;
/* Used as a pointer to the heap end */ /* Used as a pointer to the heap end */
_heap_sentry = DRAM_BUFFERS_START; _heap_sentry = DRAM_RESERVED_START;
SECTIONS SECTIONS
{ {
@ -797,17 +797,17 @@ SECTIONS
.dram0.noinit (NOLOAD) : .dram0.noinit (NOLOAD) :
{ {
. = ALIGN(8); . = ALIGN(4);
*(.noinit) *(.noinit)
*(.noinit.*) *(.noinit.*)
. = ALIGN(8); . = ALIGN(16);
} GROUP_LINK_IN(RAMABLE_REGION) } GROUP_LINK_IN(RAMABLE_REGION)
/* Provide total SRAM usage, including IRAM and DRAM */ /* Provide total SRAM usage, including IRAM and DRAM */
_image_ram_start = _iram_start - IRAM_DRAM_OFFSET; _image_ram_start = _iram_start - IRAM_DRAM_OFFSET;
#include <zephyr/linker/ram-end.ld> #include <zephyr/linker/ram-end.ld>
ASSERT(((__bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.") ASSERT(((_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "SRAM code/data does not fit.")
/* --- END OF DRAM --- */ /* --- END OF DRAM --- */
@ -946,6 +946,8 @@ SECTIONS
/* --- END OF .rodata --- */ /* --- END OF .rodata --- */
/* --- XTENSA GLUE AND DEBUG BEGIN --- */
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
#include <zephyr/linker/intlist.ld> #include <zephyr/linker/intlist.ld>
#endif #endif
@ -987,11 +989,7 @@ SECTIONS
} }
} }
ASSERT(((__bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), /* --- XTENSA GLUE AND DEBUG END --- */
"DRAM0 segment data does not fit.")
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
"IRAM0 segment data does not fit.")
#ifdef CONFIG_ESP_SPIRAM #ifdef CONFIG_ESP_SPIRAM
ASSERT(((_ext_ram_data_end - _ext_ram_data_start) <= CONFIG_ESP_SPIRAM_SIZE), ASSERT(((_ext_ram_data_end - _ext_ram_data_start) <= CONFIG_ESP_SPIRAM_SIZE),

View file

@ -9,8 +9,7 @@
*/ */
#define SRAM_IRAM_START 0x40020000 #define SRAM_IRAM_START 0x40020000
#define SRAM_DRAM_START 0x3ffb0000 #define SRAM_DRAM_START 0x3ffb0000
#define SRAM_CACHE_SIZE (CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \ #define SRAM_CACHE_SIZE (CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE + CONFIG_ESP32S2_DATA_CACHE_SIZE)
+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
/** Simplified memory map for the bootloader. /** Simplified memory map for the bootloader.
* Make sure the bootloader can load into main memory without overwriting itself. * Make sure the bootloader can load into main memory without overwriting itself.
@ -28,29 +27,31 @@
* Used to convert between 0x4002xxxx and 0x3ffbxxxx addresses. * Used to convert between 0x4002xxxx and 0x3ffbxxxx addresses.
*/ */
#define IRAM_DRAM_OFFSET 0x70000 #define IRAM_DRAM_OFFSET 0x70000
#define DRAM_BUFFERS_START 0x3ffeab00 #define DRAM_BUFFERS_START 0x3ffea400
#define DRAM_RESERVED_START 0x3ffec000 #define DRAM_BUFFERS_END 0x3fffc410
#define DRAM_STACK_START 0x3fffc410 #define DRAM_ROM_CPU_STACK_START 0x3fffc410
#define DRAM_ROM_BSS_DATA_START 0x3fffe710 #define DRAM_ROM_BSS_DATA_START 0x3fffe710
/* For safety margin between bootloader data section and startup stacks */ /* For safety margin between bootloader data section and startup stacks */
#define BOOTLOADER_STACK_OVERHEAD 0x0 #define BOOTLOADER_STACK_OVERHEAD 0x0
#define BOOTLOADER_DRAM_SEG_LEN 0x7000 #define BOOTLOADER_DRAM_SEG_LEN 0x8000
#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000 #define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000
#define BOOTLOADER_IRAM_SEG_LEN 0xa000 #define BOOTLOADER_IRAM_SEG_LEN 0xa000
/* Set the limit for the application runtime dynamic allocations */
#define DRAM_RESERVED_START DRAM_BUFFERS_END
/* Base address used for calculating memory layout /* Base address used for calculating memory layout
* counted from Dbus backwards and back to the Ibus * counted from Dbus backwards and back to the Ibus
*/ */
#define BOOTLOADER_USER_DRAM_END (DRAM_RESERVED_START - BOOTLOADER_STACK_OVERHEAD) #define BOOTLOADER_USER_DRAM_END (DRAM_BUFFERS_START - BOOTLOADER_STACK_OVERHEAD)
/* Start of the lower region is determined by region size and the end of the higher region */ /* Start of the lower region is determined by region size and the end of the higher region */
#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET \ #define BOOTLOADER_IRAM_LOADER_SEG_START \
- BOOTLOADER_IRAM_LOADER_SEG_LEN) (BOOTLOADER_USER_DRAM_END - BOOTLOADER_IRAM_LOADER_SEG_LEN + IRAM_DRAM_OFFSET)
#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_DRAM_SEG_LEN \ #define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN)
- IRAM_DRAM_OFFSET) #define BOOTLOADER_DRAM_SEG_START \
#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_DRAM_SEG_START - BOOTLOADER_IRAM_SEG_LEN \ (BOOTLOADER_IRAM_SEG_START - BOOTLOADER_DRAM_SEG_LEN - IRAM_DRAM_OFFSET)
+ IRAM_DRAM_OFFSET)
/* Flash */ /* Flash */
#ifdef CONFIG_FLASH_SIZE #ifdef CONFIG_FLASH_SIZE