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boards: lpcxpresso55s69: doc memory mappings

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Document on how memory is mapped in different configurations starting
from the MCUboot partitioning of the flash. The given examples are for
TFM use cases and dual-core samples.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This commit is contained in:
Andrei Gansari 2020-12-18 18:33:49 +02:00 • committed by Anas Nashif
commit 37284c7035
1 changed files with 70 additions and 2 deletions
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boards/arm/lpcxpresso55s69/doc/index.rst
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@ -96,8 +96,8 @@ To enable it, run any of the ``tfm_integration`` samples.
CPU1 does not work without CPU0 enabling it.
To enable it, run one of the following samples in ``subsys\ipc``:
- ``ipm_mcux``
- ``openamp``
- ``ipm_mcux``
- ``openamp``
Connections and IOs
===================
@ -131,6 +131,74 @@ functionality of a pin.
| PIO1_21 | I2C | I2C SDA |
+---------+-----------------+----------------------------+
Memory mappings
===============
There are multiple memory configurations, they all start from the
MCUboot partitioning which looks like the table below
+---------+------------------+---------------------------------+
| Name | Address[Size] | Comment |
+=========+==================+=================================+
| boot | 0x00000000[32K] | Bootloader |
+---------+------------------+---------------------------------+
| slot0 | 0x00008000[160k] | Image that runs after boot |
+---------+------------------+---------------------------------+
| slot1 | 0x00030000[96k] | Second image, core 1 or NS |
+---------+------------------+---------------------------------+
| slot2 | 0x00048000[160k] | Updates slot0 image |
+---------+------------------+---------------------------------+
| slot3 | 0x00070000[96k] | Updates slot1 image |
+---------+------------------+---------------------------------+
| storage | 0x00088000[50k] | File system, persistent storage |
+---------+------------------+---------------------------------+
See below examples of how this partitioning is used
Trusted Execution
*****************
+-----------+------------------+--------------------+
| Memory | Address[Size] | Comment |
+===========+==================+====================+
| MCUboot | 0x00000000[32K] | Secure bootloader |
+-----------+------------------+--------------------+
| TFM_S | 0x00008000[160k] | Secure image |
+-----------+------------------+--------------------+
| Zephyr_NS | 0x00030000[96k] | Non-Secure image |
+-----------+------------------+--------------------+
| storage | 0x00088000[50k] | Persistent storage |
+-----------+------------------+--------------------+
+----------------+------------------+-------------------+
| RAM | Address[Size] | Comment |
+================+==================+===================+
| secure_ram | 0x20000000[136k] | Secure memory |
+----------------+------------------+-------------------+
| non_secure_ram | 0x20022000[136k] | Non-Secure memory |
+----------------+------------------+-------------------+
Dual Core samples
*****************
+--------+------------------+----------------------------+
| Memory | Address[Size] | Comment |
+========+==================+============================+
| CPU0 | 0x00000000[630K] | CPU0, can access all flash |
+--------+------------------+----------------------------+
| CPU1 | 0x00030000[96k] | CPU1, has no MPU |
+--------+------------------+----------------------------+
+-------+------------------+-----------------------+
| RAM | Address[Size] | Comment |
+=======+==================+=======================+
| sram0 | 0x20000000[64k] | CPU0 memory |
+-------+------------------+-----------------------+
| sram3 | 0x20030000[64k] | CPU1 memory |
+-------+------------------+-----------------------+
| sram4 | 0x20040000[16k] | Mailbox/shared memory |
+-------+------------------+-----------------------+
System Clock
============