diff --git a/arch/arc/soc/em11d/soc.h b/arch/arc/soc/em11d/soc.h index 35fad53228d..d5e4e1df4c2 100644 --- a/arch/arc/soc/em11d/soc.h +++ b/arch/arc/soc/em11d/soc.h @@ -42,12 +42,6 @@ #include #include -/* ARCv2 timer 0 configuration settings for the system clock */ -#ifdef CONFIG_NANOKERNEL -#define CONFIG_ARCV2_TIMER0_CLOCK_FREQ 20000000 /* 20MHz reference clock */ -#define CONFIG_ARCV2_TIMER1_CLOCK_FREQ CONFIG_ARCV2_TIMER0_CLOCK_FREQ -#endif /* CONFIG_NANOKERNEL */ - #define CONFIG_ARCV2_TIMER0_INT_LVL IRQ_TIMER0 #define CONFIG_ARCV2_TIMER0_INT_PRI 0 diff --git a/arch/arc/soc/em9d/soc.h b/arch/arc/soc/em9d/soc.h index 35fad53228d..d5e4e1df4c2 100644 --- a/arch/arc/soc/em9d/soc.h +++ b/arch/arc/soc/em9d/soc.h @@ -42,12 +42,6 @@ #include #include -/* ARCv2 timer 0 configuration settings for the system clock */ -#ifdef CONFIG_NANOKERNEL -#define CONFIG_ARCV2_TIMER0_CLOCK_FREQ 20000000 /* 20MHz reference clock */ -#define CONFIG_ARCV2_TIMER1_CLOCK_FREQ CONFIG_ARCV2_TIMER0_CLOCK_FREQ -#endif /* CONFIG_NANOKERNEL */ - #define CONFIG_ARCV2_TIMER0_INT_LVL IRQ_TIMER0 #define CONFIG_ARCV2_TIMER0_INT_PRI 0 diff --git a/arch/arc/soc/quark_se_ss/soc.h b/arch/arc/soc/quark_se_ss/soc.h index 04bc3e2c57f..e814b45a216 100644 --- a/arch/arc/soc/quark_se_ss/soc.h +++ b/arch/arc/soc/quark_se_ss/soc.h @@ -108,13 +108,6 @@ #include #include -/* ARCv2 timer 0 configuration settings for the system clock */ -#ifdef CONFIG_NANOKERNEL -#define CONFIG_ARCV2_TIMER0_CLOCK_FREQ 32000000 /* 32MHz reference clock \ - */ -#define CONFIG_ARCV2_TIMER1_CLOCK_FREQ CONFIG_ARCV2_TIMER0_CLOCK_FREQ -#endif /* CONFIG_NANOKERNEL */ - #define INT_ENABLE_ARC ~(0x00000001 << 8) #define INT_ENABLE_ARC_BIT_POS (8) diff --git a/drivers/timer/arcv2_timer0.c b/drivers/timer/arcv2_timer0.c index b8ef4cee88f..51d9e765e81 100644 --- a/drivers/timer/arcv2_timer0.c +++ b/drivers/timer/arcv2_timer0.c @@ -63,12 +63,6 @@ #include /* - * The file(s) arch/arc/soc//soc.h must provide a definition for the - * following constant: - * - * CONFIG_ARCV2_TIMER0_CLOCK_FREQ - * - * This is the ARC CPU input clock frequency. * note: This implementation assumes Timer0 is present. Be sure * to build the ARC CPU with Timer0. */