michaelh/zephyr
1
0
Fork 0
Code Releases Activity

lpspi: the lpspi driver for rt1170

Browse source 
enable the  lpspi1 for the rt1170 evk board

Signed-off-by: Crist Xu <crist.xu@nxp.com>
This commit is contained in:
Crist Xu 2021-06-21 17:10:12 +08:00 • committed by Kumar Gala
commit 36e646f7b8
5 changed files with 29 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

11
boards/arm/mimxrt1170_evk/doc/index.rst
View file

@ -100,6 +100,8 @@ features:
+-----------+------------+-------------------------------------+ +-----------+------------+-------------------------------------+
| CAN | on-chip | flexcan | | CAN | on-chip | flexcan |
+-----------+------------+-------------------------------------+ +-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; | | UART | on-chip | serial port-polling; |
| | | serial port-interrupt | | | | serial port-interrupt |
+-----------+------------+-------------------------------------+ +-----------+------------+-------------------------------------+
@ -129,6 +131,15 @@ The MIMXRT1170 SoC has six pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+ +---------------+-----------------+---------------------------+
| GPIO_LPSR_01 | CAN3_RX | flexcan | | GPIO_LPSR_01 | CAN3_RX | flexcan |
+---------------+-----------------+---------------------------+ +---------------+-----------------+---------------------------+
| GPIO_AD_29 | SPI1_CS0 | spi |
+---------------+-----------------+---------------------------+
| GPIO_AD_28 | SPI1_CLK | spi |
+---------------+-----------------+---------------------------+
| GPIO_AD_30 | SPI1_SDO | spi |
+---------------+-----------------+---------------------------+
| GPIO_AD_31 | SPI1_SDI | spi |
+---------------+-----------------+---------------------------+
System Clock System Clock
============ ============

4
boards/arm/mimxrt1170_evk/mimxrt1170_evk_cm7.dts
View file

@ -38,6 +38,10 @@
bus-speed = <125000>; bus-speed = <125000>;
}; };
&lpspi1 {
status = "okay";
};
&flexspi1 { &flexspi1 {
reg = <0x400cc000 0x4000>, <0x30000000 DT_SIZE_M(16)>; reg = <0x400cc000 0x4000>, <0x30000000 DT_SIZE_M(16)>;
is25wp128: is25wp128@0 { is25wp128: is25wp128@0 {

1
boards/arm/mimxrt1170_evk/mimxrt1170_evk_cm7.yaml
View file

@ -18,3 +18,4 @@ supported:
- gpio - gpio
- counter - counter
- can - can
- spi

12
boards/arm/mimxrt1170_evk/pinmux.c
View file

@ -121,6 +121,18 @@ static int mimxrt1170_evk_init(const struct device *dev)
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_09_LPI2C1_SDA, 0x10U); IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_09_LPI2C1_SDA, 0x10U);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpspi1), okay) && CONFIG_SPI
/* LPIPI1 SCK, PCS0, SIN, SOUT */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_28_LPSPI1_SCK, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_29_LPSPI1_PCS0, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_30_LPSPI1_SOUT, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_31_LPSPI1_SIN, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_28_LPSPI1_SCK, 0x02U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_29_LPSPI1_PCS0, 0x02U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_30_LPSPI1_SOUT, 0x02U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_31_LPSPI1_SIN, 0x02U);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(enet), okay) && CONFIG_NET_L2_ETHERNET #if DT_NODE_HAS_STATUS(DT_NODELABEL(enet), okay) && CONFIG_NET_L2_ETHERNET
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_32_ENET_MDC, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_32_ENET_MDC, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_33_ENET_MDIO, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_33_ENET_MDIO, 0U);

2
samples/drivers/jesd216/sample.yaml
View file

@ -3,7 +3,7 @@ sample:
tests: tests:
sample.drivers.jesd216: sample.drivers.jesd216:
tags: spi flash tags: spi flash
platform_exclude: hifive1 platform_exclude: hifive1 mimxrt1170_evk_cm7 mimxrt1170_evk_cm4
filter: dt_compat_enabled("jedec,spi-nor") filter: dt_compat_enabled("jedec,spi-nor")
harness: console harness: console
harness_config: harness_config: