From 36d63e132d97ed2928bd99e03083d2d18bb4c4e1 Mon Sep 17 00:00:00 2001 From: Cong Nguyen Huu Date: Wed, 14 Jun 2023 14:20:41 +0700 Subject: [PATCH] boards: arm: mr_canhubk3: enable support for FlexCAN Reuse existing MCUX-based shim driver for FlexCAN. Enable flexcan0 for Zephyr canbus to run tests. Signed-off-by: Cong Nguyen Huu --- boards/arm/mr_canhubk3/doc/index.rst | 68 +++++++++ .../arm/mr_canhubk3/mr_canhubk3-pinctrl.dtsi | 66 +++++++++ boards/arm/mr_canhubk3/mr_canhubk3.dts | 140 ++++++++++++++++++ boards/arm/mr_canhubk3/mr_canhubk3.yaml | 1 + boards/arm/mr_canhubk3/mr_canhubk3_defconfig | 1 + dts/arm/nxp/nxp_s32k344_m7.dtsi | 61 ++++++++ soc/arm/nxp_s32/s32k/Kconfig.series | 1 + west.yml | 2 +- 8 files changed, 339 insertions(+), 1 deletion(-) diff --git a/boards/arm/mr_canhubk3/doc/index.rst b/boards/arm/mr_canhubk3/doc/index.rst index 5c8c5e2997c..bbdfd79c3ec 100644 --- a/boards/arm/mr_canhubk3/doc/index.rst +++ b/boards/arm/mr_canhubk3/doc/index.rst @@ -50,6 +50,7 @@ SIUL2 on-chip | pinctrl | external interrupt controller LPUART on-chip serial QSPI on-chip flash +FLEXCAN on-chip can ============ ========== ================================ The default configuration can be found in the Kconfig file @@ -107,6 +108,73 @@ P6.2 PTA9 LPUART2_TX P6.3 PTA8 LPUART2_RX ========= ===== ============ +CAN +=== + +CAN is provided through FLEXCAN interface with 6 instances. + +=============== ======= =============== ============= +Devicetree node Pin Pin Function Bus Connector +=============== ======= =============== ============= +flexcan0 | PTA6 | PTA6_CAN0_RX P12/P13 + | PTA7 | PTA7_CAN0_TX +flexcan1 | PTC9 | PTC9_CAN0_RX P14/P15 + | PTC8 | PTC8_CAN0_TX +flexcan2 | PTE25 | PTE25_CAN0_RX P16/P17 + | PTE24 | PTE24_CAN0_TX +flexcan3 | PTC29 | PTC29_CAN0_RX P18/019 + | PTC28 | PTC28_CAN0_TX +flexcan4 | PTC31 | PTC31_CAN0_RX P20/P21 + | PTC30 | PTC30_CAN0_TX +flexcan5 | PTC11 | PTC11_CAN0_RX P22/P23 + | PTC10 | PTC10_CAN0_TX +=============== ======= =============== ============= + +.. note:: + There is limitation by HAL SDK, so CAN only has support maximum 64 message buffers (MBs) + and support maximum 32 message buffers for concurrent active instances with 8 bytes + payload. We need to pay attention to configuration options: + + 1. :kconfig:option:`CONFIG_CAN_MAX_MB` must be less or equal than the + maximum number of message buffers that is according to the table below. + + 2. :kconfig:option:`CONFIG_CAN_MAX_FILTER` must be less or equal than + :kconfig:option:`CONFIG_CAN_MAX_MB`. + +=============== ========== ================ ================ +Devicetree node Payload Hardware support Software support +=============== ========== ================ ================ +flexcan0 | 8 bytes | 96 MBs | 64 MBs + | 16 bytes | 63 MBs | 42 MBs + | 32 bytes | 36 MBs | 24 MBs + | 64 bytes | 21 MBs | 14 MBs +flexcan1 | 8 bytes | 64 MBs | 64 MBs + | 16 bytes | 42 MBs | 42 MBs + | 32 bytes | 24 MBs | 24 MBs + | 64 bytes | 14 MBs | 14 MBs +flexcan2 | 8 bytes | 64 MBs | 64 MBs + | 16 bytes | 42 MBs | 42 MBs + | 32 bytes | 24 MBs | 24 MBs + | 64 bytes | 14 MBs | 14 MBs +flexcan3 | 8 bytes | 32 MBs | 32 MBs + | 16 bytes | 21 MBs | 21 MBs + | 32 bytes | 12 MBs | 12 MBs + | 64 bytes | 7 MBs | 7 MBs +flexcan4 | 8 bytes | 32 MBs | 32 MBs + | 16 bytes | 21 MBs | 21 MBs + | 32 bytes | 12 MBs | 12 MBs + | 64 bytes | 7 MBs | 7 MBs +flexcan5 | 8 bytes | 32 MBs | 32 MBs + | 16 bytes | 21 MBs | 21 MBs + | 32 bytes | 12 MBs | 12 MBs + | 64 bytes | 7 MBs | 7 MBs +=============== ========== ================ ================ + +.. note:: + A CAN bus usually requires 60 Ohm termination at both ends of the bus. This may be + accomplished using one of the included CAN termination boards. For more details, refer + to the section ``6.3 CAN Connectors`` in the Hardware User Manual of `NXP MR-CANHUBK3`_. + FS26 SBC Watchdog ================= diff --git a/boards/arm/mr_canhubk3/mr_canhubk3-pinctrl.dtsi b/boards/arm/mr_canhubk3/mr_canhubk3-pinctrl.dtsi index aedc0ebfb5f..029a386e2b0 100644 --- a/boards/arm/mr_canhubk3/mr_canhubk3-pinctrl.dtsi +++ b/boards/arm/mr_canhubk3/mr_canhubk3-pinctrl.dtsi @@ -110,4 +110,70 @@ bias-pull-up; }; }; + + flexcan0_default: flexcan0_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + output-enable; + }; + }; + + flexcan1_default: flexcan1_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + output-enable; + }; + }; + + flexcan2_default: flexcan2_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + output-enable; + }; + }; + + flexcan3_default: flexcan3_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + output-enable; + }; + }; + + flexcan4_default: flexcan4_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + output-enable; + }; + }; + + flexcan5_default: flexcan5_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + output-enable; + }; + }; }; diff --git a/boards/arm/mr_canhubk3/mr_canhubk3.dts b/boards/arm/mr_canhubk3/mr_canhubk3.dts index e068090ec8b..65d90dfa2cd 100644 --- a/boards/arm/mr_canhubk3/mr_canhubk3.dts +++ b/boards/arm/mr_canhubk3/mr_canhubk3.dts @@ -22,6 +22,7 @@ zephyr,console = &lpuart2; zephyr,shell-uart = &lpuart2; zephyr,flash-controller = &mx25l6433f; + zephyr,canbus = &flexcan0; }; aliases { @@ -59,6 +60,54 @@ gpios = <&gpioa_h 9 GPIO_ACTIVE_HIGH>; }; }; + + can_phy0: can-phy0 { + compatible = "nxp,tja1443", "can-transceiver-gpio"; + enable-gpios = <&gpioc_h 8 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpioc_h 5 GPIO_ACTIVE_LOW>; + max-bitrate = <5000000>; + #phy-cells = <0>; + }; + + can_phy1: can-phy1 { + compatible = "nxp,tja1443", "can-transceiver-gpio"; + enable-gpios = <&gpiod_l 2 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpiod_h 7 GPIO_ACTIVE_LOW>; + max-bitrate = <5000000>; + #phy-cells = <0>; + }; + + can_phy2: can-phy2 { + compatible = "nxp,tja1463", "can-transceiver-gpio"; + enable-gpios = <&gpiod_l 4 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpiod_h 6 GPIO_ACTIVE_LOW>; + max-bitrate = <8000000>; + #phy-cells = <0>; + }; + + can_phy3: can-phy3 { + compatible = "nxp,tja1463", "can-transceiver-gpio"; + enable-gpios = <&gpiob_l 0 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpiob_l 1 GPIO_ACTIVE_LOW>; + max-bitrate = <8000000>; + #phy-cells = <0>; + }; + + can_phy4: can-phy4 { + compatible = "nxp,tja1153", "can-transceiver-gpio"; + enable-gpios = <&gpioc_h 10 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpioc_h 9 GPIO_ACTIVE_LOW>; + max-bitrate = <2000000>; + #phy-cells = <0>; + }; + + can_phy5: can-phy5 { + compatible = "nxp,tja1153", "can-transceiver-gpio"; + enable-gpios = <&gpioe_h 1 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpiod_h 14 GPIO_ACTIVE_LOW>; + max-bitrate = <2000000>; + #phy-cells = <0>; + }; }; &flash0 { @@ -87,10 +136,28 @@ status = "okay"; }; +/* Enable gpio to control the CAN transceivers */ + +&gpioc_h { + status = "okay"; +}; + &gpiod_l { status = "okay"; }; +&gpiod_h { + status = "okay"; +}; + +&gpiob_l { + status = "okay"; +}; + +&gpioe_h { + status = "okay"; +}; + &eirq0 { pinctrl-0 = <&eirq0_default>; pinctrl-names = "default"; @@ -168,3 +235,76 @@ }; }; }; + +&flexcan0 { + pinctrl-0 = <&flexcan0_default>; + pinctrl-names = "default"; + phys = <&can_phy0>; + bus-speed = <125000>; + sample-point = <875>; + sjw = <1>; + bus-speed-data = <1000000>; + sample-point-data = <875>; + sjw-data = <1>; + status = "okay"; +}; + +&flexcan1 { + pinctrl-0 = <&flexcan1_default>; + pinctrl-names = "default"; + phys = <&can_phy1>; + bus-speed = <125000>; + sample-point = <875>; + sjw = <1>; + bus-speed-data = <1000000>; + sample-point-data = <875>; + sjw-data = <1>; +}; + +&flexcan2 { + pinctrl-0 = <&flexcan2_default>; + pinctrl-names = "default"; + phys = <&can_phy2>; + bus-speed = <125000>; + sample-point = <875>; + sjw = <1>; + bus-speed-data = <1000000>; + sample-point-data = <875>; + sjw-data = <1>; +}; + +&flexcan3 { + pinctrl-0 = <&flexcan3_default>; + pinctrl-names = "default"; + phys = <&can_phy3>; + bus-speed = <125000>; + sample-point = <875>; + sjw = <1>; + bus-speed-data = <1000000>; + sample-point-data = <875>; + sjw-data = <1>; +}; + +&flexcan4 { + pinctrl-0 = <&flexcan4_default>; + pinctrl-names = "default"; + phys = <&can_phy4>; + bus-speed = <125000>; + sample-point = <875>; + sjw = <1>; + bus-speed-data = <1000000>; + sample-point-data = <875>; + sjw-data = <1>; +}; + +&flexcan5 { + pinctrl-0 = <&flexcan5_default>; + pinctrl-names = "default"; + phys = <&can_phy5>; + bus-speed = <125000>; + sample-point = <875>; + sjw = <1>; + bus-speed-data = <1000000>; + sample-point-data = <875>; + sjw-data = <1>; +}; diff --git a/boards/arm/mr_canhubk3/mr_canhubk3.yaml b/boards/arm/mr_canhubk3/mr_canhubk3.yaml index 97abfd20b50..ca04df51ab8 100644 --- a/boards/arm/mr_canhubk3/mr_canhubk3.yaml +++ b/boards/arm/mr_canhubk3/mr_canhubk3.yaml @@ -12,3 +12,4 @@ toolchain: supported: - gpio - uart + - can diff --git a/boards/arm/mr_canhubk3/mr_canhubk3_defconfig b/boards/arm/mr_canhubk3/mr_canhubk3_defconfig index 91ebfcc17d2..2cf92c9598b 100644 --- a/boards/arm/mr_canhubk3/mr_canhubk3_defconfig +++ b/boards/arm/mr_canhubk3/mr_canhubk3_defconfig @@ -21,6 +21,7 @@ CONFIG_NOCACHE_MEMORY=y # Drivers CONFIG_PINCTRL=y CONFIG_SERIAL=y +CONFIG_GPIO=y # Enable support for GPIO controlled CAN transceivers # Serial console CONFIG_CONSOLE=y diff --git a/dts/arm/nxp/nxp_s32k344_m7.dtsi b/dts/arm/nxp/nxp_s32k344_m7.dtsi index 5f2f373e618..ed217192c87 100644 --- a/dts/arm/nxp/nxp_s32k344_m7.dtsi +++ b/dts/arm/nxp/nxp_s32k344_m7.dtsi @@ -423,6 +423,67 @@ #size-cells = <0>; status = "disabled"; }; + + flexcan0: can@40304000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x40304000 0x4000>; + clocks = <&clock NXP_S32_FLEXCANA_CLK>; + clk-source = <0>; + interrupts = <109 0>, <110 0>, <111 0>, <112 0>; + interrupt-names = "ored", "ored_0_31_mb", + "ored_32_63_mb", "ored_64_95_mb"; + status = "disabled"; + }; + + flexcan1: can@40308000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x40308000 0x4000>; + clocks = <&clock NXP_S32_FLEXCANA_CLK>; + clk-source = <0>; + interrupts = <113 0>, <114 0>, <115 0>; + interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb"; + status = "disabled"; + }; + + flexcan2: can@4030c000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x4030c000 0x4000>; + clocks = <&clock NXP_S32_FLEXCANA_CLK>; + clk-source = <0>; + interrupts = <116 0>, <117 0>, <118 0>; + interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb"; + status = "disabled"; + }; + + flexcan3: can@40310000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x40310000 0x4000>; + clocks = <&clock NXP_S32_FLEXCANB_CLK>; + clk-source = <0>; + interrupts = <119 0>, <120 0>; + interrupt-names = "ored", "ored_0_31_mb"; + status = "disabled"; + }; + + flexcan4: can@40314000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x40314000 0x4000>; + clocks = <&clock NXP_S32_FLEXCANB_CLK>; + clk-source = <0>; + interrupts = <121 0>, <122 0>; + interrupt-names = "ored", "ored_0_31_mb"; + status = "disabled"; + }; + + flexcan5: can@40318000 { + compatible = "nxp,flexcan-fd", "nxp,flexcan"; + reg = <0x40318000 0x4000>; + clocks = <&clock NXP_S32_FLEXCANB_CLK>; + clk-source = <0>; + interrupts = <123 0>, <124 0>; + interrupt-names = "ored", "ored_0_31_mb"; + status = "disabled"; + }; }; }; diff --git a/soc/arm/nxp_s32/s32k/Kconfig.series b/soc/arm/nxp_s32/s32k/Kconfig.series index 3bee28013ea..28532cf1809 100644 --- a/soc/arm/nxp_s32/s32k/Kconfig.series +++ b/soc/arm/nxp_s32/s32k/Kconfig.series @@ -16,5 +16,6 @@ config SOC_SERIES_S32K3_M7 select CLOCK_CONTROL select HAS_MCUX select HAS_MCUX_LPUART + select HAS_MCUX_FLEXCAN help Enable support for NXP S32K3 MCUs family on Cortex-M7 cores diff --git a/west.yml b/west.yml index a358b56064f..17fed2a7f10 100644 --- a/west.yml +++ b/west.yml @@ -183,7 +183,7 @@ manifest: groups: - hal - name: hal_nxp - revision: 35b0e5afc4f061cedc5a0411e024dad6d9e8101f + revision: 9fb917ffde77b6ad7e9bfac35b0cb4012709e68c path: modules/hal/nxp groups: - hal