spell: fix Kconfig help typos: /arch
Fix misspellings in Kconfig help text Change-Id: I2a753b57107f09073eb84ac757ac1e180ae89349 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
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7 changed files with 12 additions and 12 deletions
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@ -97,7 +97,7 @@ config RGF_NUM_BANKS
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register bank, in the set, will be used by FIRQ interrupts.
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register bank, in the set, will be used by FIRQ interrupts.
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If fast interrupts are supported but there is only 1
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If fast interrupts are supported but there is only 1
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register bank, the fast interrupt handler must save
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register bank, the fast interrupt handler must save
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and restore general purpose regsiters.
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and restore general purpose registers.
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config FIRQ_STACK_SIZE
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config FIRQ_STACK_SIZE
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int
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int
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@ -28,7 +28,7 @@ config ISA_THUMB2
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the Thumb instructions set. This allows more of the application to
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the Thumb instructions set. This allows more of the application to
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benefit from the best in class code density of Thumb.
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benefit from the best in class code density of Thumb.
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For performance optimised code Thumb-2 technology uses 31 percent
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For performance optimized code Thumb-2 technology uses 31 percent
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less memory to reduce system cost, while providing up to 38 percent
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less memory to reduce system cost, while providing up to 38 percent
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higher performance than existing high density code, which can be used
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higher performance than existing high density code, which can be used
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to prolong battery-life or to enrich the product feature set. Thumb-2
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to prolong battery-life or to enrich the product feature set. Thumb-2
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@ -17,4 +17,4 @@ config SOC_SERIES_SAME70
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help
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help
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Enable support for Atmel SAM E70 ARM Cortex-M7 Microcontrollers.
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Enable support for Atmel SAM E70 ARM Cortex-M7 Microcontrollers.
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Part No.: SAME70J19, SAME70J20, SAME70J21, SAME70N19, SAME70N20,
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Part No.: SAME70J19, SAME70J20, SAME70J21, SAME70N19, SAME70N20,
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SAME70N21, SAME70Q19, SAME70Q20, SAME70Q21
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SAME70N21, SAME70Q19, SAME70Q20, SAME70Q21
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@ -23,7 +23,7 @@ config SOC_ATMEL_SAM3_EXT_SLCK
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adds a few seconds to boot time, as the crystal
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adds a few seconds to boot time, as the crystal
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needs to stabilize after power-up.
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needs to stabilize after power-up.
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Says n if you do not need accraute and precise timers.
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Says n if you do not need accurate and precise timers.
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The slow clock will be driven by the internal fast
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The slow clock will be driven by the internal fast
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RC oscillator running at 32 kHz.
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RC oscillator running at 32 kHz.
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@ -119,7 +119,7 @@ config SSE_FP_MATH
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performing floating point math. This can greatly improve performance
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performing floating point math. This can greatly improve performance
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when exactly the same operations are to be performed on multiple
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when exactly the same operations are to be performed on multiple
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data objects; however, it can also significantly reduce performance
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data objects; however, it can also significantly reduce performance
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when pre-emptive task switches occur because of the larger register
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when preemptive task switches occur because of the larger register
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set that must be saved and restored.
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set that must be saved and restored.
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Disabling this option means that the compiler utilizes only the
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Disabling this option means that the compiler utilizes only the
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@ -42,11 +42,11 @@ config SYS_LOG_ARC_INIT_LEVEL
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- 1 ERROR, only write SYS_LOG_ERR
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- 1 ERROR, only write SYS_LOG_ERR
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- 2 WARNING, write SYS_LOG_WRN in adition to previous level
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- 2 WARNING, write SYS_LOG_WRN in addition to previous level
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- 3 INFO, write SYS_LOG_INF in adition to previous levels
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- 3 INFO, write SYS_LOG_INF in addition to previous levels
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- 4 DEBUG, write SYS_LOG_DBG in adition to previous levels
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- 4 DEBUG, write SYS_LOG_DBG in addition to previous levels
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config ARC_GDB_ENABLE
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config ARC_GDB_ENABLE
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bool "Allows the usage of GDB with the ARC processor."
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bool "Allows the usage of GDB with the ARC processor."
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@ -70,7 +70,7 @@ config QUARK_SE_IPM_CONSOLE_RING_BUF_SIZE32
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int "IPM Console Ring Buffer Size"
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int "IPM Console Ring Buffer Size"
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default 256
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default 256
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help
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help
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Size of the buffer for the console reciever, for incoming
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Size of the buffer for the console receiver, for incoming
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console messages from the ARC side. Must be a power of 2.
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console messages from the ARC side. Must be a power of 2.
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endif
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endif
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endif
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endif
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@ -28,8 +28,8 @@ config XTENSA_NO_IPC
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select ATOMIC_OPERATIONS_C
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select ATOMIC_OPERATIONS_C
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default n
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default n
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help
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help
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Uncheck this if you core does not implment "SCOMPARE1" register and "s32c1i"
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Uncheck this if you core does not implement "SCOMPARE1" register and "s32c1i"
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isntruction.
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instruction.
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config SW_ISR_TABLE
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config SW_ISR_TABLE
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bool
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bool
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@ -39,7 +39,7 @@ config SW_ISR_TABLE
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Enable an interrupt handler table implemented in software. This
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Enable an interrupt handler table implemented in software. This
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table, unlike ISRs connected directly in the vector table, allow
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table, unlike ISRs connected directly in the vector table, allow
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a parameter to be passed to the interrupt handlers. Also, invoking
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a parameter to be passed to the interrupt handlers. Also, invoking
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the exeception/interrupt exit stub is automatically done.
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the exception/interrupt exit stub is automatically done.
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This has to be enabled for dynamically connecting interrupt handlers
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This has to be enabled for dynamically connecting interrupt handlers
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at runtime (SW_ISR_TABLE_DYNAMIC).
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at runtime (SW_ISR_TABLE_DYNAMIC).
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