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boards: arm: mimxrt595_evk: Plumbs RT595 USDHC

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- Adds the pin controls and ushdc settings in device tree
- Attaches clock to USDHC in soc.c
- Adds binding for mmc

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2022-08-30 10:19:09 -05:00 • committed by Carles Cufí
commit 36b6dec832
4 changed files with 76 additions and 0 deletions
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39
boards/arm/mimxrt595_evk/mimxrt595_evk_cm33-pinctrl.dtsi
View file

@ -149,4 +149,43 @@
nxp,analog-mode;
};
};
pinmux_usdhc: pinmux_usdhc {
group0 {
pinmux = <SD0_CMD_PIO1_31>,
<USDHC0_USDHC_DATA0_PIO2_0>,
<USDHC0_USDHC_DATA1_PIO2_1>,
<USDHC0_USDHC_DATA2_PIO2_2>,
<USDHC0_USDHC_DATA3_PIO2_3>,
<USDHC0_USDHC_DATA4_PIO2_5>,
<USDHC0_USDHC_DATA5_PIO2_6>,
<USDHC0_USDHC_DATA6_PIO2_7>,
<USDHC0_USDHC_DATA7_PIO2_8>,
<SD0_CARD_DET_N_PIO2_9>;
bias-pull-up;
input-enable;
slew-rate = "normal";
drive-strength = "normal";
};
group1 {
pinmux = <SD0_CLK_PIO1_30>;
bias-pull-down;
input-enable;
slew-rate = "normal";
drive-strength = "normal";
};
group2 {
pinmux = <GPIO_PIO210_PIO2_10>;
bias-pull-down;
slew-rate = "normal";
drive-strength = "normal";
};
group3 {
pinmux = <SD0_DS_PIO2_4>;
bias-pull-down;
input-enable;
slew-rate = "slow";
drive-strength = "normal";
};
};
};

13
boards/arm/mimxrt595_evk/mimxrt595_evk_cm33.dts
View file

@ -24,6 +24,7 @@
watchdog0 = &wwdt0;
magn0 = &fxos8700;
accel0 = &fxos8700;
sdhc0 = &usdhc1;
};
chosen {
@ -319,6 +320,18 @@ zephyr_udc0: &usbhs {
status = "okay";
};
&usdhc1 {
status = "okay";
pwr-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
mmc {
compatible = "zephyr,mmc-disk";
status = "okay";
};
pinctrl-0 = <&pinmux_usdhc>;
pinctrl-names = "default";
};
&wwdt0 {
status = "okay";
};

9
dts/bindings/sd/zephyr,mmc-disk.yaml Normal file
View file

@ -0,0 +1,9 @@
description: |
Zephyr MMC disk node. A binding with this compatible present within an SD
host controller device node indicates that an MMC chip is attached to that
SD bus. This binding will enable that to be used with the disk driver
API and any subsystems that utilize it.
compatible: "zephyr,mmc-disk"
include: [sd-device.yaml]

15
soc/arm/nxp_imx/rt5xx/soc.c
View file

@ -289,6 +289,21 @@ static void clock_init(void)
/* Switch CLKOUT to FRO_DIV2 */
CLOCK_AttachClk(kFRO_DIV2_to_CLKOUT);
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
/* Make sure USDHC ram buffer has been power up*/
POWER_DisablePD(kPDRUNCFG_APD_USDHC0_SRAM);
POWER_DisablePD(kPDRUNCFG_PPD_USDHC0_SRAM);
POWER_DisablePD(kPDRUNCFG_PD_LPOSC);
POWER_ApplyPD();
/* usdhc depend on 32K clock also */
CLOCK_AttachClk(kLPOSC_DIV32_to_32KHZWAKE_CLK);
CLOCK_AttachClk(kAUX0_PLL_to_SDIO0_CLK);
CLOCK_SetClkDiv(kCLOCK_DivSdio0Clk, 1);
CLOCK_EnableClock(kCLOCK_Sdio0);
RESET_PeripheralReset(kSDIO0_RST_SHIFT_RSTn);
#endif
DT_FOREACH_STATUS_OKAY(nxp_lpc_ctimer, CTIMER_CLOCK_SETUP)
/* Set up dividers. */