ITE: drivers/peci: Use pinctrl instead of pinmux driver
Use pinctrl instead of pinmux driver. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
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5551872047
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3670977158
6 changed files with 27 additions and 29 deletions
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@ -153,6 +153,11 @@
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&kscan0 {
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&kscan0 {
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status = "okay";
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status = "okay";
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};
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};
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&peci0 {
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status = "okay";
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pinctrl-0 = <&peci_gpf6_default>;
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pinctrl-names = "default";
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};
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&flash0 {
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&flash0 {
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partitions {
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partitions {
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compatible = "fixed-partitions";
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compatible = "fixed-partitions";
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@ -7,7 +7,7 @@
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#define DT_DRV_COMPAT ite_peci_it8xxx2
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#define DT_DRV_COMPAT ite_peci_it8xxx2
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#include <drivers/gpio.h>
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#include <drivers/gpio.h>
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#include <drivers/pinmux.h>
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#include <drivers/pinctrl.h>
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#include <drivers/peci.h>
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#include <drivers/peci.h>
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#include <kernel.h>
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#include <kernel.h>
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#include <errno.h>
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#include <errno.h>
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@ -90,19 +90,10 @@ enum peci_vtts {
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HOVTTS1P25V = 0x10,
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HOVTTS1P25V = 0x10,
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};
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};
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/* The following definitions are inclusive of the config/data
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* and related properties of the PECI device.
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*/
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struct peci_alts_cfg {
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const struct device *pinctrls;
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uint8_t pin;
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uint8_t alt_fun;
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};
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struct peci_it8xxx2_config {
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struct peci_it8xxx2_config {
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uintptr_t base_addr;
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uintptr_t base_addr;
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uint8_t irq_no;
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uint8_t irq_no;
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const struct peci_alts_cfg *alts_list;
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const struct pinctrl_dev_config *pcfg;
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};
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};
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struct peci_it8xxx2_data {
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struct peci_it8xxx2_data {
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@ -111,14 +102,12 @@ struct peci_it8xxx2_data {
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uint32_t bitrate;
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uint32_t bitrate;
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};
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};
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static const struct peci_alts_cfg
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PINCTRL_DT_INST_DEFINE(0);
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peci_alt_inst[DT_INST_NUM_PINCTRLS_BY_IDX(0, 0)] =
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IT8XXX2_DT_ALT_ITEMS_LIST(0);
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static const struct peci_it8xxx2_config peci_it8xxx2_config0 = {
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static const struct peci_it8xxx2_config peci_it8xxx2_config0 = {
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.base_addr = DT_INST_REG_ADDR(0),
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.base_addr = DT_INST_REG_ADDR(0),
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.irq_no = DT_INST_IRQN(0),
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.irq_no = DT_INST_IRQN(0),
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.alts_list = peci_alt_inst,
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
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};
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};
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static struct peci_it8xxx2_data peci_it8xxx2_data0;
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static struct peci_it8xxx2_data peci_it8xxx2_data0;
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@ -323,14 +312,17 @@ static int peci_it8xxx2_init(const struct device *dev)
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const struct peci_it8xxx2_config *config = dev->config;
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const struct peci_it8xxx2_config *config = dev->config;
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struct peci_it8xxx2_regs *const peci_regs =
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struct peci_it8xxx2_regs *const peci_regs =
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(struct peci_it8xxx2_regs *)config->base_addr;
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(struct peci_it8xxx2_regs *)config->base_addr;
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int status;
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/* Initialize Semaphore */
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/* Initialize Semaphore */
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k_sem_init(&data->device_sync_sem, 0, 1);
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k_sem_init(&data->device_sync_sem, 0, 1);
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/* Configure the GPF6 to Alternative Function 3: PECI */
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/* Configure the GPF6 to Alternative Function 3: PECI */
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pinmux_pin_set(config->alts_list[PECI0].pinctrls,
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status = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
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config->alts_list[PECI0].pin,
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if (status < 0) {
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config->alts_list[PECI0].alt_fun);
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LOG_ERR("Failed to configure PECI pins");
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return status;
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}
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peci_regs->PADCTLR |= PECI_DVIE;
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peci_regs->PADCTLR |= PECI_DVIE;
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peci_it8xxx2_init_vtts(peci_regs, HOVTTS0P95V);
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peci_it8xxx2_init_vtts(peci_regs, HOVTTS0P95V);
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@ -5,10 +5,11 @@ description: ITE it8xxx2 PECI
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compatible: "ite,peci-it8xxx2"
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compatible: "ite,peci-it8xxx2"
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include: peci.yaml
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include: [peci.yaml, pinctrl-device.yaml]
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properties:
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properties:
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pinctrl-0:
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pinctrl-0:
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type: phandles
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required: true
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required: true
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description: Configuration of the PECI pin which is mapped to the GPIO
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pinctrl-names:
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required: true
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@ -24,11 +24,6 @@
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pinctrls = <&pinmuxm 5 IT8XXX2_PINMUX_FUNC_1>;
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pinctrls = <&pinmuxm 5 IT8XXX2_PINMUX_FUNC_1>;
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};
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};
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/* PECI alternate function */
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pinctrl_peci: peci {
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pinctrls = <&pinmuxf 6 IT8XXX2_PINMUX_FUNC_3>;
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};
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/* Keyboard alternate function */
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/* Keyboard alternate function */
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pinctrl_kso16: kso16 {
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pinctrl_kso16: kso16 {
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pinctrls = <&pinmuxc 3 IT8XXX2_PINMUX_FUNC_1>;
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pinctrls = <&pinmuxc 3 IT8XXX2_PINMUX_FUNC_1>;
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@ -1398,7 +1398,7 @@
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#size-cells = <0>;
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#size-cells = <0>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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interrupts = <160 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <160 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&pinctrl_peci>;
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status = "disabled";
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};
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};
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kscan0: kscan@f01d00 {
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kscan0: kscan@f01d00 {
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@ -89,6 +89,11 @@
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pinmuxs = <&pinctrla 5 IT8XXX2_ALT_FUNC_3>;
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pinmuxs = <&pinctrla 5 IT8XXX2_ALT_FUNC_3>;
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};
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};
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/* PECI alternate function */
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peci_gpf6_default: peci_gpf6_default {
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pinmuxs = <&pinctrlf 6 IT8XXX2_ALT_FUNC_3>;
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};
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/* PWM alternate function */
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/* PWM alternate function */
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pwm0_gpa0_default: pwm0_gpa0_default {
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pwm0_gpa0_default: pwm0_gpa0_default {
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pinmuxs = <&pinctrla 0 IT8XXX2_ALT_FUNC_1>;
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pinmuxs = <&pinctrla 0 IT8XXX2_ALT_FUNC_1>;
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