ITE: drivers/peci: Use pinctrl instead of pinmux driver

Use pinctrl instead of pinmux driver.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit is contained in:
Tim Lin 2022-03-26 14:48:51 +08:00 committed by Carles Cufí
commit 3670977158
6 changed files with 27 additions and 29 deletions

View file

@ -153,6 +153,11 @@
&kscan0 { &kscan0 {
status = "okay"; status = "okay";
}; };
&peci0 {
status = "okay";
pinctrl-0 = <&peci_gpf6_default>;
pinctrl-names = "default";
};
&flash0 { &flash0 {
partitions { partitions {
compatible = "fixed-partitions"; compatible = "fixed-partitions";

View file

@ -7,7 +7,7 @@
#define DT_DRV_COMPAT ite_peci_it8xxx2 #define DT_DRV_COMPAT ite_peci_it8xxx2
#include <drivers/gpio.h> #include <drivers/gpio.h>
#include <drivers/pinmux.h> #include <drivers/pinctrl.h>
#include <drivers/peci.h> #include <drivers/peci.h>
#include <kernel.h> #include <kernel.h>
#include <errno.h> #include <errno.h>
@ -90,19 +90,10 @@ enum peci_vtts {
HOVTTS1P25V = 0x10, HOVTTS1P25V = 0x10,
}; };
/* The following definitions are inclusive of the config/data
* and related properties of the PECI device.
*/
struct peci_alts_cfg {
const struct device *pinctrls;
uint8_t pin;
uint8_t alt_fun;
};
struct peci_it8xxx2_config { struct peci_it8xxx2_config {
uintptr_t base_addr; uintptr_t base_addr;
uint8_t irq_no; uint8_t irq_no;
const struct peci_alts_cfg *alts_list; const struct pinctrl_dev_config *pcfg;
}; };
struct peci_it8xxx2_data { struct peci_it8xxx2_data {
@ -111,14 +102,12 @@ struct peci_it8xxx2_data {
uint32_t bitrate; uint32_t bitrate;
}; };
static const struct peci_alts_cfg PINCTRL_DT_INST_DEFINE(0);
peci_alt_inst[DT_INST_NUM_PINCTRLS_BY_IDX(0, 0)] =
IT8XXX2_DT_ALT_ITEMS_LIST(0);
static const struct peci_it8xxx2_config peci_it8xxx2_config0 = { static const struct peci_it8xxx2_config peci_it8xxx2_config0 = {
.base_addr = DT_INST_REG_ADDR(0), .base_addr = DT_INST_REG_ADDR(0),
.irq_no = DT_INST_IRQN(0), .irq_no = DT_INST_IRQN(0),
.alts_list = peci_alt_inst, .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
}; };
static struct peci_it8xxx2_data peci_it8xxx2_data0; static struct peci_it8xxx2_data peci_it8xxx2_data0;
@ -323,14 +312,17 @@ static int peci_it8xxx2_init(const struct device *dev)
const struct peci_it8xxx2_config *config = dev->config; const struct peci_it8xxx2_config *config = dev->config;
struct peci_it8xxx2_regs *const peci_regs = struct peci_it8xxx2_regs *const peci_regs =
(struct peci_it8xxx2_regs *)config->base_addr; (struct peci_it8xxx2_regs *)config->base_addr;
int status;
/* Initialize Semaphore */ /* Initialize Semaphore */
k_sem_init(&data->device_sync_sem, 0, 1); k_sem_init(&data->device_sync_sem, 0, 1);
/* Configure the GPF6 to Alternative Function 3: PECI */ /* Configure the GPF6 to Alternative Function 3: PECI */
pinmux_pin_set(config->alts_list[PECI0].pinctrls, status = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
config->alts_list[PECI0].pin, if (status < 0) {
config->alts_list[PECI0].alt_fun); LOG_ERR("Failed to configure PECI pins");
return status;
}
peci_regs->PADCTLR |= PECI_DVIE; peci_regs->PADCTLR |= PECI_DVIE;
peci_it8xxx2_init_vtts(peci_regs, HOVTTS0P95V); peci_it8xxx2_init_vtts(peci_regs, HOVTTS0P95V);

View file

@ -5,10 +5,11 @@ description: ITE it8xxx2 PECI
compatible: "ite,peci-it8xxx2" compatible: "ite,peci-it8xxx2"
include: peci.yaml include: [peci.yaml, pinctrl-device.yaml]
properties: properties:
pinctrl-0: pinctrl-0:
type: phandles required: true
required: true
description: Configuration of the PECI pin which is mapped to the GPIO pinctrl-names:
required: true

View file

@ -24,11 +24,6 @@
pinctrls = <&pinmuxm 5 IT8XXX2_PINMUX_FUNC_1>; pinctrls = <&pinmuxm 5 IT8XXX2_PINMUX_FUNC_1>;
}; };
/* PECI alternate function */
pinctrl_peci: peci {
pinctrls = <&pinmuxf 6 IT8XXX2_PINMUX_FUNC_3>;
};
/* Keyboard alternate function */ /* Keyboard alternate function */
pinctrl_kso16: kso16 { pinctrl_kso16: kso16 {
pinctrls = <&pinmuxc 3 IT8XXX2_PINMUX_FUNC_1>; pinctrls = <&pinmuxc 3 IT8XXX2_PINMUX_FUNC_1>;

View file

@ -1398,7 +1398,7 @@
#size-cells = <0>; #size-cells = <0>;
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
interrupts = <160 IRQ_TYPE_LEVEL_HIGH>; interrupts = <160 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&pinctrl_peci>; status = "disabled";
}; };
kscan0: kscan@f01d00 { kscan0: kscan@f01d00 {

View file

@ -89,6 +89,11 @@
pinmuxs = <&pinctrla 5 IT8XXX2_ALT_FUNC_3>; pinmuxs = <&pinctrla 5 IT8XXX2_ALT_FUNC_3>;
}; };
/* PECI alternate function */
peci_gpf6_default: peci_gpf6_default {
pinmuxs = <&pinctrlf 6 IT8XXX2_ALT_FUNC_3>;
};
/* PWM alternate function */ /* PWM alternate function */
pwm0_gpa0_default: pwm0_gpa0_default { pwm0_gpa0_default: pwm0_gpa0_default {
pinmuxs = <&pinctrla 0 IT8XXX2_ALT_FUNC_1>; pinmuxs = <&pinctrla 0 IT8XXX2_ALT_FUNC_1>;