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arc: enable gen_isr_tables mechanism

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Change-Id: I5897e110f554377796bfe38dd5c0f8652c29e5be
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2017-02-13 09:36:32 -08:00
commit 35fcb2736c
10 changed files with 56 additions and 212 deletions
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27
include/arch/arc/v2/linker.ld
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@ -57,6 +57,8 @@ MEMORY {
#ifdef DCCM_START
DCCM (rw) : ORIGIN = DCCM_START, LENGTH = DCCM_SIZE*1k
#endif
/* Used by and documented in include/linker/intlist.ld */
IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
}
SECTIONS {
@ -72,25 +74,9 @@ SECTIONS {
KEEP(*(".exc_vector_table.*"))
KEEP(*(IRQ_VECTOR_TABLE))
KEEP(*(.isr_irq*))
/*
* The following sections maps the location of the different
* rows for the _sw_isr_table. Each row maps to an IRQ entry
* (handler, argument).
*
* In ARC architecture, IRQ 0-15 are reserved for the system
* and are not * assignable by the user, for that reason the
* linker sections start on IRQ 16
*/
/* sections for IRQ16-19 */
KEEP(*(SORT(.gnu.linkonce.isr_irq[1][6-9])))
/* sections for IRQ20-99 */
KEEP(*(SORT(.gnu.linkonce.isr_irq[2-9][0-9])))
/* sections for IRQ100-999 */
KEEP(*(SORT(.gnu.linkonce.isr_irq[1-9][0-9][0-9])))
#ifdef CONFIG_GEN_SW_ISR_TABLE
KEEP(*(SW_ISR_TABLE))
#endif
*(.text)
*(".text.*")
*(.gnu.linkonce.t.*)
@ -189,4 +175,7 @@ SECTIONS {
#include <custom-sections.ld>
#endif
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
}