arch: arm: timer: mask interrupt in ISR
As timer interrupt is level triggered, we need to mask it before leaving ISR or it will be delivered again. Also, Xen automatically masks timer interrupt when it injects IRQ to a guest, so we need to unmask it again, when setting new timeout. Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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2 changed files with 26 additions and 2 deletions
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@ -36,6 +36,9 @@ static void arm_arch_timer_compare_isr(const void *arg)
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next_cycle += CYC_PER_TICK;
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}
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arm_arch_timer_set_compare(next_cycle);
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arm_arch_timer_set_irq_mask(false);
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} else {
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arm_arch_timer_set_irq_mask(true);
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}
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k_spin_unlock(&lock, key);
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@ -52,6 +55,7 @@ int z_clock_driver_init(const struct device *device)
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arm_arch_timer_set_compare(arm_arch_timer_count() + CYC_PER_TICK);
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arm_arch_timer_enable(true);
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irq_enable(ARM_ARCH_TIMER_IRQ);
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arm_arch_timer_set_irq_mask(false);
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return 0;
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}
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@ -83,6 +87,7 @@ void z_clock_set_timeout(int32_t ticks, bool idle)
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}
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arm_arch_timer_set_compare(req_cycle + last_cycle);
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arm_arch_timer_set_irq_mask(false);
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k_spin_unlock(&lock, key);
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#endif
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