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dts: stm32: uart nodes were missing yaml description

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This commit fixes uart only nodes situation for stm32 devices.
st,stm32-uart yaml description is added to enable compilation

Change-Id: Iea78693bdfb90fbb09612b75685ed7ca0ccca6d6
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2017-05-18 16:08:30 +02:00 • committed by Anas Nashif
commit 3591cff67b
5 changed files with 67 additions and 31 deletions
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20
dts/arm/disco_l475_iot1.fixup
View file

@ -24,14 +24,14 @@
#define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL
#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS #define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_UART_40004C00_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED #define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_UART_40004C00_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY #define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_UART_40004C00_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_4_NAME ST_STM32_USART_40004C00_LABEL #define CONFIG_UART_STM32_PORT_4_NAME ST_STM32_UART_40004C00_LABEL
#define PORT_4_IRQ ST_STM32_USART_40004C00_IRQ_0 #define PORT_4_IRQ ST_STM32_UART_40004C00_IRQ_0
#define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS #define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_UART_40005000_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_USART_40005000_CURRENT_SPEED #define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_UART_40005000_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_USART_40005000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_UART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_5_NAME ST_STM32_USART_40005000_LABEL #define CONFIG_UART_STM32_PORT_5_NAME ST_STM32_UART_40005000_LABEL
#define PORT_5_IRQ ST_STM32_USART_40005000_IRQ_0 #define PORT_5_IRQ ST_STM32_UART_40005000_IRQ_0

10
dts/arm/nucleo_l432kc.fixup
View file

@ -24,8 +24,8 @@
#define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL
#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS #define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_UART_40004C00_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED #define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_UART_40004C00_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY #define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_UART_40004C00_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_4_NAME ST_STM32_USART_40004C00_LABEL #define CONFIG_UART_STM32_PORT_4_NAME ST_STM32_UART_40004C00_LABEL
#define PORT_4_IRQ ST_STM32_USART_40004C00_IRQ_0 #define PORT_4_IRQ ST_STM32_UART_40004C00_IRQ_0

12
dts/arm/st/stm32f4.dtsi
View file

@ -42,7 +42,7 @@
}; };
uart4: uart@40004c00 { uart4: uart@40004c00 {
compatible = "st,stm32-usart", "st,stm32-uart"; compatible ="st,stm32-uart";
reg = <0x40004c00 0x400>; reg = <0x40004c00 0x400>;
interrupts = <52 0>; interrupts = <52 0>;
status = "disabled"; status = "disabled";
@ -50,7 +50,7 @@
}; };
uart5: uart@40005000 { uart5: uart@40005000 {
compatible = "st,stm32-usart", "st,stm32-uart"; compatible = "st,stm32-uart";
reg = <0x40005000 0x400>; reg = <0x40005000 0x400>;
interrupts = <53 0>; interrupts = <53 0>;
status = "disabled"; status = "disabled";
@ -66,7 +66,7 @@
}; };
uart7: uart@40007800 { uart7: uart@40007800 {
compatible = "st,stm32-usart", "st,stm32-uart"; compatible = "st,stm32-uart";
reg = <0x40007800 0x400>; reg = <0x40007800 0x400>;
interrupts = <82 0>; interrupts = <82 0>;
status = "disabled"; status = "disabled";
@ -74,7 +74,7 @@
}; };
uart8: uart@40007c00 { uart8: uart@40007c00 {
compatible = "st,stm32-usart", "st,stm32-uart"; compatible = "st,stm32-uart";
reg = <0x40007c00 0x400>; reg = <0x40007c00 0x400>;
interrupts = <83 0>; interrupts = <83 0>;
status = "disabled"; status = "disabled";
@ -82,7 +82,7 @@
}; };
uart9: uart@40011800 { uart9: uart@40011800 {
compatible = "st,stm32-usart", "st,stm32-uart"; compatible = "st,stm32-uart";
reg = <0x40011800 0x400>; reg = <0x40011800 0x400>;
interrupts = <88 0>; interrupts = <88 0>;
status = "disabled"; status = "disabled";
@ -90,7 +90,7 @@
}; };
uart10: uart@40011c00 { uart10: uart@40011c00 {
compatible = "st,stm32-usart", "st,stm32-uart"; compatible = "st,stm32-uart";
reg = <0x40011c00 0x400>; reg = <0x40011c00 0x400>;
interrupts = <89 0>; interrupts = <89 0>;
status = "disabled"; status = "disabled";

20
dts/arm/stm32l496g_disco.fixup
View file

@ -24,14 +24,14 @@
#define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL
#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS #define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_UART_40004C00_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED #define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_UART_40004C00_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY #define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_UART_40004C00_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_4_NAME ST_STM32_USART_40004C00_LABEL #define CONFIG_UART_STM32_PORT_4_NAME ST_STM32_UART_40004C00_LABEL
#define PORT_4_IRQ ST_STM32_USART_40004C00_IRQ_0 #define PORT_4_IRQ ST_STM32_UART_40004C00_IRQ_0
#define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS #define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_UART_40005000_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_USART_40005000_CURRENT_SPEED #define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_UART_40005000_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_USART_40005000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_UART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_5_NAME ST_STM32_USART_40005000_LABEL #define CONFIG_UART_STM32_PORT_5_NAME ST_STM32_UART_40005000_LABEL
#define PORT_5_IRQ ST_STM32_USART_40005000_IRQ_0 #define PORT_5_IRQ ST_STM32_UART_40005000_IRQ_0

36
dts/arm/yaml/st,stm32-uart.yaml Normal file
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@ -0,0 +1,36 @@
---
title: STM32 UART
id: st,stm32-uart
version: 0.1
description: >
This binding gives a base representation of the STM32 UART
inherits:
- !include uart.yaml
properties:
- compatible:
type: string
category: required
description: compatible strings
constraint: "st,stm32-uart"
- reg:
type: array
description: mmio register space
generation: define
category: required
- interrupts:
type: array
category: required
description: required interrupts
generation: define
- clocks:
type: array
category: required
description: Clock gate control information
generation: define
...