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boards: acrn: acrn: Update HID of PCIe for ADL board

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Updated HID of PCIe for ACRN ADL board in dts file

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
This commit is contained in:
Anisetti Avinash Krishna 2025-04-29 10:21:00 +05:30 • committed by Benjamin Cabé
commit 358df9970c
1 changed files with 46 additions and 1 deletions
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47
boards/acrn/acrn/acrn_adl_crb.dts
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@ -4,4 +4,49 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "acrn.dts"
/dts-v1/;
#include <mem.h>
#define DT_DRAM_SIZE DT_SIZE_K(8192)
#define DT_DRAM_BASE 0
#include <intel/atom.dtsi>
/ {
model = "ACRN";
compatible = "acrn";
aliases {
uart-0 = &uart0;
uart-1 = &uart1;
};
chosen {
zephyr,sram = &dram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};
pcie0: pcie0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "pcie-controller";
acpi-hid = "PNP0A03";
ranges;
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
};
&uart1 {
status = "okay";
current-speed = <115200>;
};
&cpu {
compatible = "intel,x86_64";
};