diff --git a/arch/Kconfig b/arch/Kconfig index bf10957ede5..c260d3a8d0e 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -32,11 +32,23 @@ config ARM select HAS_DTS # FIXME: current state of the code for all ARM requires this, but # is really only necessary for Cortex-M with ARM MPU! - select GEN_PRIV_STACKS if !ARM64 - select ARCH_HAS_THREAD_LOCAL_STORAGE if ARM64 || CPU_CORTEX_R || CPU_CORTEX_M + select GEN_PRIV_STACKS + select ARCH_HAS_THREAD_LOCAL_STORAGE if CPU_CORTEX_R || CPU_CORTEX_M help ARM architecture +config ARM64 + bool + select ARCH_IS_SET + select 64BIT + select HAS_DTS + select HAS_ARM_SMCCC + select ARCH_HAS_THREAD_LOCAL_STORAGE + select USE_SWITCH + select USE_SWITCH_SUPPORTED + help + ARM64 (AArch64) architecture + config SPARC bool select ARCH_IS_SET @@ -162,14 +174,14 @@ config SRAM_BASE_ADDRESS /chosen/zephyr,sram in devicetree. The user should generally avoid changing it via menuconfig or in configuration files. -if ARC || ARM || NIOS2 || X86 +if ARC || ARM || ARM64 || NIOS2 || X86 # Workaround for not being able to have commas in macro arguments DT_CHOSEN_Z_FLASH := zephyr,flash config FLASH_SIZE int "Flash Size in kB" - default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) if (XIP && ARM) || !ARM + default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) if (XIP && (ARM ||ARM64)) || !ARM help This option specifies the size of the flash in kB. It is normally set by the board's defconfig file and the user should generally avoid modifying @@ -177,13 +189,13 @@ config FLASH_SIZE config FLASH_BASE_ADDRESS hex "Flash Base Address" - default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) if (XIP && ARM) || !ARM + default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) if (XIP && (ARM || ARM64)) || !ARM help This option specifies the base address of the flash on the board. It is normally set by the board's defconfig file and the user should generally avoid modifying it via the menu configuration. -endif # ARM || ARC || NIOS2 || X86 +endif # ARM || ARM64 || ARC || NIOS2 || X86 if ARCH_HAS_TRUSTED_EXECUTION diff --git a/arch/arm/CMakeLists.txt b/arch/arm/CMakeLists.txt index cf70553507e..14c831b9120 100644 --- a/arch/arm/CMakeLists.txt +++ b/arch/arm/CMakeLists.txt @@ -1,11 +1,5 @@ # SPDX-License-Identifier: Apache-2.0 -if(CONFIG_ARM64) - set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf64-littleaarch64) +set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm) - add_subdirectory(core/aarch64) -else() - set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm) - - add_subdirectory(core/aarch32) -endif() +add_subdirectory(core/aarch32) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cfd2a8bf607..f991e8a1fe9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -9,10 +9,6 @@ menu "ARM Options" config ARCH default "arm" -config ARM64 - bool - select 64BIT - config CPU_CORTEX bool help @@ -38,18 +34,6 @@ config ARM_CUSTOM_INTERRUPT_CONTROLLER family cores. The Cortex-M family cores are always equipped with the ARM Nested Vectored Interrupt Controller (NVIC). -config HAS_ARM_SMCCC - bool - help - Include support for the Secure Monitor Call (SMC) and Hypervisor - Call (HVC) instructions on Armv7 and above architectures. - -if !ARM64 rsource "core/aarch32/Kconfig" -endif - -if ARM64 -rsource "core/aarch64/Kconfig" -endif endmenu diff --git a/arch/arm/core/offsets/offsets.c b/arch/arm/core/offsets/offsets.c index a859cc7d04f..1ac6d49748b 100644 --- a/arch/arm/core/offsets/offsets.c +++ b/arch/arm/core/offsets/offsets.c @@ -6,10 +6,6 @@ #include -#if defined(CONFIG_ARM64) -#include "offsets_aarch64.c" -#else #include "offsets_aarch32.c" -#endif GEN_ABS_SYM_END diff --git a/arch/arm/include/kernel_arch_data.h b/arch/arm/include/kernel_arch_data.h index d9aa83d8f13..af22d2d6976 100644 --- a/arch/arm/include/kernel_arch_data.h +++ b/arch/arm/include/kernel_arch_data.h @@ -30,8 +30,6 @@ #elif defined(CONFIG_CPU_CORTEX_R) #include #include -#elif defined(CONFIG_CPU_CORTEX_A) -#include #endif #ifndef _ASMLANGUAGE diff --git a/arch/arm/include/kernel_arch_func.h b/arch/arm/include/kernel_arch_func.h index cad5b58e404..b680da356f8 100644 --- a/arch/arm/include/kernel_arch_func.h +++ b/arch/arm/include/kernel_arch_func.h @@ -7,10 +7,6 @@ #ifndef ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_FUNC_H_ #define ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_FUNC_H_ -#if defined(CONFIG_ARM64) -#include -#else #include -#endif #endif /* ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_FUNC_H_ */ diff --git a/arch/arm/include/offsets_short_arch.h b/arch/arm/include/offsets_short_arch.h index 355e28cf1f2..f09f24a72f6 100644 --- a/arch/arm/include/offsets_short_arch.h +++ b/arch/arm/include/offsets_short_arch.h @@ -7,10 +7,6 @@ #ifndef ZEPHYR_ARCH_ARM_INCLUDE_OFFSETS_SHORT_ARCH_H_ #define ZEPHYR_ARCH_ARM_INCLUDE_OFFSETS_SHORT_ARCH_H_ -#if defined(CONFIG_ARM64) -#include -#else #include -#endif #endif /* ZEPHYR_ARCH_ARM_INCLUDE_OFFSETS_SHORT_ARCH_H_ */ diff --git a/arch/arm64/CMakeLists.txt b/arch/arm64/CMakeLists.txt new file mode 100644 index 00000000000..020554da9b2 --- /dev/null +++ b/arch/arm64/CMakeLists.txt @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: Apache-2.0 + +set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf64-littleaarch64) + +add_subdirectory(core) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig new file mode 100644 index 00000000000..580196c633a --- /dev/null +++ b/arch/arm64/Kconfig @@ -0,0 +1,34 @@ +# ARM64 architecture configuration options + +# Copyright (c) 2014-2015 Wind River Systems, Inc. +# SPDX-License-Identifier: Apache-2.0 + +menu "ARM64 Options" + depends on ARM64 + +config ARCH + default "arm64" + +config CPU_CORTEX + bool + help + This option signifies the use of a CPU of the Cortex family. + +config ARM_CUSTOM_INTERRUPT_CONTROLLER + bool + help + This option indicates that the ARM CPU is connected to a custom (i.e. + non-GIC) interrupt controller. + + A number of Cortex-A and Cortex-R cores (Cortex-A5, Cortex-R4/5, ...) + allow interfacing to a custom external interrupt controller and this + option must be selected when such cores are connected to an interrupt + controller that is not the ARM Generic Interrupt Controller (GIC). + + When this option is selected, the architecture interrupt control + functions are mapped to the SoC interrupt control interface, which is + implemented at the SoC level. + +rsource "core/Kconfig" + +endmenu diff --git a/arch/arm/core/aarch64/CMakeLists.txt b/arch/arm64/core/CMakeLists.txt similarity index 93% rename from arch/arm/core/aarch64/CMakeLists.txt rename to arch/arm64/core/CMakeLists.txt index 7bedf7a663d..0993a520e05 100644 --- a/arch/arm/core/aarch64/CMakeLists.txt +++ b/arch/arm64/core/CMakeLists.txt @@ -23,7 +23,7 @@ zephyr_library_sources( zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S) zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S) zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c) -zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE ../common/tls.c) +zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c) zephyr_library_sources_ifdef(CONFIG_HAS_ARM_SMCCC smccc-call.S) zephyr_library_sources_ifdef(CONFIG_AARCH64_IMAGE_HEADER header.S) diff --git a/arch/arm/core/aarch64/Kconfig b/arch/arm64/core/Kconfig similarity index 96% rename from arch/arm/core/aarch64/Kconfig rename to arch/arm64/core/Kconfig index 9fb2fd890b9..fd632d20ea8 100644 --- a/arch/arm/core/aarch64/Kconfig +++ b/arch/arm64/core/Kconfig @@ -7,9 +7,6 @@ config CPU_CORTEX_A bool select CPU_CORTEX select HAS_FLASH_LOAD_OFFSET - select USE_SWITCH - select USE_SWITCH_SUPPORTED - select HAS_ARM_SMCCC select SCHED_IPI_SUPPORTED if SMP help This option signifies the use of a CPU of the Cortex-A family. @@ -28,6 +25,12 @@ config CPU_CORTEX_A72 help This option signifies the use of a Cortex-A72 CPU +config HAS_ARM_SMCCC + bool + help + Include support for the Secure Monitor Call (SMC) and Hypervisor + Call (HVC) instructions on Armv7 and above architectures. + config NUM_IRQS int diff --git a/arch/arm/core/aarch64/cache.S b/arch/arm64/core/cache.S similarity index 100% rename from arch/arm/core/aarch64/cache.S rename to arch/arm64/core/cache.S diff --git a/arch/arm/core/aarch64/cache.c b/arch/arm64/core/cache.c similarity index 100% rename from arch/arm/core/aarch64/cache.c rename to arch/arm64/core/cache.c diff --git a/arch/arm/core/aarch64/cpu_idle.S b/arch/arm64/core/cpu_idle.S similarity index 100% rename from arch/arm/core/aarch64/cpu_idle.S rename to arch/arm64/core/cpu_idle.S diff --git a/arch/arm/core/aarch64/fatal.c b/arch/arm64/core/fatal.c similarity index 100% rename from arch/arm/core/aarch64/fatal.c rename to arch/arm64/core/fatal.c diff --git a/arch/arm/core/aarch64/header.S b/arch/arm64/core/header.S similarity index 100% rename from arch/arm/core/aarch64/header.S rename to arch/arm64/core/header.S diff --git a/arch/arm/core/aarch64/irq_init.c b/arch/arm64/core/irq_init.c similarity index 100% rename from arch/arm/core/aarch64/irq_init.c rename to arch/arm64/core/irq_init.c diff --git a/arch/arm/core/aarch64/irq_manage.c b/arch/arm64/core/irq_manage.c similarity index 97% rename from arch/arm/core/aarch64/irq_manage.c rename to arch/arm64/core/irq_manage.c index 32136c19722..35692702423 100644 --- a/arch/arm/core/aarch64/irq_manage.c +++ b/arch/arm64/core/irq_manage.c @@ -29,7 +29,7 @@ void z_arm64_fatal_error(unsigned int reason, z_arch_esf_t *esf); * When a custom interrupt controller is used (i.e. * CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER is enabled), the architecture * interrupt control functions are mapped to the SoC layer in - * `include/arch/arm/aarch64/irq.h`. + * `include/arch/arm64/irq.h`. */ void arch_irq_enable(unsigned int irq) diff --git a/arch/arm/core/aarch64/irq_offload.c b/arch/arm64/core/irq_offload.c similarity index 96% rename from arch/arm/core/aarch64/irq_offload.c rename to arch/arm64/core/irq_offload.c index 1a6b6e2c3dd..69dcf280df7 100644 --- a/arch/arm/core/aarch64/irq_offload.c +++ b/arch/arm64/core/irq_offload.c @@ -11,7 +11,7 @@ #include #include -#include +#include volatile irq_offload_routine_t offload_routine; static const void *offload_param; diff --git a/arch/arm/core/aarch64/isr_wrapper.S b/arch/arm64/core/isr_wrapper.S similarity index 100% rename from arch/arm/core/aarch64/isr_wrapper.S rename to arch/arm64/core/isr_wrapper.S diff --git a/arch/arm/core/aarch64/macro_priv.inc b/arch/arm64/core/macro_priv.inc similarity index 100% rename from arch/arm/core/aarch64/macro_priv.inc rename to arch/arm64/core/macro_priv.inc diff --git a/arch/arm/core/aarch64/mmu/CMakeLists.txt b/arch/arm64/core/mmu/CMakeLists.txt similarity index 100% rename from arch/arm/core/aarch64/mmu/CMakeLists.txt rename to arch/arm64/core/mmu/CMakeLists.txt diff --git a/arch/arm/core/aarch64/mmu/arm_mmu.c b/arch/arm64/core/mmu/arm_mmu.c similarity index 99% rename from arch/arm/core/aarch64/mmu/arm_mmu.c rename to arch/arm64/core/mmu/arm_mmu.c index a02cdd4ca8f..da5797b1ad4 100644 --- a/arch/arm/core/aarch64/mmu/arm_mmu.c +++ b/arch/arm64/core/mmu/arm_mmu.c @@ -14,9 +14,9 @@ #include #include #include -#include -#include -#include +#include +#include +#include #include #include #include diff --git a/arch/arm/core/aarch64/mmu/arm_mmu.h b/arch/arm64/core/mmu/arm_mmu.h similarity index 100% rename from arch/arm/core/aarch64/mmu/arm_mmu.h rename to arch/arm64/core/mmu/arm_mmu.h diff --git a/arch/arm/core/aarch64/mmu/low_level.S b/arch/arm64/core/mmu/low_level.S similarity index 100% rename from arch/arm/core/aarch64/mmu/low_level.S rename to arch/arm64/core/mmu/low_level.S diff --git a/arch/arm/core/offsets/offsets_aarch64.c b/arch/arm64/core/offsets/offsets.c similarity index 96% rename from arch/arm/core/offsets/offsets_aarch64.c rename to arch/arm64/core/offsets/offsets.c index 5e17743b932..289b63aa596 100644 --- a/arch/arm/core/offsets/offsets_aarch64.c +++ b/arch/arm64/core/offsets/offsets.c @@ -25,6 +25,7 @@ #ifndef _ARM_OFFSETS_INC_ #define _ARM_OFFSETS_INC_ +#include #include #include #include @@ -61,7 +62,7 @@ GEN_ABSOLUTE_SYM(___esf_t_SIZEOF, sizeof(_esf_t)); #ifdef CONFIG_HAS_ARM_SMCCC -#include +#include GEN_NAMED_OFFSET_SYM(arm_smccc_res_t, a0, a0_a1); GEN_NAMED_OFFSET_SYM(arm_smccc_res_t, a2, a2_a3); @@ -70,4 +71,6 @@ GEN_NAMED_OFFSET_SYM(arm_smccc_res_t, a6, a6_a7); #endif /* CONFIG_HAS_ARM_SMCCC */ +GEN_ABS_SYM_END + #endif /* _ARM_OFFSETS_INC_ */ diff --git a/arch/arm/core/aarch64/prep_c.c b/arch/arm64/core/prep_c.c similarity index 100% rename from arch/arm/core/aarch64/prep_c.c rename to arch/arm64/core/prep_c.c diff --git a/arch/arm/core/aarch64/reset.S b/arch/arm64/core/reset.S similarity index 100% rename from arch/arm/core/aarch64/reset.S rename to arch/arm64/core/reset.S diff --git a/arch/arm/core/aarch64/reset.c b/arch/arm64/core/reset.c similarity index 100% rename from arch/arm/core/aarch64/reset.c rename to arch/arm64/core/reset.c diff --git a/arch/arm/core/aarch64/smccc-call.S b/arch/arm64/core/smccc-call.S similarity index 100% rename from arch/arm/core/aarch64/smccc-call.S rename to arch/arm64/core/smccc-call.S diff --git a/arch/arm/core/aarch64/smp.c b/arch/arm64/core/smp.c similarity index 98% rename from arch/arm/core/aarch64/smp.c rename to arch/arm64/core/smp.c index 70f2c2d34eb..2e6ffd09947 100644 --- a/arch/arm/core/aarch64/smp.c +++ b/arch/arm64/core/smp.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/core/aarch64/switch.S b/arch/arm64/core/switch.S similarity index 100% rename from arch/arm/core/aarch64/switch.S rename to arch/arm64/core/switch.S diff --git a/arch/arm/core/aarch64/thread.c b/arch/arm64/core/thread.c similarity index 100% rename from arch/arm/core/aarch64/thread.c rename to arch/arm64/core/thread.c diff --git a/arch/arm64/core/tls.c b/arch/arm64/core/tls.c new file mode 100644 index 00000000000..ecdb67f7d2a --- /dev/null +++ b/arch/arm64/core/tls.c @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2020 Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include +#include + +size_t arch_tls_stack_setup(struct k_thread *new_thread, char *stack_ptr) +{ + /* + * TLS area for ARM has some data fields following by + * thread data and bss. These fields are supposed to be + * used by toolchain and OS TLS code to aid in locating + * the TLS data/bss. Zephyr currently has no use for + * this so we can simply skip these. However, since GCC + * is generating code assuming these fields are there, + * we simply skip them when setting the TLS pointer. + */ + + /* + * Since we are populating things backwards, + * setup the TLS data/bss area first. + */ + stack_ptr -= z_tls_data_size(); + z_tls_copy(stack_ptr); + + /* Skip two pointers due to toolchain */ + stack_ptr -= sizeof(uintptr_t) * 2; + + /* + * Set thread TLS pointer which is used in + * context switch to point to TLS area. + */ + new_thread->tls = POINTER_TO_UINT(stack_ptr); + + return (z_tls_data_size() + (sizeof(uintptr_t) * 2)); +} diff --git a/arch/arm/core/aarch64/userspace.S b/arch/arm64/core/userspace.S similarity index 100% rename from arch/arm/core/aarch64/userspace.S rename to arch/arm64/core/userspace.S diff --git a/arch/arm/core/aarch64/vector_table.S b/arch/arm64/core/vector_table.S similarity index 100% rename from arch/arm/core/aarch64/vector_table.S rename to arch/arm64/core/vector_table.S diff --git a/arch/arm/core/aarch64/vector_table.h b/arch/arm64/core/vector_table.h similarity index 100% rename from arch/arm/core/aarch64/vector_table.h rename to arch/arm64/core/vector_table.h diff --git a/arch/arm/include/aarch64/exc.h b/arch/arm64/include/exc.h similarity index 100% rename from arch/arm/include/aarch64/exc.h rename to arch/arm64/include/exc.h diff --git a/arch/arm64/include/kernel_arch_data.h b/arch/arm64/include/kernel_arch_data.h new file mode 100644 index 00000000000..0669ef9baaf --- /dev/null +++ b/arch/arm64/include/kernel_arch_data.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2013-2016 Wind River Systems, Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Private kernel definitions (ARM) + * + * This file contains private kernel structures definitions and various + * other definitions for the ARM Cortex-A/R/M processor architecture family. + * + * This file is also included by assembly language files which must #define + * _ASMLANGUAGE before including this header file. Note that kernel + * assembly source files obtains structure offset values via "absolute symbols" + * in the offsets.o module. + */ + +#ifndef ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_DATA_H_ +#define ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_DATA_H_ + +#include +#include +#include + +#include + +#ifndef _ASMLANGUAGE +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct __esf _esf_t; +typedef struct __basic_sf _basic_sf_t; + +#ifdef __cplusplus +} +#endif + +#endif /* _ASMLANGUAGE */ + +#endif /* ZEPHYR_ARCH_ARM_INCLUDE_KERNEL_ARCH_DATA_H_ */ diff --git a/arch/arm/include/aarch64/kernel_arch_func.h b/arch/arm64/include/kernel_arch_func.h similarity index 100% rename from arch/arm/include/aarch64/kernel_arch_func.h rename to arch/arm64/include/kernel_arch_func.h diff --git a/arch/arm/include/aarch64/offsets_short_arch.h b/arch/arm64/include/offsets_short_arch.h similarity index 100% rename from arch/arm/include/aarch64/offsets_short_arch.h rename to arch/arm64/include/offsets_short_arch.h diff --git a/arch/common/CMakeLists.txt b/arch/common/CMakeLists.txt index cc11ed34a52..d220ca6cf71 100644 --- a/arch/common/CMakeLists.txt +++ b/arch/common/CMakeLists.txt @@ -35,7 +35,7 @@ zephyr_linker_sources_ifdef(CONFIG_NOCACHE_MEMORY ) # Only ARM, X86 and OPENISA_RV32M1_RISCV32 use ROM_START_OFFSET. -if (DEFINED CONFIG_ARM OR DEFINED CONFIG_X86 +if (DEFINED CONFIG_ARM OR DEFINED CONFIG_X86 OR DEFINED CONFIG_ARM64 OR DEFINED CONFIG_SOC_OPENISA_RV32M1_RISCV32) zephyr_linker_sources(ROM_START SORT_KEY 0x0 rom_start_offset.ld) endif() diff --git a/boards/arm/bcm958402m2_a72/CMakeLists.txt b/boards/arm64/bcm958402m2_a72/CMakeLists.txt similarity index 100% rename from boards/arm/bcm958402m2_a72/CMakeLists.txt rename to boards/arm64/bcm958402m2_a72/CMakeLists.txt diff --git a/boards/arm/bcm958402m2_a72/Kconfig.board b/boards/arm64/bcm958402m2_a72/Kconfig.board similarity index 100% rename from boards/arm/bcm958402m2_a72/Kconfig.board rename to boards/arm64/bcm958402m2_a72/Kconfig.board diff --git a/boards/arm/bcm958402m2_a72/Kconfig.defconfig b/boards/arm64/bcm958402m2_a72/Kconfig.defconfig similarity index 100% rename from boards/arm/bcm958402m2_a72/Kconfig.defconfig rename to boards/arm64/bcm958402m2_a72/Kconfig.defconfig diff --git a/boards/arm/bcm958402m2_a72/bcm958402m2_a72.dts b/boards/arm64/bcm958402m2_a72/bcm958402m2_a72.dts similarity index 100% rename from boards/arm/bcm958402m2_a72/bcm958402m2_a72.dts rename to boards/arm64/bcm958402m2_a72/bcm958402m2_a72.dts diff --git a/boards/arm/bcm958402m2_a72/bcm958402m2_a72.yaml b/boards/arm64/bcm958402m2_a72/bcm958402m2_a72.yaml similarity index 90% rename from boards/arm/bcm958402m2_a72/bcm958402m2_a72.yaml rename to boards/arm64/bcm958402m2_a72/bcm958402m2_a72.yaml index 7c2b01dbc03..08d49c3cf59 100644 --- a/boards/arm/bcm958402m2_a72/bcm958402m2_a72.yaml +++ b/boards/arm64/bcm958402m2_a72/bcm958402m2_a72.yaml @@ -1,7 +1,7 @@ identifier: bcm958402m2_a72 name: Broadcom BCM958402M2_A72 type: mcu -arch: arm +arch: arm64 toolchain: - zephyr - cross-compile diff --git a/boards/arm/bcm958402m2_a72/bcm958402m2_a72_defconfig b/boards/arm64/bcm958402m2_a72/bcm958402m2_a72_defconfig similarity index 100% rename from boards/arm/bcm958402m2_a72/bcm958402m2_a72_defconfig rename to boards/arm64/bcm958402m2_a72/bcm958402m2_a72_defconfig diff --git a/boards/arm/bcm958402m2_a72/board.cmake b/boards/arm64/bcm958402m2_a72/board.cmake similarity index 100% rename from boards/arm/bcm958402m2_a72/board.cmake rename to boards/arm64/bcm958402m2_a72/board.cmake diff --git a/boards/arm/bcm958402m2_a72/doc/index.rst b/boards/arm64/bcm958402m2_a72/doc/index.rst similarity index 100% rename from boards/arm/bcm958402m2_a72/doc/index.rst rename to boards/arm64/bcm958402m2_a72/doc/index.rst diff --git a/boards/arm/qemu_cortex_a53/Kconfig.board b/boards/arm64/qemu_cortex_a53/Kconfig.board similarity index 100% rename from boards/arm/qemu_cortex_a53/Kconfig.board rename to boards/arm64/qemu_cortex_a53/Kconfig.board diff --git a/boards/arm/qemu_cortex_a53/Kconfig.defconfig b/boards/arm64/qemu_cortex_a53/Kconfig.defconfig similarity index 100% rename from boards/arm/qemu_cortex_a53/Kconfig.defconfig rename to boards/arm64/qemu_cortex_a53/Kconfig.defconfig diff --git a/boards/arm/qemu_cortex_a53/board.cmake b/boards/arm64/qemu_cortex_a53/board.cmake similarity index 100% rename from boards/arm/qemu_cortex_a53/board.cmake rename to boards/arm64/qemu_cortex_a53/board.cmake diff --git a/boards/arm/qemu_cortex_a53/doc/index.rst b/boards/arm64/qemu_cortex_a53/doc/index.rst similarity index 100% rename from boards/arm/qemu_cortex_a53/doc/index.rst rename to boards/arm64/qemu_cortex_a53/doc/index.rst diff --git a/boards/arm/qemu_cortex_a53/doc/qemu_cortex_a53.png b/boards/arm64/qemu_cortex_a53/doc/qemu_cortex_a53.png similarity index 100% rename from boards/arm/qemu_cortex_a53/doc/qemu_cortex_a53.png rename to boards/arm64/qemu_cortex_a53/doc/qemu_cortex_a53.png diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53.dts b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53.dts similarity index 90% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53.dts rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53.dts index d93f42735d2..bbd2c40000c 100644 --- a/boards/arm/qemu_cortex_a53/qemu_cortex_a53.dts +++ b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53.dts @@ -6,7 +6,7 @@ */ /dts-v1/; -#include +#include / { model = "QEMU Cortex-A53"; diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53.yaml b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53.yaml similarity index 94% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53.yaml rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53.yaml index b82675797e1..ee4b31be15e 100644 --- a/boards/arm/qemu_cortex_a53/qemu_cortex_a53.yaml +++ b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53.yaml @@ -2,7 +2,7 @@ identifier: qemu_cortex_a53 name: QEMU Emulation for Cortex-A53 type: qemu simulation: qemu -arch: arm +arch: arm64 toolchain: - zephyr - cross-compile diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_defconfig b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_defconfig similarity index 100% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53_defconfig rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53_defconfig diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_smp.dts b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_smp.dts similarity index 100% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53_smp.dts rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53_smp.dts diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_smp.yaml b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_smp.yaml similarity index 94% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53_smp.yaml rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53_smp.yaml index f6453d6c1a4..de8beaf4909 100644 --- a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_smp.yaml +++ b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_smp.yaml @@ -2,7 +2,7 @@ identifier: qemu_cortex_a53_smp name: QEMU Emulation for Cortex-A53 SMP type: qemu simulation: qemu -arch: arm +arch: arm64 toolchain: - zephyr - cross-compile diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_smp_defconfig b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_smp_defconfig similarity index 100% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53_smp_defconfig rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53_smp_defconfig diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_xip.dts b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_xip.dts similarity index 89% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53_xip.dts rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53_xip.dts index ee7358df6a8..c10358b33ff 100644 --- a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_xip.dts +++ b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_xip.dts @@ -6,7 +6,7 @@ */ /dts-v1/; -#include +#include / { model = "QEMU Cortex-A53"; diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_xip.yaml b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_xip.yaml similarity index 94% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53_xip.yaml rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53_xip.yaml index adb9642d3a5..f30a3b269c8 100644 --- a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_xip.yaml +++ b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_xip.yaml @@ -2,7 +2,7 @@ identifier: qemu_cortex_a53_xip name: QEMU Emulation for Cortex-A53 (XIP) type: qemu simulation: qemu -arch: arm +arch: arm64 toolchain: - zephyr - cross-compile diff --git a/boards/arm/qemu_cortex_a53/qemu_cortex_a53_xip_defconfig b/boards/arm64/qemu_cortex_a53/qemu_cortex_a53_xip_defconfig similarity index 100% rename from boards/arm/qemu_cortex_a53/qemu_cortex_a53_xip_defconfig rename to boards/arm64/qemu_cortex_a53/qemu_cortex_a53_xip_defconfig diff --git a/boards/arm/xenvm/Kconfig.board b/boards/arm64/xenvm/Kconfig.board similarity index 100% rename from boards/arm/xenvm/Kconfig.board rename to boards/arm64/xenvm/Kconfig.board diff --git a/boards/arm/xenvm/Kconfig.defconfig b/boards/arm64/xenvm/Kconfig.defconfig similarity index 100% rename from boards/arm/xenvm/Kconfig.defconfig rename to boards/arm64/xenvm/Kconfig.defconfig diff --git a/boards/arm/xenvm/doc/index.rst b/boards/arm64/xenvm/doc/index.rst similarity index 100% rename from boards/arm/xenvm/doc/index.rst rename to boards/arm64/xenvm/doc/index.rst diff --git a/boards/arm/xenvm/doc/xen_project_logo.png b/boards/arm64/xenvm/doc/xen_project_logo.png similarity index 100% rename from boards/arm/xenvm/doc/xen_project_logo.png rename to boards/arm64/xenvm/doc/xen_project_logo.png diff --git a/boards/arm/xenvm/xenvm.dts b/boards/arm64/xenvm/xenvm.dts similarity index 98% rename from boards/arm/xenvm/xenvm.dts rename to boards/arm64/xenvm/xenvm.dts index 71c8f60d606..c2ebaff21a4 100644 --- a/boards/arm/xenvm/xenvm.dts +++ b/boards/arm64/xenvm/xenvm.dts @@ -14,7 +14,7 @@ /dts-v1/; #include -#include +#include #include / { diff --git a/boards/arm/xenvm/xenvm_defconfig b/boards/arm64/xenvm/xenvm_defconfig similarity index 100% rename from boards/arm/xenvm/xenvm_defconfig rename to boards/arm64/xenvm/xenvm_defconfig diff --git a/cmake/compiler/gcc/target.cmake b/cmake/compiler/gcc/target.cmake index a8005a8deef..0e851a26dfd 100644 --- a/cmake/compiler/gcc/target.cmake +++ b/cmake/compiler/gcc/target.cmake @@ -47,6 +47,8 @@ include(${ZEPHYR_BASE}/cmake/gcc-m-cpu.cmake) if("${ARCH}" STREQUAL "arm") include(${ZEPHYR_BASE}/cmake/compiler/gcc/target_arm.cmake) +elseif("${ARCH}" STREQUAL "arm64") + include(${ZEPHYR_BASE}/cmake/compiler/gcc/target_arm64.cmake) elseif("${ARCH}" STREQUAL "arc") list(APPEND TOOLCHAIN_C_FLAGS -mcpu=${GCC_M_CPU} diff --git a/cmake/compiler/gcc/target_arm.cmake b/cmake/compiler/gcc/target_arm.cmake index 93444482a36..077e16f8177 100644 --- a/cmake/compiler/gcc/target_arm.cmake +++ b/cmake/compiler/gcc/target_arm.cmake @@ -1,43 +1,35 @@ # SPDX-License-Identifier: Apache-2.0 -if(CONFIG_ARM64) - list(APPEND TOOLCHAIN_C_FLAGS -mcpu=${GCC_M_CPU}) - list(APPEND TOOLCHAIN_LD_FLAGS -mcpu=${GCC_M_CPU}) +list(APPEND TOOLCHAIN_C_FLAGS -mcpu=${GCC_M_CPU}) +list(APPEND TOOLCHAIN_LD_FLAGS -mcpu=${GCC_M_CPU}) - list(APPEND TOOLCHAIN_C_FLAGS -mabi=lp64) - list(APPEND TOOLCHAIN_LD_FLAGS -mabi=lp64) +if(CONFIG_COMPILER_ISA_THUMB2) + list(APPEND TOOLCHAIN_C_FLAGS -mthumb) + list(APPEND TOOLCHAIN_LD_FLAGS -mthumb) +endif() + +list(APPEND TOOLCHAIN_C_FLAGS -mabi=aapcs) +list(APPEND TOOLCHAIN_LD_FLAGS -mabi=aapcs) + +# Defines a mapping from GCC_M_CPU to FPU + +if(CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION) + set(PRECISION_TOKEN) else() - list(APPEND TOOLCHAIN_C_FLAGS -mcpu=${GCC_M_CPU}) - list(APPEND TOOLCHAIN_LD_FLAGS -mcpu=${GCC_M_CPU}) + set(PRECISION_TOKEN sp-) +endif() - if(CONFIG_COMPILER_ISA_THUMB2) - list(APPEND TOOLCHAIN_C_FLAGS -mthumb) - list(APPEND TOOLCHAIN_LD_FLAGS -mthumb) - endif() +set(FPU_FOR_cortex-m4 fpv4-${PRECISION_TOKEN}d16) +set(FPU_FOR_cortex-m7 fpv5-${PRECISION_TOKEN}d16) +set(FPU_FOR_cortex-m33 fpv5-${PRECISION_TOKEN}d16) - list(APPEND TOOLCHAIN_C_FLAGS -mabi=aapcs) - list(APPEND TOOLCHAIN_LD_FLAGS -mabi=aapcs) - - # Defines a mapping from GCC_M_CPU to FPU - - if(CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION) - set(PRECISION_TOKEN) - else() - set(PRECISION_TOKEN sp-) - endif() - - set(FPU_FOR_cortex-m4 fpv4-${PRECISION_TOKEN}d16) - set(FPU_FOR_cortex-m7 fpv5-${PRECISION_TOKEN}d16) - set(FPU_FOR_cortex-m33 fpv5-${PRECISION_TOKEN}d16) - - if(CONFIG_FPU) - list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}}) - list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}}) - if (CONFIG_FP_SOFTABI) - list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=softfp) - list(APPEND TOOLCHAIN_LD_FLAGS -mfloat-abi=softfp) - elseif(CONFIG_FP_HARDABI) - list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=hard) - list(APPEND TOOLCHAIN_LD_FLAGS -mfloat-abi=hard) - endif() +if(CONFIG_FPU) + list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}}) + list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}}) + if (CONFIG_FP_SOFTABI) + list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=softfp) + list(APPEND TOOLCHAIN_LD_FLAGS -mfloat-abi=softfp) + elseif(CONFIG_FP_HARDABI) + list(APPEND TOOLCHAIN_C_FLAGS -mfloat-abi=hard) + list(APPEND TOOLCHAIN_LD_FLAGS -mfloat-abi=hard) endif() endif() diff --git a/cmake/compiler/gcc/target_arm64.cmake b/cmake/compiler/gcc/target_arm64.cmake new file mode 100644 index 00000000000..09320b0e1c5 --- /dev/null +++ b/cmake/compiler/gcc/target_arm64.cmake @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 +list(APPEND TOOLCHAIN_C_FLAGS -mcpu=${GCC_M_CPU}) +list(APPEND TOOLCHAIN_LD_FLAGS -mcpu=${GCC_M_CPU}) + +list(APPEND TOOLCHAIN_C_FLAGS -mabi=lp64) +list(APPEND TOOLCHAIN_LD_FLAGS -mabi=lp64) diff --git a/cmake/gcc-m-cpu.cmake b/cmake/gcc-m-cpu.cmake index f5ef7f01911..984ca30ed7a 100644 --- a/cmake/gcc-m-cpu.cmake +++ b/cmake/gcc-m-cpu.cmake @@ -36,12 +36,14 @@ if("${ARCH}" STREQUAL "arm") set(GCC_M_CPU cortex-r5) elseif(CONFIG_CPU_CORTEX_R7) set(GCC_M_CPU cortex-r7) - elseif(CONFIG_CPU_CORTEX_A53) + else() + message(FATAL_ERROR "Expected CONFIG_CPU_CORTEX_x to be defined") + endif() +elseif("${ARCH}" STREQUAL "arm64") + if(CONFIG_CPU_CORTEX_A53) set(GCC_M_CPU cortex-a53) elseif(CONFIG_CPU_CORTEX_A72) set(GCC_M_CPU cortex-a72) - else() - message(FATAL_ERROR "Expected CONFIG_CPU_CORTEX_x to be defined") endif() elseif("${ARCH}" STREQUAL "arc") if(CONFIG_CPU_EM4_FPUS) diff --git a/cmake/toolchain/xtools/target.cmake b/cmake/toolchain/xtools/target.cmake index 034a02d661a..fab28b7463c 100644 --- a/cmake/toolchain/xtools/target.cmake +++ b/cmake/toolchain/xtools/target.cmake @@ -1,10 +1,7 @@ # SPDX-License-Identifier: Apache-2.0 -if(CONFIG_ARM64) - set(CROSS_COMPILE_TARGET_arm aarch64-zephyr-elf) -else() - set(CROSS_COMPILE_TARGET_arm arm-zephyr-eabi) -endif() +set(CROSS_COMPILE_TARGET_arm arm-zephyr-eabi) +set(CROSS_COMPILE_TARGET_arm64 aarch64-zephyr-elf) set(CROSS_COMPILE_TARGET_nios2 nios2-zephyr-elf) set(CROSS_COMPILE_TARGET_riscv riscv64-zephyr-elf) set(CROSS_COMPILE_TARGET_mips mipsel-zephyr-elf) diff --git a/cmake/toolchain/zephyr/0.11/target.cmake b/cmake/toolchain/zephyr/0.11/target.cmake index ee9647001a0..3a95a8e75a9 100644 --- a/cmake/toolchain/zephyr/0.11/target.cmake +++ b/cmake/toolchain/zephyr/0.11/target.cmake @@ -1,10 +1,7 @@ # SPDX-License-Identifier: Apache-2.0 -if(CONFIG_ARM64) - set(CROSS_COMPILE_TARGET_arm aarch64-zephyr-elf) -else() - set(CROSS_COMPILE_TARGET_arm arm-zephyr-eabi) -endif() +set(CROSS_COMPILE_TARGET_arm64 arm-zephyr-eabi) +set(CROSS_COMPILE_TARGET_arm aarch64-zephyr-elf) set(CROSS_COMPILE_TARGET_nios2 nios2-zephyr-elf) set(CROSS_COMPILE_TARGET_riscv riscv64-zephyr-elf) set(CROSS_COMPILE_TARGET_mips mipsel-zephyr-elf) diff --git a/dts/arm/armv8-a.dtsi b/dts/arm64/armv8-a.dtsi similarity index 100% rename from dts/arm/armv8-a.dtsi rename to dts/arm64/armv8-a.dtsi diff --git a/dts/arm64/broadcom/viper-a72.dtsi b/dts/arm64/broadcom/viper-a72.dtsi new file mode 100644 index 00000000000..7335dc56fe3 --- /dev/null +++ b/dts/arm64/broadcom/viper-a72.dtsi @@ -0,0 +1,67 @@ +/* + * Copyright 2020 Broadcom + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include "viper-common.dtsi" + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + label = "arch_timer"; + }; + + soc { + gic: interrupt-controller@42700000 { + compatible = "arm,gic"; + reg = <0x42700000 0x010000>, + <0x42780000 0x600000>; + interrupt-controller; + #interrupt-cells = <4>; + label = "GIC"; + status = "okay"; + }; + }; +}; + +&uart0 { + interrupt-parent = <&gic>; + interrupts = ; +}; + +&uart1 { + interrupt-parent = <&gic>; + interrupts = ; +}; + +&paxdma { + interrupt-parent = <&gic>; + interrupts = ; +}; diff --git a/dts/arm64/broadcom/viper-common.dtsi b/dts/arm64/broadcom/viper-common.dtsi new file mode 100644 index 00000000000..7d9fd0e92fb --- /dev/null +++ b/dts/arm64/broadcom/viper-common.dtsi @@ -0,0 +1,75 @@ +/* + * Copyright 2020 Broadcom + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + sram0: memory@400000 { + device_type = "memory"; + reg = <0x00400000 0x80000>; + }; + + uart0: uart@40020000 { + compatible = "ns16550"; + reg = <0x40020000 0x400>; + clock-frequency = <25000000>; + label = "CRMU_UART"; + status = "disabled"; + }; + + uart1: uart@48100000 { + compatible = "ns16550"; + reg = <0x48100000 0x400>; + clock-frequency = <100000000>; + label = "CCG_UART0"; + status = "disabled"; + }; + + pl330: pl330@48300000 { + compatible = "arm,dma-pl330"; + reg = <0x48300000 0x2000>, + <0x482f005c 0x20>; + reg-names = "pl330_regs", + "control_regs"; + microcode = <0x63b00000 0x1000>; + dma-channels = <8>; + #dma-cells = <1>; + label = "DMA_0"; + }; + }; + + pcie { + #address-cells = <2>; + #size-cells = <2>; + + pcie0_ep: pcie@4e100000 { + compatible = "brcm,iproc-pcie-ep"; + reg = <0x0 0x4e100000 0x0 0x2100>, + <0x0 0x50000000 0x0 0x8000000>, + <0x4 0x0 0x0 0x8000000>; + reg-names = "iproc_pcie_regs", "map_lowmem", + "map_highmem"; + label = "PCIE_0"; + dmas = <&pl330 0>, <&pl330 1>; + dma-names = "txdma", "rxdma"; + }; + + paxdma: paxdma@4e100800 { + compatible = "brcm,iproc-pax-dma-v2"; + label = "DMA_1"; + reg = <0x0 0x4e100800 0x0 0x2100>, + <0x0 0x4f000000 0x0 0x200000>, + <0x0 0x4f200000 0x0 0x10000>; + reg-names = "dme_regs", "rm_ring_regs", + "rm_comm_regs"; + dma-channels = <4>; + #dma-cells = <1>; + bd-memory = <0x63b00000 0x100000>; + scr-addr-loc = <0x200061f0>; + scr-size-loc = <0x200061f8>; + pcie-ep = <&pcie0_ep>; + }; + }; +}; diff --git a/dts/arm/qemu-virt/qemu-virt-a53.dtsi b/dts/arm64/qemu-virt/qemu-virt-a53.dtsi similarity index 98% rename from dts/arm/qemu-virt/qemu-virt-a53.dtsi rename to dts/arm64/qemu-virt/qemu-virt-a53.dtsi index ed392a6b901..b5cbe83bd1f 100644 --- a/dts/arm/qemu-virt/qemu-virt-a53.dtsi +++ b/dts/arm64/qemu-virt/qemu-virt-a53.dtsi @@ -14,7 +14,7 @@ */ #include -#include +#include #include / { diff --git a/include/app_memory/app_memdomain.h b/include/app_memory/app_memdomain.h index 1b55bb2f926..2c3bcfd665a 100644 --- a/include/app_memory/app_memdomain.h +++ b/include/app_memory/app_memdomain.h @@ -77,7 +77,7 @@ struct z_app_region { * specific: "aw" indicates section is allocatable and writable, * and "@progbits" indicates the section has data. */ -#ifdef CONFIG_ARM +#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) /* ARM has a quirk in that '@' denotes a comment, so we have to send * %progbits to the assembler instead. */ diff --git a/include/arch/arch_inlines.h b/include/arch/arch_inlines.h index 45e33254445..f58ffe8e456 100644 --- a/include/arch/arch_inlines.h +++ b/include/arch/arch_inlines.h @@ -15,7 +15,7 @@ #if defined(CONFIG_X86) || defined(CONFIG_X86_64) #include #elif defined(CONFIG_ARM64) -#include +#include #elif defined(CONFIG_ARC) #include #elif defined(CONFIG_XTENSA) diff --git a/include/arch/arm/aarch64/arch.h b/include/arch/arm64/arch.h similarity index 80% rename from include/arch/arm/aarch64/arch.h rename to include/arch/arm64/arch.h index 31def0c2df8..bc8789b3edd 100644 --- a/include/arch/arm/aarch64/arch.h +++ b/include/arch/arm64/arch.h @@ -19,18 +19,18 @@ /* Add include for DTS generated information */ #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include #include #include diff --git a/include/arch/arm/aarch64/arch_inlines.h b/include/arch/arm64/arch_inlines.h similarity index 93% rename from include/arch/arm/aarch64/arch_inlines.h rename to include/arch/arm64/arch_inlines.h index a57af7bdbb3..ef3a4a7a309 100644 --- a/include/arch/arm/aarch64/arch_inlines.h +++ b/include/arch/arm64/arch_inlines.h @@ -11,7 +11,7 @@ #include #include -#include +#include static ALWAYS_INLINE _cpu_t *arch_curr_cpu(void) { diff --git a/include/arch/arm/arm-smccc.h b/include/arch/arm64/arm-smccc.h similarity index 100% rename from include/arch/arm/arm-smccc.h rename to include/arch/arm64/arm-smccc.h diff --git a/include/arch/arm/aarch64/arm_mmu.h b/include/arch/arm64/arm_mmu.h similarity index 100% rename from include/arch/arm/aarch64/arm_mmu.h rename to include/arch/arm64/arm_mmu.h diff --git a/include/arch/arm/aarch64/asm_inline.h b/include/arch/arm64/asm_inline.h similarity index 90% rename from include/arch/arm/aarch64/asm_inline.h rename to include/arch/arm64/asm_inline.h index 6074ee56970..1861113120e 100644 --- a/include/arch/arm/aarch64/asm_inline.h +++ b/include/arch/arm64/asm_inline.h @@ -13,7 +13,7 @@ */ #if defined(__GNUC__) -#include +#include #else #include #endif diff --git a/include/arch/arm/aarch64/asm_inline_gcc.h b/include/arch/arm64/asm_inline_gcc.h similarity index 96% rename from include/arch/arm/aarch64/asm_inline_gcc.h rename to include/arch/arm64/asm_inline_gcc.h index 7d60ee93ce4..0ffd47f6d06 100644 --- a/include/arch/arm/aarch64/asm_inline_gcc.h +++ b/include/arch/arm64/asm_inline_gcc.h @@ -16,7 +16,7 @@ #ifndef _ASMLANGUAGE -#include +#include #include #ifdef __cplusplus diff --git a/include/arch/arm/aarch64/cpu.h b/include/arch/arm64/cpu.h similarity index 100% rename from include/arch/arm/aarch64/cpu.h rename to include/arch/arm64/cpu.h diff --git a/include/arch/arm/aarch64/error.h b/include/arch/arm64/error.h similarity index 91% rename from include/arch/arm/aarch64/error.h rename to include/arch/arm64/error.h index e830e866515..471a45831ee 100644 --- a/include/arch/arm/aarch64/error.h +++ b/include/arch/arm64/error.h @@ -14,8 +14,8 @@ #ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_ERROR_H_ #define ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_ERROR_H_ -#include -#include +#include +#include #include #ifdef __cplusplus diff --git a/include/arch/arm/aarch64/exc.h b/include/arch/arm64/exc.h similarity index 100% rename from include/arch/arm/aarch64/exc.h rename to include/arch/arm64/exc.h diff --git a/include/arch/arm/aarch64/irq.h b/include/arch/arm64/irq.h similarity index 100% rename from include/arch/arm/aarch64/irq.h rename to include/arch/arm64/irq.h diff --git a/include/arch/arm/aarch64/lib_helpers.h b/include/arch/arm64/lib_helpers.h similarity index 99% rename from include/arch/arm/aarch64/lib_helpers.h rename to include/arch/arm64/lib_helpers.h index b314b5dda6a..6c3dc1a9d53 100644 --- a/include/arch/arm/aarch64/lib_helpers.h +++ b/include/arch/arm64/lib_helpers.h @@ -9,7 +9,7 @@ #ifndef _ASMLANGUAGE -#include +#include #include /* All the macros need a memory clobber */ diff --git a/include/arch/arm/aarch64/macro.inc b/include/arch/arm64/macro.inc similarity index 100% rename from include/arch/arm/aarch64/macro.inc rename to include/arch/arm64/macro.inc diff --git a/include/arch/arm/aarch64/misc.h b/include/arch/arm64/misc.h similarity index 100% rename from include/arch/arm/aarch64/misc.h rename to include/arch/arm64/misc.h diff --git a/include/arch/arm/aarch64/scripts/linker.ld b/include/arch/arm64/scripts/linker.ld similarity index 100% rename from include/arch/arm/aarch64/scripts/linker.ld rename to include/arch/arm64/scripts/linker.ld diff --git a/include/arch/arm/aarch64/sys_io.h b/include/arch/arm64/sys_io.h similarity index 100% rename from include/arch/arm/aarch64/sys_io.h rename to include/arch/arm64/sys_io.h diff --git a/include/arch/arm/aarch64/syscall.h b/include/arch/arm64/syscall.h similarity index 99% rename from include/arch/arm/aarch64/syscall.h rename to include/arch/arm64/syscall.h index c008a83207c..176f55dc28f 100644 --- a/include/arch/arm/aarch64/syscall.h +++ b/include/arch/arm64/syscall.h @@ -26,7 +26,7 @@ #include #include -#include +#include #ifdef __cplusplus extern "C" { diff --git a/include/arch/arm/aarch64/thread.h b/include/arch/arm64/thread.h similarity index 100% rename from include/arch/arm/aarch64/thread.h rename to include/arch/arm64/thread.h diff --git a/include/arch/arm/aarch64/thread_stack.h b/include/arch/arm64/thread_stack.h similarity index 100% rename from include/arch/arm/aarch64/thread_stack.h rename to include/arch/arm64/thread_stack.h diff --git a/include/arch/arm/aarch64/timer.h b/include/arch/arm64/timer.h similarity index 100% rename from include/arch/arm/aarch64/timer.h rename to include/arch/arm64/timer.h diff --git a/include/arch/cpu.h b/include/arch/cpu.h index 0ff2e286d85..b5f4daeaaf3 100644 --- a/include/arch/cpu.h +++ b/include/arch/cpu.h @@ -14,7 +14,7 @@ #if defined(CONFIG_X86) #include #elif defined(CONFIG_ARM64) -#include +#include #elif defined(CONFIG_ARM) #include #elif defined(CONFIG_ARC) diff --git a/include/arch/syscall.h b/include/arch/syscall.h index e93e011244e..62166904cdb 100644 --- a/include/arch/syscall.h +++ b/include/arch/syscall.h @@ -16,7 +16,7 @@ #include #endif #elif defined(CONFIG_ARM64) -#include +#include #elif defined(CONFIG_ARM) #include #elif defined(CONFIG_ARC) diff --git a/include/drivers/pm_cpu_ops/psci.h b/include/drivers/pm_cpu_ops/psci.h index 902e9e3713d..9cdfac0137a 100644 --- a/include/drivers/pm_cpu_ops/psci.h +++ b/include/drivers/pm_cpu_ops/psci.h @@ -8,7 +8,7 @@ #define ZEPHYR_INCLUDE_DRIVERS_PM_CPU_OPS_PSCI_H_ #include -#include +#include #include #include diff --git a/include/linker/linker-tool-gcc.h b/include/linker/linker-tool-gcc.h index 67d9c9da3bc..1ea18ad217f 100644 --- a/include/linker/linker-tool-gcc.h +++ b/include/linker/linker-tool-gcc.h @@ -18,16 +18,14 @@ #include #if defined(CONFIG_ARM) - #if defined(CONFIG_ARM64) - #define OUTPUT_FORMAT_ "elf64-littleaarch64" + #if defined(CONFIG_BIG_ENDIAN) + #define OUTPUT_FORMAT_ "elf32-bigarm" #else - #if defined(CONFIG_BIG_ENDIAN) - #define OUTPUT_FORMAT_ "elf32-bigarm" - #else - #define OUTPUT_FORMAT_ "elf32-littlearm" - #endif + #define OUTPUT_FORMAT_ "elf32-littlearm" #endif OUTPUT_FORMAT(OUTPUT_FORMAT_) +#elif defined(CONFIG_ARM64) + OUTPUT_FORMAT("elf64-littleaarch64") #elif defined(CONFIG_ARC) OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc") #elif defined(CONFIG_X86) diff --git a/include/toolchain/common.h b/include/toolchain/common.h index f8cd0e130ba..40b376617db 100644 --- a/include/toolchain/common.h +++ b/include/toolchain/common.h @@ -62,7 +62,7 @@ #define PERFOPT_ALIGN .balign 1 #endif - #elif defined(CONFIG_ARM) + #elif defined(CONFIG_ARM) || defined(CONFIG_ARM64) #define PERFOPT_ALIGN .balign 4 diff --git a/include/toolchain/gcc.h b/include/toolchain/gcc.h index 1482d87f5aa..51205b35cab 100644 --- a/include/toolchain/gcc.h +++ b/include/toolchain/gcc.h @@ -92,7 +92,7 @@ /* The GNU assembler for Cortex-M3 uses # for immediate values, not * comments, so the @nobits# trick does not work. */ -#if defined(CONFIG_ARM) +#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) #define _NODATA_SECTION(segment) __attribute__((section(#segment))) #else #define _NODATA_SECTION(segment) \ @@ -109,7 +109,7 @@ __extension__ ({ \ }) -#if __GNUC__ >= 7 && defined(CONFIG_ARM) +#if __GNUC__ >= 7 && (defined(CONFIG_ARM) || defined(CONFIG_ARM64)) /* Version of UNALIGNED_PUT() which issues a compiler_barrier() after * the store. It is required to workaround an apparent optimization @@ -246,7 +246,7 @@ do { \ #if defined(_ASMLANGUAGE) -#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) +#if defined(CONFIG_ARM) #if defined(CONFIG_ASSEMBLER_ISA_THUMB2) @@ -265,7 +265,7 @@ do { \ #define FUNC_CODE() #define FUNC_INSTR(a) -#endif /* CONFIG_ARM && !CONFIG_ARM64 */ +#endif /* CONFIG_ARM */ #endif /* _ASMLANGUAGE */ @@ -279,7 +279,7 @@ do { \ #if defined(_ASMLANGUAGE) #if defined(CONFIG_ARM) || defined(CONFIG_NIOS2) || defined(CONFIG_RISCV) \ - || defined(CONFIG_XTENSA) + || defined(CONFIG_XTENSA) || defined(CONFIG_ARM64) #define GTEXT(sym) .global sym; .type sym, %function #define GDATA(sym) .global sym; .type sym, %object #define WTEXT(sym) .weak sym; .type sym, %function @@ -372,7 +372,7 @@ do { \ #endif /* _ASMLANGUAGE */ #if defined(_ASMLANGUAGE) -#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) +#if defined(CONFIG_ARM) #if defined(CONFIG_ASSEMBLER_ISA_THUMB2) /* '.syntax unified' is a gcc-ism used in thumb-2 asm files */ #define _ASM_FILE_PROLOGUE .text; .syntax unified; .thumb @@ -381,7 +381,7 @@ do { \ #endif /* CONFIG_ASSEMBLER_ISA_THUMB2 */ #elif defined(CONFIG_ARM64) #define _ASM_FILE_PROLOGUE .text -#endif /* CONFIG_ARM64 || (CONFIG_ARM && !CONFIG_ARM64)*/ +#endif /* CONFIG_ARM64 || CONFIG_ARM */ #endif /* _ASMLANGUAGE */ /* @@ -416,7 +416,7 @@ do { \ * to generate named symbol/value pairs for kconfigs. */ -#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) +#if defined(CONFIG_ARM) /* * GNU/ARM backend does not have a proper operand modifier which does not diff --git a/lib/libc/newlib/libc-hooks.c b/lib/libc/newlib/libc-hooks.c index a620792aab9..987754f8668 100644 --- a/lib/libc/newlib/libc-hooks.c +++ b/lib/libc/newlib/libc-hooks.c @@ -66,7 +66,7 @@ */ struct k_mem_partition z_malloc_partition; - #if defined(CONFIG_ARM) + #if defined(CONFIG_ARM) || defined(CONFIG_ARM64) #define HEAP_BASE ROUND_UP(USED_RAM_END_ADDR, \ CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE) #elif defined(CONFIG_ARC) diff --git a/lib/os/cbprintf_packaged.c b/lib/os/cbprintf_packaged.c index bfd69877d0c..57daa50f79c 100644 --- a/lib/os/cbprintf_packaged.c +++ b/lib/os/cbprintf_packaged.c @@ -30,7 +30,7 @@ static inline bool ptr_in_rodata(const char *addr) #define RO_START 0 #define RO_END 0 #elif defined(CONFIG_ARC) || defined(CONFIG_ARM) || defined(CONFIG_X86) \ - || defined(CONFIG_RISCV) + || defined(CONFIG_RISCV) || defined(CONFIG_ARM64) extern char _image_rodata_start[]; extern char _image_rodata_end[]; #define RO_START _image_rodata_start diff --git a/soc/arm/bcm_vk/viper/CMakeLists.txt b/soc/arm/bcm_vk/viper/CMakeLists.txt index 8b59f41d728..3b465dc7da8 100644 --- a/soc/arm/bcm_vk/viper/CMakeLists.txt +++ b/soc/arm/bcm_vk/viper/CMakeLists.txt @@ -4,6 +4,3 @@ zephyr_include_directories(.) zephyr_sources( soc.c ) -zephyr_sources_ifdef(CONFIG_SOC_BCM58402_A72 plat_core.c) - -zephyr_sources_ifdef(CONFIG_ARM_MMU mmu_regions.c) diff --git a/soc/arm/bcm_vk/viper/Kconfig.soc b/soc/arm/bcm_vk/viper/Kconfig.soc index d7a6d83bb0c..fe7891c0fd3 100644 --- a/soc/arm/bcm_vk/viper/Kconfig.soc +++ b/soc/arm/bcm_vk/viper/Kconfig.soc @@ -12,11 +12,4 @@ config SOC_BCM58402_M7 select CPU_HAS_ARM_MPU select CORTEX_M_SYSTICK -config SOC_BCM58402_A72 - bool "Broadcom BCM58402 A72" - select ARM64 - select CPU_CORTEX_A72 - select ARM_ARCH_TIMER - select GIC_V3 - endchoice diff --git a/soc/arm/bcm_vk/viper/linker.ld b/soc/arm/bcm_vk/viper/linker.ld index e0521394a9d..38419e18f4a 100644 --- a/soc/arm/bcm_vk/viper/linker.ld +++ b/soc/arm/bcm_vk/viper/linker.ld @@ -6,8 +6,4 @@ #include -#if defined(CONFIG_SOC_BCM58402_M7) #include -#elif defined(CONFIG_SOC_BCM58402_A72) -#include -#endif diff --git a/soc/arm/bcm_vk/viper/soc.c b/soc/arm/bcm_vk/viper/soc.c index e798cd60642..ce57fd33d66 100644 --- a/soc/arm/bcm_vk/viper/soc.c +++ b/soc/arm/bcm_vk/viper/soc.c @@ -26,9 +26,7 @@ static int viper_init(const struct device *arg) key = irq_lock(); -#ifdef CONFIG_SOC_BCM58402_M7 NMI_INIT(); -#endif /* pcie pmon lite init */ data = sys_read32(LS_ICFG_PMON_LITE_CLK_CTRL); diff --git a/soc/arm64/CMakeLists.txt b/soc/arm64/CMakeLists.txt new file mode 100644 index 00000000000..b826da926ca --- /dev/null +++ b/soc/arm64/CMakeLists.txt @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(SOC_FAMILY) + add_subdirectory(${SOC_FAMILY}) +else() + add_subdirectory(${SOC_NAME}) +endif() diff --git a/soc/arm64/Kconfig b/soc/arm64/Kconfig new file mode 100644 index 00000000000..a24f8b35034 --- /dev/null +++ b/soc/arm64/Kconfig @@ -0,0 +1,11 @@ +# General options signifying CPU capabilities of ARM64 SoCs + +# Copyright (c) 2018 Nordic Semiconductor ASA. +# SPDX-License-Identifier: Apache-2.0 + +config SOC_PART_NUMBER + string + help + This string holds the full part number of the SoC. It is a hidden option + that you should not set directly. The part number selection choice defines + the default value for this string. diff --git a/soc/arm64/bcm_vk/CMakeLists.txt b/soc/arm64/bcm_vk/CMakeLists.txt new file mode 100644 index 00000000000..226f3bd626f --- /dev/null +++ b/soc/arm64/bcm_vk/CMakeLists.txt @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: Apache-2.0 + +add_subdirectory(${SOC_SERIES}) diff --git a/soc/arm64/bcm_vk/Kconfig b/soc/arm64/bcm_vk/Kconfig new file mode 100644 index 00000000000..04312d5b77d --- /dev/null +++ b/soc/arm64/bcm_vk/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright 2020 Broadcom. +# + +config SOC_FAMILY_BCMVK + bool + +if SOC_FAMILY_BCMVK +config SOC_FAMILY + string + default "bcm_vk" + +source "soc/arm64/bcm_vk/*/Kconfig.soc" + +endif diff --git a/soc/arm64/bcm_vk/Kconfig.defconfig b/soc/arm64/bcm_vk/Kconfig.defconfig new file mode 100644 index 00000000000..b498c95832b --- /dev/null +++ b/soc/arm64/bcm_vk/Kconfig.defconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright 2020 Broadcom. +# + +source "soc/arm64/bcm_vk/*/Kconfig.defconfig.series" diff --git a/soc/arm64/bcm_vk/Kconfig.soc b/soc/arm64/bcm_vk/Kconfig.soc new file mode 100644 index 00000000000..38103238ca7 --- /dev/null +++ b/soc/arm64/bcm_vk/Kconfig.soc @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 +# +# Copyright 2020 Broadcom. +# + +source "soc/arm64/bcm_vk/*/Kconfig.series" diff --git a/soc/arm64/bcm_vk/viper/CMakeLists.txt b/soc/arm64/bcm_vk/viper/CMakeLists.txt new file mode 100644 index 00000000000..8b59f41d728 --- /dev/null +++ b/soc/arm64/bcm_vk/viper/CMakeLists.txt @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(.) +zephyr_sources( + soc.c +) +zephyr_sources_ifdef(CONFIG_SOC_BCM58402_A72 plat_core.c) + +zephyr_sources_ifdef(CONFIG_ARM_MMU mmu_regions.c) diff --git a/soc/arm64/bcm_vk/viper/Kconfig.defconfig.series b/soc/arm64/bcm_vk/viper/Kconfig.defconfig.series new file mode 100644 index 00000000000..831c516416e --- /dev/null +++ b/soc/arm64/bcm_vk/viper/Kconfig.defconfig.series @@ -0,0 +1,11 @@ +# Copyright 2020 Broadcom +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_VIPER + +config SOC_SERIES + default "viper" + +source "soc/arm64/bcm_vk/viper/Kconfig.defconfig.viper*" + +endif # SOC_SERIES_VIPER diff --git a/soc/arm/bcm_vk/viper/Kconfig.defconfig.viper_bcm58402_a72 b/soc/arm64/bcm_vk/viper/Kconfig.defconfig.viper_bcm58402_a72 similarity index 100% rename from soc/arm/bcm_vk/viper/Kconfig.defconfig.viper_bcm58402_a72 rename to soc/arm64/bcm_vk/viper/Kconfig.defconfig.viper_bcm58402_a72 diff --git a/soc/arm64/bcm_vk/viper/Kconfig.series b/soc/arm64/bcm_vk/viper/Kconfig.series new file mode 100644 index 00000000000..a972a7e0d2b --- /dev/null +++ b/soc/arm64/bcm_vk/viper/Kconfig.series @@ -0,0 +1,9 @@ +# Copyright 2020 Broadcom +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_VIPER + bool "Broadcom Viper Series" + select ARM64 + select SOC_FAMILY_BCMVK + help + Enable support for Broadcom Viper Series. diff --git a/soc/arm64/bcm_vk/viper/Kconfig.soc b/soc/arm64/bcm_vk/viper/Kconfig.soc new file mode 100644 index 00000000000..9a7dc23f522 --- /dev/null +++ b/soc/arm64/bcm_vk/viper/Kconfig.soc @@ -0,0 +1,15 @@ +# Copyright 2020 Broadcom +# SPDX-License-Identifier: Apache-2.0 + +choice +prompt "Broadcom Viper SoC" +depends on SOC_SERIES_VIPER + +config SOC_BCM58402_A72 + bool "Broadcom BCM58402 A72" + select ARM64 + select CPU_CORTEX_A72 + select ARM_ARCH_TIMER + select GIC_V3 + +endchoice diff --git a/soc/arm64/bcm_vk/viper/linker.ld b/soc/arm64/bcm_vk/viper/linker.ld new file mode 100644 index 00000000000..ff2c8c214e8 --- /dev/null +++ b/soc/arm64/bcm_vk/viper/linker.ld @@ -0,0 +1,9 @@ +/* + * Copyright 2020 Broadcom + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include diff --git a/soc/arm/bcm_vk/viper/linker_a72.ld b/soc/arm64/bcm_vk/viper/linker_a72.ld similarity index 62% rename from soc/arm/bcm_vk/viper/linker_a72.ld rename to soc/arm64/bcm_vk/viper/linker_a72.ld index 221ac0647bf..3e091aa13c5 100644 --- a/soc/arm/bcm_vk/viper/linker_a72.ld +++ b/soc/arm64/bcm_vk/viper/linker_a72.ld @@ -4,4 +4,4 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include diff --git a/soc/arm/bcm_vk/viper/mmu_regions.c b/soc/arm64/bcm_vk/viper/mmu_regions.c similarity index 95% rename from soc/arm/bcm_vk/viper/mmu_regions.c rename to soc/arm64/bcm_vk/viper/mmu_regions.c index c9a76880e56..6bdc0602d93 100644 --- a/soc/arm/bcm_vk/viper/mmu_regions.c +++ b/soc/arm64/bcm_vk/viper/mmu_regions.c @@ -6,7 +6,7 @@ #include #include #include -#include +#include #define PCIE_OB_HIGHMEM_ADDR DT_REG_ADDR_BY_NAME(DT_NODELABEL(pcie0_ep), \ diff --git a/soc/arm/bcm_vk/viper/plat_core.c b/soc/arm64/bcm_vk/viper/plat_core.c similarity index 100% rename from soc/arm/bcm_vk/viper/plat_core.c rename to soc/arm64/bcm_vk/viper/plat_core.c diff --git a/soc/arm64/bcm_vk/viper/soc.c b/soc/arm64/bcm_vk/viper/soc.c new file mode 100644 index 00000000000..75d929063ce --- /dev/null +++ b/soc/arm64/bcm_vk/viper/soc.c @@ -0,0 +1,43 @@ +/* + * Copyright 2020 Broadcom + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +/** + * @brief Perform basic hardware initialization at boot. + * + * This needs to be run from the very beginning. + * So the init priority has to be 0 (zero). + * + * @return 0 + */ +static int viper_init(const struct device *arg) +{ + uint32_t key; + uint32_t data; + + ARG_UNUSED(arg); + + key = irq_lock(); + + /* pcie pmon lite init */ + data = sys_read32(LS_ICFG_PMON_LITE_CLK_CTRL); + data |= PCIE_PMON_LITE_CLK_ENABLE; + sys_write32(data, LS_ICFG_PMON_LITE_CLK_CTRL); + + data = sys_read32(LS_ICFG_PMON_LITE_SW_RESETN); + data |= PCIE_PMON_LITE_SW_RESETN; + sys_write32(data, LS_ICFG_PMON_LITE_SW_RESETN); + + irq_unlock(key); + + return 0; +} + +SYS_INIT(viper_init, PRE_KERNEL_1, 0); diff --git a/soc/arm64/bcm_vk/viper/soc.h b/soc/arm64/bcm_vk/viper/soc.h new file mode 100644 index 00000000000..5fcbc283083 --- /dev/null +++ b/soc/arm64/bcm_vk/viper/soc.h @@ -0,0 +1,31 @@ +/* + * Copyright 2020 Broadcom + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef SOC_H +#define SOC_H + +#include +#include + +/* Registers block */ +#define CRMU_MCU_EXTRA_EVENT_STATUS 0x40070054 +#define CRMU_MCU_EXTRA_EVENT_CLEAR 0x4007005c +#define CRMU_MCU_EXTRA_EVENT_MASK 0x40070064 +#define PCIE0_PERST_INTR BIT(4) +#define PCIE0_PERST_INB_INTR BIT(6) + +#define PCIE_PERSTB_INTR_CTL_STS 0x400700f0 +#define PCIE0_PERST_FE_INTR BIT(1) +#define PCIE0_PERST_INB_FE_INTR BIT(3) + +#define PMON_LITE_PCIE_BASE 0x48180000 + +#define LS_ICFG_PMON_LITE_CLK_CTRL 0x482f00bc +#define PCIE_PMON_LITE_CLK_ENABLE (BIT(0) | BIT(2)) +#define LS_ICFG_PMON_LITE_SW_RESETN 0x482f0120 +#define PCIE_PMON_LITE_SW_RESETN BIT(0) + +#endif diff --git a/soc/arm/qemu_cortex_a53/CMakeLists.txt b/soc/arm64/qemu_cortex_a53/CMakeLists.txt similarity index 100% rename from soc/arm/qemu_cortex_a53/CMakeLists.txt rename to soc/arm64/qemu_cortex_a53/CMakeLists.txt diff --git a/soc/arm/qemu_cortex_a53/Kconfig.defconfig b/soc/arm64/qemu_cortex_a53/Kconfig.defconfig similarity index 100% rename from soc/arm/qemu_cortex_a53/Kconfig.defconfig rename to soc/arm64/qemu_cortex_a53/Kconfig.defconfig diff --git a/soc/arm/qemu_cortex_a53/Kconfig.soc b/soc/arm64/qemu_cortex_a53/Kconfig.soc similarity index 93% rename from soc/arm/qemu_cortex_a53/Kconfig.soc rename to soc/arm64/qemu_cortex_a53/Kconfig.soc index b55b610a30b..23b6e7481f6 100644 --- a/soc/arm/qemu_cortex_a53/Kconfig.soc +++ b/soc/arm64/qemu_cortex_a53/Kconfig.soc @@ -3,6 +3,6 @@ config SOC_QEMU_CORTEX_A53 bool "QEMU virt platform (cortex-a53)" - select ARM + select ARM64 select CPU_CORTEX_A53 select GIC_V3 diff --git a/soc/arm/qemu_cortex_a53/linker.ld b/soc/arm64/qemu_cortex_a53/linker.ld similarity index 70% rename from soc/arm/qemu_cortex_a53/linker.ld rename to soc/arm64/qemu_cortex_a53/linker.ld index fd1bad9e1d6..bd4eecf0fe8 100644 --- a/soc/arm/qemu_cortex_a53/linker.ld +++ b/soc/arm64/qemu_cortex_a53/linker.ld @@ -5,4 +5,4 @@ * */ -#include +#include diff --git a/soc/arm/qemu_cortex_a53/mmu_regions.c b/soc/arm64/qemu_cortex_a53/mmu_regions.c similarity index 96% rename from soc/arm/qemu_cortex_a53/mmu_regions.c rename to soc/arm64/qemu_cortex_a53/mmu_regions.c index aa531cf5715..d5083890ba0 100644 --- a/soc/arm/qemu_cortex_a53/mmu_regions.c +++ b/soc/arm64/qemu_cortex_a53/mmu_regions.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: Apache-2.0 */ #include -#include +#include #define SZ_1K 1024 diff --git a/soc/arm/qemu_cortex_a53/plat_core.c b/soc/arm64/qemu_cortex_a53/plat_core.c similarity index 100% rename from soc/arm/qemu_cortex_a53/plat_core.c rename to soc/arm64/qemu_cortex_a53/plat_core.c diff --git a/soc/arm/qemu_cortex_a53/soc.h b/soc/arm64/qemu_cortex_a53/soc.h similarity index 100% rename from soc/arm/qemu_cortex_a53/soc.h rename to soc/arm64/qemu_cortex_a53/soc.h diff --git a/soc/arm/xenvm/CMakeLists.txt b/soc/arm64/xenvm/CMakeLists.txt similarity index 100% rename from soc/arm/xenvm/CMakeLists.txt rename to soc/arm64/xenvm/CMakeLists.txt diff --git a/soc/arm/xenvm/Kconfig.defconfig b/soc/arm64/xenvm/Kconfig.defconfig similarity index 100% rename from soc/arm/xenvm/Kconfig.defconfig rename to soc/arm64/xenvm/Kconfig.defconfig diff --git a/soc/arm/xenvm/Kconfig.soc b/soc/arm64/xenvm/Kconfig.soc similarity index 94% rename from soc/arm/xenvm/Kconfig.soc rename to soc/arm64/xenvm/Kconfig.soc index 05e81837503..d6cf5e3b32d 100644 --- a/soc/arm/xenvm/Kconfig.soc +++ b/soc/arm64/xenvm/Kconfig.soc @@ -3,7 +3,6 @@ config SOC_XENVM bool "Xen virtual machine on aarch64" - select ARM select ARM64 select ARM_ARCH_TIMER select GIC_V2 diff --git a/soc/arm/xenvm/linker.ld b/soc/arm64/xenvm/linker.ld similarity index 69% rename from soc/arm/xenvm/linker.ld rename to soc/arm64/xenvm/linker.ld index 2dffeeb65d4..9d9b6be90c0 100644 --- a/soc/arm/xenvm/linker.ld +++ b/soc/arm64/xenvm/linker.ld @@ -5,4 +5,4 @@ */ #include -#include +#include diff --git a/soc/arm/xenvm/mmu_regions.c b/soc/arm64/xenvm/mmu_regions.c similarity index 95% rename from soc/arm/xenvm/mmu_regions.c rename to soc/arm64/xenvm/mmu_regions.c index fb8188f9653..c3818104c16 100644 --- a/soc/arm/xenvm/mmu_regions.c +++ b/soc/arm64/xenvm/mmu_regions.c @@ -5,7 +5,7 @@ */ #include #include -#include +#include static const struct arm_mmu_region mmu_regions[] = { diff --git a/soc/arm/xenvm/soc.h b/soc/arm64/xenvm/soc.h similarity index 100% rename from soc/arm/xenvm/soc.h rename to soc/arm64/xenvm/soc.h diff --git a/subsys/logging/log_core.c b/subsys/logging/log_core.c index 8f2091408e2..dad5507941a 100644 --- a/subsys/logging/log_core.c +++ b/subsys/logging/log_core.c @@ -119,7 +119,7 @@ uint32_t z_log_get_s_mask(const char *str, uint32_t nargs) */ static bool is_rodata(const void *addr) { -#if defined(CONFIG_ARM) || defined(CONFIG_ARC) || defined(CONFIG_X86) +#if defined(CONFIG_ARM) || defined(CONFIG_ARC) || defined(CONFIG_X86) || defined(CONFIG_ARM64) extern const char *_image_rodata_start[]; extern const char *_image_rodata_end[]; #define RO_START _image_rodata_start diff --git a/subsys/testsuite/include/test_asm_inline_gcc.h b/subsys/testsuite/include/test_asm_inline_gcc.h index ff5ca62e5fe..fd3686bec7e 100644 --- a/subsys/testsuite/include/test_asm_inline_gcc.h +++ b/subsys/testsuite/include/test_asm_inline_gcc.h @@ -37,7 +37,7 @@ static inline void timestamp_serialize(void) __ISB(); } #elif defined(CONFIG_CPU_CORTEX_A) -#include +#include static inline void timestamp_serialize(void) { __ISB(); diff --git a/tests/kernel/context/src/main.c b/tests/kernel/context/src/main.c index 725d07a0d72..cd4124fafb4 100644 --- a/tests/kernel/context/src/main.c +++ b/tests/kernel/context/src/main.c @@ -397,15 +397,15 @@ static void _test_kernel_cpu_idle(int atomic) * * @see k_cpu_idle() */ -#ifndef CONFIG_ARM +#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) static void test_kernel_cpu_idle_atomic(void) { - _test_kernel_cpu_idle(1); + ztest_test_skip(); } #else static void test_kernel_cpu_idle_atomic(void) { - ztest_test_skip(); + _test_kernel_cpu_idle(1); } #endif diff --git a/tests/kernel/mem_protect/userspace/src/main.c b/tests/kernel/mem_protect/userspace/src/main.c index cb2b8ddd13d..603d573b29f 100644 --- a/tests/kernel/mem_protect/userspace/src/main.c +++ b/tests/kernel/mem_protect/userspace/src/main.c @@ -22,7 +22,7 @@ #include #endif -#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) +#if defined(CONFIG_ARM) extern void arm_core_mpu_disable(void); #endif @@ -352,7 +352,7 @@ static void test_read_priv_stack(void) s[0] = 0; priv_stack_ptr = (char *)&s[0] - size; -#elif defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_RISCV) +#elif defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_RISCV) || defined(CONFIG_ARM64) /* priv_stack_ptr set by test_main() */ #else #error "Not implemented for this architecture" @@ -376,7 +376,7 @@ static void test_write_priv_stack(void) s[0] = 0; priv_stack_ptr = (char *)&s[0] - size; -#elif defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_RISCV) +#elif defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_RISCV) || defined(CONFIG_ARM64) /* priv_stack_ptr set by test_main() */ #else #error "Not implemented for this architecture" @@ -666,8 +666,7 @@ static void test_init_and_access_other_memdomain(void) spawn_user(&default_bool); } -#if (defined(CONFIG_ARM) || (defined(CONFIG_GEN_PRIV_STACKS) && defined(CONFIG_RISCV)) && \ - !defined(CONFIG_ARM64)) +#if (defined(CONFIG_ARM) || (defined(CONFIG_GEN_PRIV_STACKS) && defined(CONFIG_RISCV))) extern uint8_t *z_priv_stack_find(void *obj); #endif extern k_thread_stack_t ztest_thread_stack[];