arch: common: Delete isr_tables.ld which was a copy of intlist.ld
Refer directly to intlist.ld in zephyr_linker_sources() Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
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2 changed files with 1 additions and 49 deletions
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@ -21,7 +21,7 @@ zephyr_cc_option(-ffunction-sections -fdata-sections)
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zephyr_linker_sources_ifdef(CONFIG_GEN_ISR_TABLES
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SECTIONS
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isr_tables.ld
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${ZEPHYR_BASE}/include/linker/intlist.ld
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)
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zephyr_linker_sources_ifdef(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT
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@ -1,48 +0,0 @@
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/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Copied from linker.ld */
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/* This creates a special section which is not included by the final binary,
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* instead it is consumed by the gen_isr_tables.py script.
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*
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* What we create here is a data structure:
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*
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* struct {
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* u32_t num_vectors; <- typically CONFIG_NUM_IRQS
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* struct _isr_list isrs[]; <- Usually of smaller size than num_vectors
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* }
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*
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* Which indicates the memory address of the number of isrs that were
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* defined, the total number of IRQ lines in the system, followed by
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* an appropriate number of instances of struct _isr_list. See
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* include/sw_isr_table.h
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*
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* You will need to declare a bogus memory region for IDT_LIST. It doesn't
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* matter where this region goes as it is stripped from the final ELF image.
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* The address doesn't even have to be valid on the target. However, it
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* shouldn't overlap any other regions. On most arches the following should be
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* fine:
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*
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* MEMORY {
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* .. other regions ..
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* IDT_LIST : ORIGIN = 0xfffff7ff, LENGTH = 2K
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* }
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*/
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#ifndef LINKER_PASS2
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SECTION_PROLOGUE(.intList,,)
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{
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KEEP(*(.irq_info))
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KEEP(*(.intList))
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} GROUP_LINK_IN(IDT_LIST)
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#else
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/DISCARD/ :
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{
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KEEP(*(.irq_info))
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KEEP(*(.intList))
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}
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#endif
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