drivers: ethernet: Rework mcux driver to use DT_INST_FOREACH
Reworks the mcux ethernet driver to use DT_INST_FOREACH_STATUS_OKAY and eliminate a lot of duplicate code between instance 0 and instance 1. Renames the ERR_MISC interrupt to ERR due to an issue with the underscore in the device tree preprocessor macros. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
parent
393201194e
commit
3498d43784
2 changed files with 158 additions and 302 deletions
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@ -34,8 +34,6 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
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#if defined(CONFIG_PTP_CLOCK_MCUX)
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#if defined(CONFIG_PTP_CLOCK_MCUX)
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#include <ptp_clock.h>
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#include <ptp_clock.h>
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#include <net/gptp.h>
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#include <net/gptp.h>
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#define PTP_INST_NODEID(n) DT_CHILD(DT_DRV_INST(n), ptp)
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#endif
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#endif
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#include "fsl_enet.h"
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#include "fsl_enet.h"
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@ -1139,7 +1137,7 @@ static void eth_mcux_ptp_isr(const struct device *dev)
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#endif
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#endif
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#if DT_INST_IRQ_HAS_NAME(0, common) || DT_INST_IRQ_HAS_NAME(1, common)
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#if DT_INST_IRQ_HAS_NAME(0, common) || DT_INST_IRQ_HAS_NAME(1, common)
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static void eth_mcux_dispacher_isr(const struct device *dev)
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static void eth_mcux_common_isr(const struct device *dev)
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{
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{
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struct eth_context *context = dev->data;
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struct eth_context *context = dev->data;
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uint32_t EIR = ENET_GetInterruptStatus(context->base);
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uint32_t EIR = ENET_GetInterruptStatus(context->base);
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@ -1178,8 +1176,8 @@ static void eth_mcux_tx_isr(const struct device *dev)
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}
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}
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#endif
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#endif
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#if DT_INST_IRQ_HAS_NAME(0, err_misc) || DT_INST_IRQ_HAS_NAME(1, err_misc)
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#if DT_INST_IRQ_HAS_NAME(0, err) || DT_INST_IRQ_HAS_NAME(1, err)
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static void eth_mcux_error_isr(const struct device *dev)
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static void eth_mcux_err_isr(const struct device *dev)
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{
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{
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struct eth_context *context = dev->data;
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struct eth_context *context = dev->data;
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uint32_t pending = ENET_GetInterruptStatus(context->base);
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uint32_t pending = ENET_GetInterruptStatus(context->base);
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@ -1191,329 +1189,187 @@ static void eth_mcux_error_isr(const struct device *dev)
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}
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}
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#endif
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#endif
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#if DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay)
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#if defined(CONFIG_NOCACHE_MEMORY)
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#define NOCACHE __nocache
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#if DT_INST_PROP(0, zephyr_random_mac_address) && \
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#else
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NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(0))
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#define NOCACHE
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#error Conflict between 'local-mac-address' and 'zephyr,random-mac-address'
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#endif
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#endif
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#if !NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(0))
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static void generate_eth0_mac(uint8_t *mac_addr)
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{
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#if DT_INST_PROP(0, zephyr_random_mac_address)
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gen_random_mac(mac_addr,
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FREESCALE_OUI_B0, FREESCALE_OUI_B1, FREESCALE_OUI_B2);
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#else
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/* Generate_unique_mac */
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mac_addr[0] = FREESCALE_OUI_B0;
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mac_addr[1] = FREESCALE_OUI_B1;
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mac_addr[2] = FREESCALE_OUI_B2;
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/* Trivially "hash" up to 128 bits of MCU unique identifier */
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#if defined(CONFIG_SOC_SERIES_IMX_RT)
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#if defined(CONFIG_SOC_SERIES_IMX_RT)
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uint32_t id = OCOTP->CFG1 ^ OCOTP->CFG2;
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#define ETH_MCUX_UNIQUE_ID (OCOTP->CFG1 ^ OCOTP->CFG2)
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#elif defined(CONFIG_SOC_SERIES_KINETIS_K6X)
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#elif defined(CONFIG_SOC_SERIES_KINETIS_K6X)
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uint32_t id = SIM->UIDH ^ SIM->UIDMH ^ SIM->UIDML ^ SIM->UIDL;
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#define ETH_MCUX_UNIQUE_ID (SIM->UIDH ^ SIM->UIDMH ^ SIM->UIDML ^ SIM->UIDL)
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#else
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#else
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#error "Unsupported SOC"
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#error "Unsupported SOC"
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#endif
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#endif
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mac_addr[0] |= 0x02; /* force LAA bit */
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mac_addr[3] = id >> 8;
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#define ETH_MCUX_NONE
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mac_addr[4] = id >> 16;
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mac_addr[5] = id >> 0;
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mac_addr[5] += 0;
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#define ETH_MCUX_IRQ_INIT(n, name) \
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#endif /* zephyr_random_mac_address */
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do { \
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}
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(n, name, irq), \
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#endif
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DT_INST_IRQ_BY_NAME(n, name, priority), \
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eth_mcux_##name##_isr, \
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DEVICE_GET(eth_mcux_##n), \
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0); \
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irq_enable(DT_INST_IRQ_BY_NAME(n, name, irq)); \
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} while (0)
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static void eth0_config_func(void);
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#define ETH_MCUX_IRQ(n, name) \
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COND_CODE_1(DT_INST_IRQ_HAS_NAME(n, name), \
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static struct eth_context eth0_context = {
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(ETH_MCUX_IRQ_INIT(n, name)), \
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.base = (ENET_Type *)DT_INST_REG_ADDR(0),
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(ETH_MCUX_NONE))
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#if defined(CONFIG_NET_POWER_MANAGEMENT)
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.clock_name = DT_INST_CLOCKS_LABEL(0),
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#endif
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.config_func = eth0_config_func,
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.phy_addr = 0U,
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.phy_duplex = kPHY_FullDuplex,
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.phy_speed = kPHY_Speed100M,
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#if NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(0))
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.mac_addr = DT_INST_PROP(0, local_mac_address),
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.generate_mac = NULL,
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#else
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.generate_mac = generate_eth0_mac,
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#endif
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};
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#if defined(CONFIG_HAS_MCUX_CACHE)
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static __nocache enet_rx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
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eth0_rx_buffer_desc[CONFIG_ETH_MCUX_RX_BUFFERS];
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static __nocache enet_tx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
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eth0_tx_buffer_desc[CONFIG_ETH_MCUX_TX_BUFFERS];
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#else
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static enet_rx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
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eth0_rx_buffer_desc[CONFIG_ETH_MCUX_RX_BUFFERS];
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static enet_tx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
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eth0_tx_buffer_desc[CONFIG_ETH_MCUX_TX_BUFFERS];
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#endif
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static uint8_t __aligned(ENET_BUFF_ALIGNMENT)
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eth0_rx_buffer[CONFIG_ETH_MCUX_RX_BUFFERS][ETH_MCUX_BUFFER_SIZE];
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static uint8_t __aligned(ENET_BUFF_ALIGNMENT)
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eth0_tx_buffer[CONFIG_ETH_MCUX_TX_BUFFERS][ETH_MCUX_BUFFER_SIZE];
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#if defined(CONFIG_PTP_CLOCK_MCUX)
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#if defined(CONFIG_PTP_CLOCK_MCUX)
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/*
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#define PTP_INST_NODEID(n) DT_CHILD(DT_DRV_INST(n), ptp)
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* Array to get transmit frame information on completion of frame transmit.
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* This will hold the transmit timestamp.
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*/
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static enet_frame_info_t eth0_tx_frameinfo_array[CONFIG_ETH_MCUX_TX_BUFFERS];
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#endif
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static const enet_buffer_config_t eth0_buffer_config = {
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#define ETH_MCUX_IRQ_PTP_INIT(n) \
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.rxBdNumber = CONFIG_ETH_MCUX_RX_BUFFERS,
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do { \
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.txBdNumber = CONFIG_ETH_MCUX_TX_BUFFERS,
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IRQ_CONNECT(DT_IRQ_BY_NAME(PTP_INST_NODEID(n), ieee1588_tmr, irq), \
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.rxBuffSizeAlign = ETH_MCUX_BUFFER_SIZE,
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DT_IRQ_BY_NAME(PTP_INST_NODEID(n), ieee1588_tmr, priority), \
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.txBuffSizeAlign = ETH_MCUX_BUFFER_SIZE,
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eth_mcux_ptp_isr, \
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.rxBdStartAddrAlign = eth0_rx_buffer_desc,
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DEVICE_GET(eth_mcux_##n), \
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.txBdStartAddrAlign = eth0_tx_buffer_desc,
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0); \
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.rxBufferAlign = eth0_rx_buffer[0],
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irq_enable(DT_IRQ_BY_NAME(PTP_INST_NODEID(n), ieee1588_tmr, irq)); \
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.txBufferAlign = eth0_tx_buffer[0],
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} while (0)
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.rxMaintainEnable = true,
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.txMaintainEnable = true,
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#define ETH_MCUX_IRQ_PTP(n) \
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#if defined(CONFIG_PTP_CLOCK_MCUX)
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COND_CODE_1(DT_NODE_HAS_STATUS(PTP_INST_NODEID(n), okay), \
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.txFrameInfo = eth0_tx_frameinfo_array,
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(ETH_MCUX_IRQ_PTP_INIT(n)), \
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(ETH_MCUX_NONE))
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#define ETH_MCUX_PTP_FRAMEINFO_ARRAY(n) \
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static enet_frame_info_t \
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eth##n##_tx_frameinfo_array[CONFIG_ETH_MCUX_TX_BUFFERS];
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#define ETH_MCUX_PTP_FRAMEINFO(n) \
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.txFrameInfo = eth##n##_tx_frameinfo_array,
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#else
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#else
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#define ETH_MCUX_IRQ_PTP(n)
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#define ETH_MCUX_PTP_FRAMEINFO_ARRAY(n)
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#define ETH_MCUX_PTP_FRAMEINFO(n) \
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.txFrameInfo = NULL,
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.txFrameInfo = NULL,
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#endif
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#endif
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};
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ETH_NET_DEVICE_INIT(eth_mcux_0,
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#define ETH_MCUX_GENERATE_MAC_RANDOM(n) \
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DT_INST_LABEL(0),
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static void generate_eth##n##_mac(uint8_t *mac_addr) \
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eth_init,
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{ \
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ETH_MCUX_PM_FUNC,
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gen_random_mac(mac_addr, \
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ð0_context,
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FREESCALE_OUI_B0, \
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ð0_buffer_config,
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FREESCALE_OUI_B1, \
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CONFIG_ETH_INIT_PRIORITY,
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FREESCALE_OUI_B2); \
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&api_funcs,
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}
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NET_ETH_MTU);
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static void eth0_config_func(void)
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#define ETH_MCUX_GENERATE_MAC_UNIQUE(n) \
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{
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static void generate_eth##n##_mac(uint8_t *mac_addr) \
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#if DT_INST_IRQ_HAS_NAME(0, rx)
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{ \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, rx, irq),
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uint32_t id = ETH_MCUX_UNIQUE_ID; \
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DT_INST_IRQ_BY_NAME(0, rx, priority),
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\
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eth_mcux_rx_isr,
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mac_addr[0] = FREESCALE_OUI_B0; \
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DEVICE_GET(eth_mcux_0),
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mac_addr[0] |= 0x02; /* force LAA bit */ \
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0);
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mac_addr[1] = FREESCALE_OUI_B1; \
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irq_enable(DT_INST_IRQ_BY_NAME(0, rx, irq));
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mac_addr[2] = FREESCALE_OUI_B2; \
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#endif
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mac_addr[3] = id >> 8; \
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mac_addr[4] = id >> 16; \
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mac_addr[5] = id >> 0; \
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mac_addr[5] += n; \
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}
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#if DT_INST_IRQ_HAS_NAME(0, tx)
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#define ETH_MCUX_GENERATE_MAC(n) \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, tx, irq),
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COND_CODE_1(DT_INST_PROP(n, zephyr_random_mac_address), \
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DT_INST_IRQ_BY_NAME(0, tx, priority),
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(ETH_MCUX_GENERATE_MAC_RANDOM(n)), \
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eth_mcux_tx_isr,
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(ETH_MCUX_GENERATE_MAC_UNIQUE(n)))
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DEVICE_GET(eth_mcux_0),
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0);
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irq_enable(DT_INST_IRQ_BY_NAME(0, tx, irq));
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#endif
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#if DT_INST_IRQ_HAS_NAME(0, err_misc)
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#define ETH_MCUX_MAC_ADDR_LOCAL(n) \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, err_misc, irq),
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.mac_addr = DT_INST_PROP(n, local_mac_address), \
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DT_INST_IRQ_BY_NAME(0, err_misc, priority),
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eth_mcux_error_isr,
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DEVICE_GET(eth_mcux_0),
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0);
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irq_enable(DT_INST_IRQ_BY_NAME(0, err_misc, irq));
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#endif
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#if DT_INST_IRQ_HAS_NAME(0, common)
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, common, irq),
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DT_INST_IRQ_BY_NAME(0, common, priority),
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eth_mcux_dispacher_isr,
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DEVICE_GET(eth_mcux_0),
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0);
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irq_enable(DT_INST_IRQ_BY_NAME(0, common, irq));
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#endif
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#if defined(CONFIG_PTP_CLOCK_MCUX)
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#if DT_NODE_HAS_STATUS(PTP_INST_NODEID(0), okay)
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IRQ_CONNECT(DT_IRQ_BY_NAME(PTP_INST_NODEID(0), ieee1588_tmr, irq),
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DT_IRQ_BY_NAME(PTP_INST_NODEID(0), ieee1588_tmr, priority),
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eth_mcux_ptp_isr,
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DEVICE_GET(eth_mcux_0),
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0);
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irq_enable(DT_IRQ_BY_NAME(PTP_INST_NODEID(0), ieee1588_tmr, irq));
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#endif
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#endif
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}
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#endif /* DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay) */
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#if DT_NODE_HAS_STATUS(DT_DRV_INST(1), okay)
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#if DT_INST_PROP(1, zephyr_random_mac_address) && \
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NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(1))
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#error Conflict between 'local-mac-address' and 'zephyr,random-mac-address'
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#endif
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#if !NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(1))
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static void generate_eth1_mac(uint8_t *mac_addr)
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{
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#if DT_INST_PROP(1, zephyr_random_mac_address)
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gen_random_mac(mac_addr,
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FREESCALE_OUI_B0, FREESCALE_OUI_B1, FREESCALE_OUI_B2);
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#else
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/* Generate_unique_mac */
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mac_addr[0] = FREESCALE_OUI_B0;
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mac_addr[1] = FREESCALE_OUI_B1;
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mac_addr[2] = FREESCALE_OUI_B2;
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/* Trivially "hash" up to 128 bits of MCU unique identifier */
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#if defined(CONFIG_SOC_SERIES_IMX_RT)
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uint32_t id = OCOTP->CFG1 ^ OCOTP->CFG2;
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#elif defined(CONFIG_SOC_SERIES_KINETIS_K6X)
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uint32_t id = SIM->UIDH ^ SIM->UIDMH ^ SIM->UIDML ^ SIM->UIDL;
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#else
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#error "Unsupported SOC"
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#endif
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mac_addr[0] |= 0x02; /* force LAA bit */
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mac_addr[3] = id >> 8;
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mac_addr[4] = id >> 16;
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mac_addr[5] = id >> 0;
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mac_addr[5] += 1;
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#endif /* zephyr_random_mac_address */
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}
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#endif
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static void eth1_config_func(void);
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static struct eth_context eth1_context = {
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.base = (ENET_Type *)DT_INST_REG_ADDR(1),
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#if defined(CONFIG_NET_POWER_MANAGEMENT)
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.clock_name = DT_INST_CLOCKS_LABEL(1),
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#endif
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.config_func = eth1_config_func,
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.phy_addr = 0U,
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.phy_duplex = kPHY_FullDuplex,
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.phy_speed = kPHY_Speed100M,
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#if NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(1))
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.mac_addr = DT_INST_PROP(1, local_mac_address),
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.generate_mac = NULL,
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.generate_mac = NULL,
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#else
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.generate_mac = generate_eth1_mac,
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#endif
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};
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#if defined(CONFIG_HAS_MCUX_CACHE)
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#define ETH_MCUX_MAC_ADDR_GENERATE(n) \
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static __nocache enet_rx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
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.mac_addr = {0}, \
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eth1_rx_buffer_desc[CONFIG_ETH_MCUX_RX_BUFFERS];
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.generate_mac = generate_eth##n##_mac,
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static __nocache enet_tx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
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|
||||||
eth1_tx_buffer_desc[CONFIG_ETH_MCUX_TX_BUFFERS];
|
|
||||||
#else
|
|
||||||
static enet_rx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
|
|
||||||
eth1_rx_buffer_desc[CONFIG_ETH_MCUX_RX_BUFFERS];
|
|
||||||
|
|
||||||
static enet_tx_bd_struct_t __aligned(ENET_BUFF_ALIGNMENT)
|
#define ETH_MCUX_MAC_ADDR(n) \
|
||||||
eth1_tx_buffer_desc[CONFIG_ETH_MCUX_TX_BUFFERS];
|
COND_CODE_1(NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(n)), \
|
||||||
#endif
|
(ETH_MCUX_MAC_ADDR_LOCAL(n)), \
|
||||||
|
(ETH_MCUX_MAC_ADDR_GENERATE(n)))
|
||||||
|
|
||||||
static uint8_t __aligned(ENET_BUFF_ALIGNMENT)
|
#define ETH_MCUX_POWER_INIT(n) \
|
||||||
eth1_rx_buffer[CONFIG_ETH_MCUX_RX_BUFFERS][ETH_MCUX_BUFFER_SIZE];
|
.clock_name = DT_INST_CLOCKS_LABEL(n), \
|
||||||
|
|
||||||
static uint8_t __aligned(ENET_BUFF_ALIGNMENT)
|
#define ETH_MCUX_POWER(n) \
|
||||||
eth1_tx_buffer[CONFIG_ETH_MCUX_TX_BUFFERS][ETH_MCUX_BUFFER_SIZE];
|
COND_CODE_1(CONFIG_NET_POWER_MANAGEMENT, \
|
||||||
|
(ETH_MCUX_POWER_INIT(n)), \
|
||||||
|
(ETH_MCUX_NONE))
|
||||||
|
|
||||||
#if defined(CONFIG_PTP_CLOCK_MCUX)
|
#define ETH_MCUX_INIT(n) \
|
||||||
/*
|
ETH_MCUX_GENERATE_MAC(n) \
|
||||||
* Array to get transmit frame information on completion of frame transmit.
|
\
|
||||||
* This will hold the transmit timestamp.
|
static void eth##n##_config_func(void); \
|
||||||
*/
|
\
|
||||||
static enet_frame_info_t eth1_tx_frameinfo_array[CONFIG_ETH_MCUX_TX_BUFFERS];
|
static struct eth_context eth##n##_context = { \
|
||||||
#endif
|
.base = (ENET_Type *)DT_INST_REG_ADDR(n), \
|
||||||
|
.config_func = eth##n##_config_func, \
|
||||||
|
.phy_addr = 0U, \
|
||||||
|
.phy_duplex = kPHY_FullDuplex, \
|
||||||
|
.phy_speed = kPHY_Speed100M, \
|
||||||
|
ETH_MCUX_MAC_ADDR(n) \
|
||||||
|
ETH_MCUX_POWER(n) \
|
||||||
|
}; \
|
||||||
|
\
|
||||||
|
static NOCACHE __aligned(ENET_BUFF_ALIGNMENT) \
|
||||||
|
enet_rx_bd_struct_t \
|
||||||
|
eth##n##_rx_buffer_desc[CONFIG_ETH_MCUX_RX_BUFFERS]; \
|
||||||
|
\
|
||||||
|
static NOCACHE __aligned(ENET_BUFF_ALIGNMENT) \
|
||||||
|
enet_tx_bd_struct_t \
|
||||||
|
eth##n##_tx_buffer_desc[CONFIG_ETH_MCUX_TX_BUFFERS]; \
|
||||||
|
\
|
||||||
|
static uint8_t __aligned(ENET_BUFF_ALIGNMENT) \
|
||||||
|
eth##n##_rx_buffer[CONFIG_ETH_MCUX_RX_BUFFERS] \
|
||||||
|
[ETH_MCUX_BUFFER_SIZE]; \
|
||||||
|
\
|
||||||
|
static uint8_t __aligned(ENET_BUFF_ALIGNMENT) \
|
||||||
|
eth##n##_tx_buffer[CONFIG_ETH_MCUX_TX_BUFFERS] \
|
||||||
|
[ETH_MCUX_BUFFER_SIZE]; \
|
||||||
|
\
|
||||||
|
ETH_MCUX_PTP_FRAMEINFO_ARRAY(n) \
|
||||||
|
\
|
||||||
|
static const enet_buffer_config_t eth##n##_buffer_config = { \
|
||||||
|
.rxBdNumber = CONFIG_ETH_MCUX_RX_BUFFERS, \
|
||||||
|
.txBdNumber = CONFIG_ETH_MCUX_TX_BUFFERS, \
|
||||||
|
.rxBuffSizeAlign = ETH_MCUX_BUFFER_SIZE, \
|
||||||
|
.txBuffSizeAlign = ETH_MCUX_BUFFER_SIZE, \
|
||||||
|
.rxBdStartAddrAlign = eth##n##_rx_buffer_desc, \
|
||||||
|
.txBdStartAddrAlign = eth##n##_tx_buffer_desc, \
|
||||||
|
.rxBufferAlign = eth##n##_rx_buffer[0], \
|
||||||
|
.txBufferAlign = eth##n##_tx_buffer[0], \
|
||||||
|
.rxMaintainEnable = true, \
|
||||||
|
.txMaintainEnable = true, \
|
||||||
|
ETH_MCUX_PTP_FRAMEINFO(n) \
|
||||||
|
}; \
|
||||||
|
\
|
||||||
|
ETH_NET_DEVICE_INIT(eth_mcux_##n, \
|
||||||
|
DT_INST_LABEL(n), \
|
||||||
|
eth_init, \
|
||||||
|
ETH_MCUX_PM_FUNC, \
|
||||||
|
ð##n##_context, \
|
||||||
|
ð##n##_buffer_config, \
|
||||||
|
CONFIG_ETH_INIT_PRIORITY, \
|
||||||
|
&api_funcs, \
|
||||||
|
NET_ETH_MTU); \
|
||||||
|
\
|
||||||
|
static void eth##n##_config_func(void) \
|
||||||
|
{ \
|
||||||
|
ETH_MCUX_IRQ(n, rx); \
|
||||||
|
ETH_MCUX_IRQ(n, tx); \
|
||||||
|
ETH_MCUX_IRQ(n, err); \
|
||||||
|
ETH_MCUX_IRQ(n, common); \
|
||||||
|
ETH_MCUX_IRQ_PTP(n); \
|
||||||
|
} \
|
||||||
|
|
||||||
static const enet_buffer_config_t eth1_buffer_config = {
|
DT_INST_FOREACH_STATUS_OKAY(ETH_MCUX_INIT)
|
||||||
.rxBdNumber = CONFIG_ETH_MCUX_RX_BUFFERS,
|
|
||||||
.txBdNumber = CONFIG_ETH_MCUX_TX_BUFFERS,
|
|
||||||
.rxBuffSizeAlign = ETH_MCUX_BUFFER_SIZE,
|
|
||||||
.txBuffSizeAlign = ETH_MCUX_BUFFER_SIZE,
|
|
||||||
.rxBdStartAddrAlign = eth1_rx_buffer_desc,
|
|
||||||
.txBdStartAddrAlign = eth1_tx_buffer_desc,
|
|
||||||
.rxBufferAlign = eth1_rx_buffer[0],
|
|
||||||
.txBufferAlign = eth1_tx_buffer[0],
|
|
||||||
.rxMaintainEnable = true,
|
|
||||||
.txMaintainEnable = true,
|
|
||||||
#if defined(CONFIG_PTP_CLOCK_MCUX)
|
|
||||||
.txFrameInfo = eth1_tx_frameinfo_array,
|
|
||||||
#else
|
|
||||||
.txFrameInfo = NULL,
|
|
||||||
#endif
|
|
||||||
};
|
|
||||||
|
|
||||||
ETH_NET_DEVICE_INIT(eth_mcux_1,
|
|
||||||
DT_INST_LABEL(1),
|
|
||||||
eth_init,
|
|
||||||
ETH_MCUX_PM_FUNC,
|
|
||||||
ð1_context,
|
|
||||||
ð1_buffer_config,
|
|
||||||
CONFIG_ETH_INIT_PRIORITY,
|
|
||||||
&api_funcs,
|
|
||||||
NET_ETH_MTU);
|
|
||||||
|
|
||||||
static void eth1_config_func(void)
|
|
||||||
{
|
|
||||||
#if DT_INST_IRQ_HAS_NAME(1, rx)
|
|
||||||
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, rx, irq),
|
|
||||||
DT_INST_IRQ_BY_NAME(1, rx, priority),
|
|
||||||
eth_mcux_rx_isr,
|
|
||||||
DEVICE_GET(eth_mcux_1),
|
|
||||||
0);
|
|
||||||
irq_enable(DT_INST_IRQ_BY_NAME(1, rx, irq));
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if DT_INST_IRQ_HAS_NAME(1, tx)
|
|
||||||
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, tx, irq),
|
|
||||||
DT_INST_IRQ_BY_NAME(1, tx, priority),
|
|
||||||
eth_mcux_tx_isr,
|
|
||||||
DEVICE_GET(eth_mcux_1),
|
|
||||||
0);
|
|
||||||
irq_enable(DT_INST_IRQ_BY_NAME(1, tx, irq));
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if DT_INST_IRQ_HAS_NAME(1, err_misc)
|
|
||||||
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, err_misc, irq),
|
|
||||||
DT_INST_IRQ_BY_NAME(1, err_misc, priority),
|
|
||||||
eth_mcux_error_isr,
|
|
||||||
DEVICE_GET(eth_mcux_1),
|
|
||||||
0);
|
|
||||||
irq_enable(DT_INST_IRQ_BY_NAME(1, err_misc, irq));
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if DT_INST_IRQ_HAS_NAME(1, common)
|
|
||||||
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, common, irq),
|
|
||||||
DT_INST_IRQ_BY_NAME(1, common, priority),
|
|
||||||
eth_mcux_dispacher_isr,
|
|
||||||
DEVICE_GET(eth_mcux_1),
|
|
||||||
0);
|
|
||||||
irq_enable(DT_INST_IRQ_BY_NAME(1, common, irq));
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_PTP_CLOCK_MCUX)
|
|
||||||
#if DT_NODE_HAS_STATUS(PTP_INST_NODEID(1), okay)
|
|
||||||
IRQ_CONNECT(DT_IRQ_BY_NAME(PTP_INST_NODEID(1), ieee1588_tmr, irq),
|
|
||||||
DT_IRQ_BY_NAME(PTP_INST_NODEID(1), ieee1588_tmr, priority),
|
|
||||||
eth_mcux_ptp_isr,
|
|
||||||
DEVICE_GET(eth_mcux_1),
|
|
||||||
0);
|
|
||||||
irq_enable(DT_IRQ_BY_NAME(PTP_INST_NODEID(1), ieee1588_tmr, irq));
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
#endif /* DT_NODE_HAS_STATUS(DT_DRV_INST(1), okay) */
|
|
||||||
|
|
||||||
#if defined(CONFIG_PTP_CLOCK_MCUX)
|
#if defined(CONFIG_PTP_CLOCK_MCUX)
|
||||||
struct ptp_context {
|
struct ptp_context {
|
||||||
|
|
|
@ -476,7 +476,7 @@
|
||||||
compatible = "nxp,kinetis-ethernet";
|
compatible = "nxp,kinetis-ethernet";
|
||||||
reg = <0x400c0000 0x620>;
|
reg = <0x400c0000 0x620>;
|
||||||
interrupts = <83 0>, <84 0>, <85 0>;
|
interrupts = <83 0>, <84 0>, <85 0>;
|
||||||
interrupt-names = "TX", "RX", "ERR_MISC";
|
interrupt-names = "TX", "RX", "ERR";
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
label = "ETH_0";
|
label = "ETH_0";
|
||||||
clocks = <&sim KINETIS_SIM_CORESYS_CLK 0 0>;
|
clocks = <&sim KINETIS_SIM_CORESYS_CLK 0 0>;
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue